Index
A
ABEL language, 925–929
Absolute permeability, 30
Absolute permittivity, 21–22
AC circuits
apparent power, 137–138
power factor, 137
Accumulator (ACC) register, 984–985
Acquisition time, 636
Actel Logic System (ALS), 433
Active filters
all-pass filter
first-order all-pass filter, 732
group delay, 730–731
higher-order all-pass filters, 734
second-order all-pass filter, 733
transfer function, 730
applications, 685
bandpass filter design
fourth-order bandpass filter, 720–721
low-pass to bandpass transition, 714
quality factor Q, 715
second-order band-pass filter, 716–719
band-rejection filter
twin-T filter, 725–727
Wien-Robinson filter, 727–729
capacitor selection
ceramic capacitors, 740–741
filter responses, 740
sensitivity approximations, 738–739
coefficient of
all-pass filter, 751
Bessel filter, 745
Butterworth filter, 746
Tschebyscheff filter, 747–750
component values, 741
DC-biasing techniques
dual-supply circuit, 734–735
MFB low-pass filter baising, 737
Sallen-Key and MFB high-pass filter baising, 738
single supply circuit, 736
definition, 685
high-pass filter
first-order high-pass filter, 709–710
gain response of, 708
higher-order high-pass filters, 713–714
second-order high-pass filter, 710–713
low-pass filter
Bessel low-pass filters, 693–694
Butterworth low-pass filter, 691–692
first-order low-pass filter, 697–700
first-order passive RC low-pass, 686–687
fourth-order passive RC low-pass, 687–690
higher-order low-pass filters, 704–707
quality factor Q, 695–696
second-order low-pass filter, 700–704
transfer function, 696
Tschebyscheff low-pass filter, 691–693
op-amp selection
open-loop gain and filter response, 741–742
single-supply amplifiers, 743
Active twin-T filter, 726
Adaptive filters
applications of, 519–520
linear predictive coding (LPC)
speech companding system, 521–522
vocal tract model, 521
recursive all pole lattice filter
estimation of filter coefficients, 523
structure, 522–523
ADCs. See Analog-to-digital converters
AD590 semiconductor temperature sensor, 672–673
Alkaline manganese dioxide battery, 1108–1109
All-pass filter
first-order all-pass filter, 732
group delay
definition, 730–731
frequency response of, 731
higher-order all-pass filters, 734
second-order all-pass filter, 733
transfer function, 730
Alternating current theory
average and amplitude, 128
bandwidth, 143
direct vs. alternating current, 124
frequency, 125–127
impedance
in C-R and L-R circuits, 136
definition, 135
in L-C circuits, 138–139
in L-C-R circuits, 140
peak-peak values, 128–129
periodic time, 127
power factor, 137–138
Q-factor, 142
and bandwidth, 143
parallel resonant circuit, 142
resonance, 141–142
r.m.s. values, 129
waveforms and signals, 124–125
ALU. See Arithmetic and logic unit
American UL–198-G standard, 1082
Amplification block, 561
Amplifiers
differential amplifier
bias correction, 881–882
buffer input signal, 888–889
high common-mode range, 883–884
high input impedance, 882–883
high-precision, 884–885
simplified high-precision, 885–886
T network and feedback loop, 887–888
variable gain, 886–887
inverting AC amplifier, 889–890
inverting op-amp
inverting negative reference, 874–875
inverting positive reference, 876–877
noninverting negative reference, 875–876
noninverting positive reference, 873–874
noninverting AC amplifier, 890–891
noninverting op-amp
inverting negative reference, 878
inverting positive reference, 877
noninverting negative reference, 878
noninverting positive reference, 879–880
Amplitude modulation (AM), 753
Analog and digital circuits integration
analog inputs to digital generation
circuit segregation, 456–457
contact bounce, 459–460
Schmitt trigger gate, 458–459
switch debouncing circuits, 460–461
bandwidth filtering, 456
grounding schemes
multi-board systems, 458
single-board systems, 457–458
ground noise, 455–456
interface isolation
coupling capacitance, 464–465
opto-couplers, 463–464
relays and pulse transformers, 465
interface used in
controller area network, 472
EIA–422, 469–471
EIA–485, 471
EIA–232F, 466–471
Ethernet, 474–476
universal serial bus, 472–474
logic gates, overvoltages
consequences, 461
logic gate I/O protection, 461–462
Analog and digital circuits layout
anti-aliasing filters, 1149
auto routed circuit diagram, 1135–1136
12-bit A/D converter
circuit diagram, 1143
ground plane-less layout, 1144–1145
layout with ground plane, 1146
16-bit D/A converter
circuit operation, 1124–1125
device specifications, 1125–1126
first pass layout, 1127
improved layout, 1128–1130
scope photo, 1128
bypass capacitors
on PCB, 1148–1149
similarities and differences, 1118–1119
capacitors in PCB, 1123–1124
digital and analog section, 1137–1138
grounding
AGND and DGND pins, 1132–1134
components location, 1121–1122
current return paths, 1140–1142
guidelines, 1144–1147
and power trace routing, 1119–1121
sigma-delta A/D converter, 1133–1135
guidelines, 1142–1144
manual routed circuit diagram, 1138–1140
PCB design, 1118–1119
power and ground traces, 1119–1121
signal traces, 1147–1148
techniques
SAR A/D converters, 1131–1133
sigma-delta A/D converter, 1133–1135
Analog and digital design
capacitors, 553–554
parasitic capacitance, 552
precision, 549–550
rules of thumb, 554–556
Analog filters
vs. digital filters, 487–488
Analog-storage oscilloscope, 194
Analog-to-digital converters (ADCs), 1057–1058. See also Analog and digital circuits layout
clocked interfaces, 643–644
codecs (compressor/decompressor), 652
design of, 655
ground noise, 455
internal microcontroller ADC
dual-function pins, 653–655
PIC167C7xx family, 650–651
reference voltage, 651–652
interrupt rates, 652–653
microcontroller systems, 1041
microprocessor interfaces
bus relinquish time, 640–642
–BUSY output, 640
data access time, 640
least significant bit (LSB) errors, 643
Maxim MAX151 interface, 638–640
output coding, 637
time delay, 642–643
in multi-board systems, 458
multiple channel ADCs, 650
output word, 622–623
real ICs
input levels, 636–637
internal reference voltage and internal S/H, 637
reference voltage, 622
resolution, 623
resolution voltage and bandwidth filtering, 456
sample-and-hold (S/H) circuit
characteristics, 636
input change, 634
operation principle, 635
SAR layout, 1131–1133
serial interfaces
I2C bus, 647–649
proprietary serial interfaces, 649–650
serial peripheral interface (SPI)/microwire, 644–647
system management bus (SMBus), 649
sigma-delta layout, 1133–1135
in single-board systems, 457–458
types of
dual-slope converter, 628–629
flash converter, 626
half-flash converter, 632–633
sigma-delta converter, 629–632
successive approximation converter, 626–628
tracking converter, 624–626
AND gate
circuit symbol, 307
IEEE/ANSI Standard logic symbol, 308
truth table, 309
AND-OR architecture devices
fixed AND-programmable OR array, 415–419
programmable AND–fixed OR array, 419–422
programmable AND–programmable OR array, 422–424
schematic diagram of, 415
types of, 414
Anti-aliasing filters, 1149
Antifuse technology, FPGA architectures
advantages, 960
programmable element, 947
types of, 959
vs. SRAM, 960
Apparent power, 137–138
Application-specific integrated circuits (ASICs), 390
advantages, 931
combinational logic, 277
masked gate array
advantages and disadvantages, 931
architecture, 930
ASIC vendor, 929–931
sequential logic, 277–278
Arithmetic and logic unit (ALU), 995–996
ASICs. See Application-specific integrated circuits
Astable oscillators, 802–804
Astable waveform generators. See Nonsinusoidal waveform generators
ATE. See Automatic test equipment
Audible alarm circuit, 681–682
Audio-frequency generators, 808
Audio-frequency oscillators
low-distortion, 814–815
SVF-based, 812–813
Wien bridge configuration, 809–812
Automatic level control (ALC) loop, 792
Automatic test equipment (ATE)
functional testing, 1169
IEEE–488 standard bus, 1169
Autonomous sequential logic circuit, 345
Auxiliary meters, 197
B
Back-end software, FPGA CAD tools, 433
Band-pass and band-stop filters, 507–508
Bandpass filter
fourth-order bandpass filter
pole quality (Qi) and individual gain (Ami), 721
transfer function and staggered tuning., 720
low-pass to bandpass transition, 714
quality factor Q, 715
second-order band-pass filter
gain response of, 716
multiple feedback topology, 718–719
Sallen-Key topology, 717–718
Band-rejection filter
twin-T filter
active and passive, 725–726
filter parameters, 726–727
Wien-Robinson filter
active and pasive, 727–728
active vs. passive, 729
design procedure and filter parameters, 728
Bandwidth, 143
Basic low pass filter model
implementation, 1013
Batteries
charging
lead-acid, 1115–1116
lithium ion, 1116
NiCad and NiMH, 1116
lead-acid battery and nickel-cadmium battery, 232
primary cells
alkaline manganese dioxide, 1108–1109
lithium, 1109–1110
silver oxide, 1109
sizes, 1106–1107
zinc air, 1109
secondary cells
lead-acid, 1110–1111
lithium-ion, 1113–1114
nickel-cadmium, 1112
nickel metal hydride, 1112–1113
selection procedure
mechanical design, 1104–1105
series and parallel connection, 1104–1105
storage, shelf life and disposal, 1107–1108
voltage and capacity ratings, 1104
Battery-backed memory, 1025
Bed-of-nails fixture, design techniques, 1174
Bessel filters, 512
coefficient of, 745
high-pass filters
coefficients for, 713
unity-gain, 714
low-pass filters
group delay (Tgr) and gain responses, 694
linear phase response, 693
second-order filter coefficients, 703
Binary coded decimal (BCD) conversion, 290–291
Binary coding schemes
gray code, 289–290
signed binary, 284–288
unsigned binary, 280–283
Binary data manipulation, 301
Boolean algebra, 302–306
Karnaugh maps, 301
truth tables, 308
AND, NAND and OR gate, 309
BUFFER and NOT gate, 311
NOR, EX-OR and EX-NOR gate, 310
three-input logic circuit, 314–316
VHDL code, 311–313
Bipolar amplifier
vs. CMOS, 603–604
Bipolar junction transistor (BJT)
AC performance and current gain, 238–240
base/emitter junction, 236–237
collector characteristics of, 237–238
Darlington compound transistor, 246–247
DC current gain, 238
h parameters
common emitter/collector stages, 243–244
input impedance, 242
transistor model, 243
two-port black box, 240–241
NPN junction transistor, 235–237
point contact transistor, 235
small-signal amplifiers, 239
Bipolar power transistors (BPT)
fabrication structures, 264–265
MOSFET role, 269–270
troubleshooting in, 266
12-bit A/D converter
circuit diagram, 1143
ground plane-less layout, 1144–1145
layout with ground plane, 1146
16-bit D/A converter
circuit operation, 1124–1125
device specifications, 1125–1126
first pass layout, 1127
improved layout, 1128–1130
scope photo, 1128
Boolean algebra
circuit schematic diagram, 317
logic operators, 302–303
on constants, 304
on variables, 305–306
theorems of, 304
uses, 306
Boolean logic expressions. See Boolean algebra
1001 sequence detector, 375–376
three-bit straight binary down-counter, 360–361
traffic light sequencer, 370–371
Bootstrap driver, 1057
Boundary scan method
and Joint Test Action Group (JTAG), 1170
principle, 1171–1172
Boundary-scan register (BSR), 1172
Boundary scan testing (BST), 1170
Bridge rectifier, 1072
Broadband noise parameter, 595
Bubba oscillator, 908–909
Buck converter, 1075
BUFFER, 303
schematic symbol, 305
truth table, 311
Buffer amplifier. See Voltage follower amplifier
Buffered phase shift oscillator, 907–908
Butterworth filter, 511
band pass filter
gain response, 723
quality factors, 721
coefficient of, 746
low-pass filter
amplitude responses of, 692
applications, 691
eighth-order partial filters, 739
fifth-order coefficients, 705
fifth-order unity gain, 707
second-order filter coefficients, 703
Bypass capacitors
position in analog and digital layout, 1118–1119
C
CANbus (controller area network)
analog function nodes, 537
demonstration, 534
features of, 535–536
Capacitance, 61–62
Capacitive reactance, 130–132
Capacitor
driving bipolar transistors, 1053
Capacitor-Resistor (C-R) circuits
charging
exponential growth and decay, 108–109
time constant, 107
discharging
applications in oscilloscope, 111
exponential decay of capacitor, 112
exponential decay of current, 113
time constant, 114
impedance of, 136
in waveshaping circuits
differentiating circuit, 117
integrating circuit, 116–117
Capacitor-Resistor (CR) pulse generator, 398–400
Capacitors, 553–554
alternating voltages, 130
bypass
location on PCB, 1148–1149
position on analog and digital layout, 1118–1119
charging and discharging, 60–61
color code markings, 68–69
components, 59
electrolytic and nonelectrolytic, 67
energy storage, 63
in PCB, 1123–1124
phasor diagram for, 132
physical dimensions, 63–64
reactance of, 130–131
series and parallel combination of, 70–71
specifications for, 66
types of, 66–67
Cauer filter. See Elliptical filter
CENELEC Electronic Components Committee (CECC), 1182
Central processing unit (CPU), 1025
Ceramic capacitor model, 554
Ceramic capacitors, 740–741
Chebyshev filter, 511
Circuit design, reliability
components and CECC, 1182
de-rating
capacitor, 1181
resistor, 1181–1182
electronic assembly, 1183
factors, 1180
redundancy, 1183–1184
stress screening and burn-in, 1183
temperature, 1180–1181
Clapp (or Gouriet) circuit, 787–789
Class B amplifier, 164
CLBs. See Configurable logic blocks
Clock circuitry, 957
Clock distribution method
bidirectional transmission, 531–532
end-of-line termination, 530
preferred method, 531
Closed-loop-amplifier circuit, 542–543
Closed-loop output impedance, 590
CMOS. See Complementary metal oxide semiconductor
Code converter, 418
Codecs (compressor/decompressor), 652
Coder/decoder. See Codecs (compressor/decompressor)
Color code markings
capacitors, 68–69
inductors, 81
resistors, 42–43
Colpitts oscillators, 816–817
don’t care conditions, 341
flip-flops, 347–348
hazards and elimination, 339
Karnaugh map (K-map)
tristate buffer symbol, 340–341
two-input circuit, 334–338
NAND and NOR logic, 332–334
sequential logic circuits, 343
static CMOS inverter
circuit schematic diagram, 320–321
one-bit full-adder cell, 326–328
one-bit half-adder cell, 325–326
partial odd/even number detector, 328–332
two-input multiplexer, 323–325
Combinational logic gates. See Logic gates
Common-mode rejection ratio (CMRR), 591
Comparator circuits, 562
Complementary metal oxide semiconductor (CMOS)
common source output stage
input current, 585–586
input offset voltage in, 584
output impedance, 590
vs. bipolar amplifier, 603–604
digital logic gates in, 272–273
input capacitance, 527–528
integrated circuits (ICs), 261
Complex programmable logic devices (CPLDs)
advantages, 931
architectures, 933–934
clock drivers, 937–938
embedded devices
advantages and disadvantages, 940
JTAG signals, 942
system on programmable chip, 940
evolution, 932
function blocks
Boolean equation, 934
PAL architectures, 935
interconnect, 938–940
I/O blocks
advantages and disadvantages, 937
features, 936
programmable elements, 940
switch matrix, advantage, 938
synchronous design, 937
Computer aided design (CAD) tools
field programmable logic devices
back annotated delays, 432
features, 432–433
functional debug test, 433–434
JEDEC file and one-time programmable (OTP)devices, 431
full custom design, 413–414
mask programmable gate arrays
back annotation of routing delays, 409
layout simulation, 408
prelayout and postlayout simulation, 408–409
shift register, 409–410
system description, 407
standard cell design, 413
Computer simulation, 151–152
Computing circuits
buffers with noninverting summer, 893–894
inverting integrator
drift compensation, 896–897
electronic reset, 898
input current compensation, 895–896
mechanical reset, 897–898
resistive reset, 899
schematic representation, 894–895
inverting summer, 891–892
noninverting summer, 892–893
Configurable I/O blocks, FPGA
pull-up resistors, 952
slew rate control, 951
Configurable logic blocks (CLBs), 426
consists of, 948
fine-grained vs. large-grained, 950
interconnect resources, 955
muxes, 949
routing resources, 956
Contact bounce, analog inputs to digital generation, 459–460
Continuous wave (CW), 753
Controller area network (CAN) protocol, 472
Coolrunner™, 330
Counter circuit design
divide-by–5 circuit, 362–365
three-bit straight binary down-counter, 358–361
three-bit straight binary up-counter, 354–358
Crest factor, 1087–1088
Current divider circuit, 96
D
DAC. See Digital-to-analog converter
Darlington compound transistor, 246–247
Darlington connection, 258
Darlington pair, 910–911
Darlington power transistor, 678–679
DASC. See Design automation standards committee
Data communications equipment (DCE), EIA–232F interface, 466
Data Interface Standards
EIA–232F interface
circuits, 470–471
data terminal and communication equipment, 466
electrical characteristics, 467
EIA–422 interface
balanced and terminated design, 469
circuits, 470–471
EIA–485 interface, 471
Data storage, 383
semiconductor RAM, 1025
semiconductor ROM, 1024
Data types, 1024
DC circuit
current divider circuit, 96
Kirchhoff’s laws, 89–90
Norton equivalent circuit, 103–104
potential divider circuit, 94–95
Wheatstone bridge circuit, 98–99
DC level shifter, 911
Decimal–unsigned binary conversion. See Unsigned binary systems
Decoupling capacitors. See Bypass capacitors
Delta-sigma (Δ–Σ) converter, 540
DeMorgan’s law, 923
De-rated capacitor, 1181
Design Automation Standards Committee (DASC), 971
Design flow synthesis
behavioral type, 974
HDL flow, 975
register transfer level (RTL), 974–977
software tools, 976
Design for production
checklist
installation, 1164
production, 1162–1163
sourcing, 1162
testing and calibration, 1163
designer set of questions, 1161
electrostatic discharge, danger of, 1164–1166
Design pitfalls, 978
Design techniques
bed-of-nails fixture and test connectors, 1174
circuit design, 1175–1176
Dielectric constant, 21
Dielectric strength, 22
Difference amplifier
circuit diagram and configuration, 610
transfer function, 609
voltage shift, 611
Differential amplifier
bias correction, 881–882
buffer input signal, 888–889
high common-mode range, 883–884
high input impedance, 882–883
high-precision, 884–885
netlist and component models, 162–163
simplified high-precision, 885–886
T network and feedback loop, 887–888
variable gain, 886–887
Differentiating circuit, 117
Differentiator circuit. See CR pulse generator
Digital circuit design routes
discrete implementation
CR pulse generator, 398–400
74HCT139 IC, 392
levels of integration, 391
monostable circuits, 394–398
spikes and glitches, 392–394
standard products and ASICs, 390
field programmable and mask programmable devices, 390–391
selection
AND-OR array, 437–438
FPGA, 438–439
standard part, 436–437
Digital circuits
ASIC
combinational logic circuit, 277
sequential logic circuit, 277–278
catagories of, 271–272
logic gates
complementary metal oxide semiconductor (CMOS), 272–273
fabrication processes, 272
number systems
binary coded decimal conversion, 290–291
gray code, 289–290
hexadecimal-binary conversion, 294–297
octal-binary conversion, 291–293
signed binary, 284–288
unsigned binary, 280–283
voltage levels, 279
standard product IC
fixed-functionality, 274
memory, 276
processor, 275
programmable logic device (PLD), 276
Digital domain
analog design, 557–558
toolbox organization, 556–557
Digital filters
adaptive filters, 519–523
digital signal processing (DSP)
applications, real-time operation, 488–489
buffer memory, 486
designing, 485
discrete time function, 485–486
tools of, 484
finite impulse response (FIR) filters, 489–494
FIR vs. IIR filters, 513–514
infinite impulse response (IIR) filters, 508–511
multirate filters, 514–519
types of, 489
vs. analog filters, 487–488
Digital scan path testing
controllability and observability, 379
D-type flip-flops and multiplexers, 381
operation modes, 380–382
scan D-type flip-flop, 382
Digital signal processing (DSP)
ADSP–21xx FIR filter assembly language code, 484–485
analog filter, 482–484
analog vs. digital filter
low-pass filter, 482
digital filter
applications, real-time operation, 488–489
buffer memory, 486
designing, 485
discrete time function, 485–486
filtering tools, 484
SHARC DSPs in, 528
small damping resistors, 528
129-tap digital FIR filter, 484
termination techniques
end termination method, 528–529
source termination method, 529–532
microcontroller systems, 1041–1042
DIL switch, 667–668
1N914 diode, 220
Diodes, associated problems of
assault and battery, 231–232
computer diodes, 220–221
exponential characteristics and slopes, 217
failure diodes, 224
forward voltage, VF values, 218–219
minimization strategies, 225
op-amp’s gain, 223
optoisolators, 228–229
speed demons, 219–220
turn ON and OFF in, 220–222
very-low-leakage diode in, 219
zener diodes, 225–228
Direct currents, definition, 124
Discrete Fourier transform
impulse response, 493
transfer function, 499
Divide-by–5 circuit
output logic decodings, 366
state transition diagram, 362–363
Xilinx ISE™ schematic diagram, 365
D latch
circuit symbol and design, 348–349
design with Else clause conditions, 352
inferred latch design, 350
Double-balanced mixer (DBM), 781–782
Driving bipolar transistors
and base current, 1051–1052
capacitor for, 1053
PNP transistor, 1054
requirements for, 1051
switching speed, 1053–1054
Driving MOSFETs
bootstrap driver and DC-DC converter, 1057
charactiristics, 1054–1056
high-side switching, 1056–1057
Maxim MAX5048, 1056
D-type flip-flop
with active low reset, 351–352
with not-Q output and active low reset, 352–353
set-up and hold times, 353
Dual-function pins microcontroller analog-to-digital converters, 653–655
Dual-slope converter, 628–629
Dual-trace oscilloscope, 193
DVM. See Digital voltmeter
Dynamic RAM (DRAM), 385
E
Edge-triggered flip-flops, 348
EIA–232F interface
circuits, 470–471
data terminal and communication equipment, 466
electrical characteristics, 467
EIA–422 interface
balanced and terminated design, 469
circuits, 470–471
EIA–485 interface, 471
Electrical equipment, safety hazards
electricity, 1154–1155
fire, 1158–1159
Electrical fundamentals
angle measurment
radian definition, 4–5
sine wave voltage, 4
conductors and insulators, 11–12
derived units, 1–2
electrical quantities, 2
electrical units and symbols, 6
electric field strength, 21
electromagnetism
force between two current-carrying conductors, 23–24
magnetic circuits, 28–30
magnetic fields, 24–27
magnetic field strength, 24–25
magnetic materials, 30–32
electrostatics
electric fields, 19–20
electric field strength, 21
insulating dielectric materials, 21–22
permittivity, 21–22
energy and power, 16–17
exponent notation
definition, 8
multiplication and division, 9
fundamental SI units, 1
multiples and sub-multiples, 7
Ohm’s law, 12–13
resistance and resistivity, 15
voltage and resistance, 12
Electrically erasable programmable read only memories (EEPROMs), 920
Electric field strength, 21
Electrolytic capacitors, 67
Electromagnetism
force between two current-carrying conductors, 23–24
magnetic circuits
leakage flux, 29
magnetic flux, 30
vs. electric circuits, 28–29
magnetic field, 24
surrounding solenoid coil, 27
surrounding straight conductor, 25–26
Electrostatic discharge
gate-oxide breakdown, 1164
generation of, 1164–1165
static protection, 1165–1166
static-safe area layout, 1166
triboelectric charge, 1164
Electrostatics, 18–19
electric fields, 19–20
electric field strength, 21
insulating dielectric materials
with parallel plate, 21–22
properties of, 22
permittivity, 21–22
Elliptical filter, 511
Embedded devices, FPGA
advantages and disadvantages, 954–955
system on a programmable chip, 954
Embedded microcontroller, FPGA
architecture, 982–983
arithmetic and logic unit (ALU), 995–996
and controller block
state_sequence process, 1002–1003
VHDL architecture for, 1000–1001
fetch execute cycle, 985–986
instruction register (IR), 994–995
instruction set, 987–989
machine code instruction set, 989–990
microprocessor
accumulator (ACC) register, 984–985
structural model of, 990–991
program counter (PC), 992–993
RAM memory block, 997–999
register allocation, 986
soft core processors on, 1004
VHDL and processor functions package, 991–992
Emulation, FPGA
hardware boxes, 962
waveform traces, 963
Energy storage
capacitors, 63
inductors, 78
EPLDs. See Erasable programmable logic devices
Equivalent input noise parameters
broadband noise, 595
spot noise, 594
Erasable programmable logic devices (EPLDs)
EPROM type FPGAs, 425
PAL, 421
Ethernet
applications, 474
interface and media, 475–476
Exacto™, 205
Ex-NOR gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 308
truth table, 310
Ex-OR gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 308
truth table, 310
Exponent notation
definition, 8
multiplication and division, 9
F
Fan-Out, logic gate output, 445–446
Ferrite cored inductor, 84
Ferromagnetic RAM (FRAM), 385
Field effect transistor (FET)
CMOS in, 261
construction and operation of, 249–250
gate connection in, 260
junction FET characteristics, 259
MOSFETs in, 260–261
positive and negative excursions, 251
Field programmable gate array (FPGA), 931
and controller block
state_sequence process, 1002–1003
VHDL architecture for, 1000–1001
and embedded microcontroller
architecture, 982–983
arithmetic and logic unit (ALU), 995–996
fetch execute cycle, 985–986
instruction register (IR), 994–995
instruction set, 987–989
machine code instruction set, 989–990
program counter (PC), 992–993
RAM memory block, 997–999
register allocation, 986
structural/behavioral description of, 989
evolution, 932
microprocessor
accumulator (ACC) register, 984–985
structural model of, 990–991
soft core processors on, 1004
VHDL and processor functions package, 991–992
Field programmable gate arrays (FPGAs), 1006
architecture, 947–948
clock circuits, 957
configurable I/O block
pull-up resistors, 952
slew rate control, 951
time issues, 953–954
configurable logic blocks (CLBs)
consists of, 948
interconnect resources, 955
muxes, 949
routing resources, 956
embedded devices, 954–955
EPROM type FPGAs, 425–426
fine grained vs. large grained CLBs, 950
fuse type FPGAs, 427–429
integrated circuit chip design
emulation, 962–963
prototyping, 963
programmable interconnect
interconnect resources, 955
routing resource, 956
programming methods
antifuses, 958–959
flash EPROM bits, 960
SRAM, 957–958
SRAM vs. antifuses, 959–960
reconfigurable computing, 961–962
selection criteria, 964–965
SRAM/MUX type FPGAs, 426–427
types, 947
versatile cells, 425
VHDL issues, 979
vs. CPLDS, 965
Field programmable logic devices
AND-OR architecture devices
fixed AND-programmable OR array, 415–419
programmable AND–fixed OR array, 419–422
programmable AND–programmable OR array, 422–424
schematic diagram of, 415
types of, 414
CAD tools
back annotated delays, 432
front-end and back-end software, 432–433
functional debug test, 433–434
JEDEC file and one-time programmable (OTP)devices, 431
field programmable gate arrays (FPGAs)
EPROM type FPGAs, 425–426
fuse type FPGAs, 427–429
SRAM/MUX type FPGAs, 426–427
versatile cells, 425
Filter capacitor, 1073
FilterLab®, 534–535
Filters
basic low pass filter, 1013–1017
finite impulse response (FIR), 1017–1018
infinite impulse response (IIR), 1018
simple Z-domain low pass, 1008–1013
Finite impulse response (FIR) filters, 1017
design
characteristics of, 497–498
convolution operation, 499
filter coefficients, 498
Fourier series method with windowing, 501
frequency sampling method, 501–502
Parks-McClellan program, 502–506
transfer function, 499–500
windowed-sinc method, 500–501
and IIR filters, 489
implementation in DSP hardware
ADSP–21xx assembly code, 496–497
circular buffer, 494–495
coefficients, 495
subroutine, 497
zero-overhead looping, 496
N-tap FIR filter, 493–494
4-point moving average filter
frequency response, 492–493
general equation of, 490
step function response, 491
theorem of, 493
vs. IIR filters, 513–514
Fixed AND-programmable OR array
Boolean equations, 416
code converter and look-up table, 418
sequence generator and waveform generator, 419
universal combinational logic function, 417–418
Flash analog-to-digital converters, 626
Flash memory, 386
Fletcher-Powell algorithm, 512
Floating current source circuit
configuration, 615
transfer function, 616
Forced air cooling
volumetric flow rate, 1196
vs. thermal resistance, 1195
Fourier series method, 501
Four-stage circulating shift register, 165
FPGAs. See Field programmable gate arrays
FRAM. See Ferromagnetic RAM
Frequency lock loop (FLL) synthesizer, 819
Frequency modulation (FM), 756–757
Frequency sampling method, 501–502
Front-end software, FPGA CAD tools, 432
Full custom design
CAD tools, 413–414
integrated circuits, 413
Full power bandwidth, 636
Functional blocks, 383–384
Functional testing
automatic test equipment, 1169–1170
calibration and set-up adjustments, 1168
disadvantages, 1169
Function generator, 804–806
Fuse characteristics
breaking capacity, 1084
rated current, 1082
time-current characteristics, 1083–1084
Fuse type FPGAs, 427–429
G
Gain enhanced MOSFET (GEMFET), 254
Gain margin (Am), 596–597
GAL. See Generic array logic
Generalized triangle waveform generator, 806
Generators
nonsinusoidal waveform
astable (free-running) circuits, 800–803
Bowes, White or emitter coupled circuit, 803
cross-coupled circuit, 801–802
DAC interpolation and waveform synthesis, 807–808
function generator, 804–806
simple ROM waveform, 806
triangle and universal waveform generator, 805–806
pulse, 800
sine wave
audio-frequency oscillator, 809–815
radio-frequency oscillators, 815–817
Generic array logic (GAL), 421
Gray code, 289–290
Grid-dip meters, 204
H
Half-flash converter, 632–633
Heat path
common application, 1189
IRF640 power MOSFET, 1190
Heat sink
black anodized aluminum, 1194
cooling efficiency, 1194
custom heatsink design, 1193
heat exchanger, 1193
insulating washers, 1199
radiative cooling, 1196
surface preparation, 1198
Heat transfer, 1189
Hexadecimal-binary conversion
conversion procedures, 296–297
position and magnitude, 294–295
High-pass filter
design
first-order high-pass filter, 709–710
higher-order high-pass filters, 713–714
second-order high-pass filter, 710–713
gain response of, 708
High-pass filter design, 507–508
High-side switches, 1054
Hog current. See Power transistors
HP8662A synthesized signal generator, 827
Hybrid (h) parameters
common emitter/collector stages, 243–244
input impedance, 242
transistor model, 243
two-port black box, 240–241
Hysteresis effect, 570
I
IEEE libraries
design automation standards committee (DASC), 971
field programmable gate arrays (FPGA), 973
std_logic
declaration, 972
definition, 973
packages, 972
VHDL logic functions, 973–974
IEEE–488 standard bus, functional testing, 1169
Impedance
in C-R and L-R circuits, 136
definition, 135
in L-C circuits, 138–139
in L-C-R circuits, 140
In-circuit diagnostic tool, 434
In-circuit testability
bed-of-nails test fixture, 1167
electrical test, 1168
Inductance, 77
Inductive reactance
definition, 133
phasor diagram, 133–134
voltage and current waveforms, 134
Inductor-Resistor (I-R) circuits
exponential growth and decay, 121–122
vs. C-R circuits, 120
Inductors, 1130–1131
alternating voltages, 130
color code markings, 81
electrical characteristics of, 74
flux and electro motive force, 76
inductance, 77
physical dimensions of, 79–80
reactance of
definition, 133
phasor diagram, 133–134
voltage and current waveforms, 134
series and parallel combinations of, 81–82
specifications, 80–81
Infinite impulse response (IIR) filters, 1018
biquad filter
Direct Form 1, 508–509
Direct Form 2, 509
design
CAD approach, 512
popular analog filters, 511–512
vs. FIR filters, 513–514
Input and output parameters
current, 1082
efficiency
definition, 1090
sources of power loss, 1091
frequency, 1090
fuse characteristics
breaking capacity, 1084
rated current, 1082
time-current characteristics, 1083–1084
input voltage derivation
power losses, 1094
rectifier configuration, 1093
transformer secondary voltage, 1092
load and line regulation
definition, 1097
load sensing, 1098–1099
thermal regulation, 1098
low-load condition
maximum regulator dissipation and minimum load requirement, 1095
transformer regulation, 1094
power supply transient response
definition, 1101
switch-mode vs. linear power supply, 1102
rectifiers, 1096–1097
reservoir capacitor, 1096
ripple and noise
correct reservoir connection, 1101
definition, 1099
ripple avoidance layout, 1100–1101
switching noise, 1099–1100
switch-on surge
current limiting, 1085–1086
effects on toroidal transformers, 1084–1085
fuse and resettable thermal circuit breaker, 1085
PTC thermistor limiting, 1086
voltage, 1081–1082
waveform distortion and interference
interference, 1087
peak current summation, 1087–1088
power factor correction (PFC), 1088–1089
Input bias current, 585–586
Input capacitance (Ci), 590
Input common voltage, 586–587
Input offset voltage
measurement, 584
voltage adjustment, 585
Input parasitic elements
capacitance and resistance, 590
circuit diagram, 589
Input resistance (ri), 590
Input transducers, 659
Inrush current. See Switch-on surge
Instruction register (IR), 994–995
Instrumentation amplifiers
for A/D converter, 544
circuit setup of, 614
digital filter, 547
poor implementation, 546
Insulated gate field effect transistors (IGFETs), 254
Insulating dielectric materials
with parallel plate, 21–22
properties of, 22
Integrated circuits (ICs). See Digital circuit
masked gate array ASIC, 931
Integrating capacitor (CINT), 537–538
Integrating circuit, 116
Integrating converter. See Dual-slope converter
Integration levels, 273
Internal microcontroller analog-to-digital converters
dual-function pins, 655
PIC167C7xx family, 650–651
reference voltage, 651–652
Intuitive circuit design
complex circuit, 170–171
friction dissipation, 168
induced mass, 168–169
“Lego” engineering, 175–176
physical equivalents, 167
signal analysis, 171–174
spring capacity, 169–170
tank circuit, 170
Inverter oscillator, 913
Inverting AC amplifier, 889–890
Inverting differentiator
noise filter, 901–902
schematic representation, 901
Inverting integrator
drift compensation, 896–897
electronic reset, 898
input current compensation, 895–896
mechanical reset, 897–898
resistive reset, 899
schematic representation, 894–895
Inverting operational amplifier
inverting negative reference, 874–875
inverting positive reference, 876–877
noninverting negative reference, 875–876
noninverting positive reference, 873–874
Iron-cored power transformer, 147
Isolation transformer, 199–200
J
J-K flip-flop, 348
Joint test action group (JTAG)
boundary scan testing, 1170
devices, 1172
Joint Test Action Group (JTAG) interface, 940
Junction depletion FET (JFET), 762
Junction field-effect transistors (JFETs). See Field effect transistor (FET)
input common voltage, 586
input current, 585
vs. BiFET, 259
K
Karnaugh map (K-map), 301
hazard elimination, 339
three-bit straight binary down-counter, 360–361
three-bit straight binary up-counter, 356–357
tristate buffer symbol, 340–341
two-input circuit, 334–335
AND gate, 337
OR gate, 337–338
truth table, 336
Kirchhoff’s laws
current law, 88–89
voltage law, 89–90
L
LAB. See Logic array block
Laplace transform
FIR filters, 500
IIR filters, 511–512
Large signal differential voltage amplification (AVD), 588–589
Lattice filter coefficients estimation, 523
L-C-R circuits
acceptor circuit, 141
impedance vs. frequency, 141–142
phase angle and impedance, 140
rejector circuit, 142
series and parallel resonants, 139–140
LDR. See Light-dependent resistors
Legos®, 175
Level sensitive latches, 348
Light-emitting diodes (LEDs)
indicators, 676–678
optoisolators, 228–229
Line adapters, 208
Linear power supplies, 1072–1074
bridge rectifier, 1072–1073
efficiency, 1091
linear regulator, 1073–1074
output impedance, 1073
supply-frequency ripple, 1099
transformer, 1072
vs. switch-mode power supply, 1102
Linear predictive coding (LPC) model
speech companding system, 521–522
vocal tract model, 521
Linear regulator, 1073–1074
Lithium battery, 1109–1110
Lithium-ion cell
advantages, 1113–1114
charging, 1116
Local oscillator (LO), 778
Logical operators, 302–303
Boolean expressions for, 303–304
circuit symbols, 307
on constants, 304
IEEE/ANSI standard, 308
on variables, 305–306
Logic array block (LAB), 426
Logic decoupling scheme, ICs
capacitors under IC package, 450–451
capacitor type and value, 450
distance, 449–450
low-frequency decoupling, 451
requirements for, 452
Logic gate I/O protection, 461–462
Logic gates, 306
circuit symbols, 307
digital circuits
complementary metal oxide semiconductor (CMOS), 272–273
fabrication processes, 272
IEEE/ANSI standard logic symbols, 308
truth tables
AND, NAND and OR gates, 309
NOR and EX-NOR gates, 310
NOT gate, 311
three-input logic circuit, 314–316
VHDL code, 311–313
Logic integrated circuits
current immunity, 443
decoupling
capacitors under the IC package, 450–451
capacitor type and value, 450
distance, 449–450
low-frequency decoupling, 451
requirements for, 452
driver output characteristics, 445
dynamic loading, 446–447
dynamic noise immunity, 444–445
fan-out, 445–446
ground bounce, 447
induced switching noise, 447–448
interface pull-up resistor, 443–444
noise immunity, 442–443
synchronous switching, 448–449
unused inputs connection, 452–453
Look-up table, 418
Low-dropout voltage regulators, 1094
Low-pass filter
Bessel low-pass filters, 693–694
Butterworth low-pass filter, 691–692
design
first-order low-pass filter, 697–700
second-order low-pass filter, 700–704
first-order passive RC low-pass filter, 686–687
fourth-order passive RC low-pass filter
decoupling amplifiers and, 687
frequency and phase responses of, 688–689
vs. ideal low-pass filter, 690
higher-order low-pass filters, 704–707
quality factor Q, 695–696
transfer function, 696
Tschebyscheff low-pass filter, 691–693
Low-pass filter design, 507–508
M
Macrocells, 425–426
Magnetic circuits
leakage flux, 29
magnetic flux, 30
vs. electric circuits, 28–29
Magnetic field strength, 24–25
Masked gate array ASIC
advantages and disadvantages, 931
architecture, 930
Mask programmable ASICs
full custom design
CAD tools, 413–414
integrated circuits, 413
mask programmable gate arrays
CAD tools, 407–410
channelled array and sea of gates, 404
cost of, 405
multiproject wafer (MPW), 405–406
versatile cell, 403–404
safe design
buffering technique, 401–402
computer aided design (CAD) tools, 403
synchronous techniques, 400–401
standard cell design
CAD tools, 413
libraries, 410–411
NRE costs, 411
Mask programmable gate arrays
CAD tools
back annotation of routing delays, 409
layout simulation, 408
prelayout and postlayout simulation, 408–409
shift register, 409–410
system description, 407
channelled array, 404
cost of, 405
multiproject wafer (MPW), 405–406
sea of gates array, 404
versatile cell, 403–404
Maxim MAX151 interface, 638–640
Maximum output-swing bandwidth (BOM), 596–597
Maximum output voltage swing, 587–588
MCP300X A/D converter, 1137–1138
Memory address register (MAR), 985–986
Memory circuit
in computer architecture, 383–384
data storage, 383
flash, 386
key drivers, 384
RAM, 385–386
ROM, 386–387
Memory data register (MDR), 985–986
Metal-oxide semiconductor field effect transistor (MOSFET). See also Field effect transistors (FET)
advantages, 270
dual-gate MOSFETS, 253
N channel enhancement and depletion MOSFET, 251–252
relay driver, 678–679
secondary breakdown, 269
substrate connection, 251
Microchip, 533–534
Microcontroller systems
AC control
solid-state relays (SSRs) control, 1049–1050
zero crossing switching and SCR, 1049
analog input and output signal, 1041
analog-to-digital converter, 1041
applications, 1020
control program, 1038
control system
on-off control, 1060–1063
PID control, 1066–1069
proportional control, 1063–1065
proportional-integral control, 1069
simulation system block diagram, 1059–1060
digital-to-digital converter, 1041–1042
driving bipolar transistors
and base current, 1051–1052
capacitor for, 1053
PNP transistor, 1054
requirements for, 1051
switching speed, 1053–1054
driving MOSFETs
bootstrap driver and DC-DC converter, 1057
charactiristics, 1054–1056
high-side switching, 1056–1057
Maxim MAX5048, 1056
input and output port signals, 1039–1040
input devices, 1040
interface circuits, 1042
multiple input control and telescope, 1046–1048
output devices, 1042
resistor networks, 1045–1046
resistor voltage divider and limitations, 1057–1058
supply voltage reference, 1043–1045
voltage monitors and supervisory circuits, 1050–1051
Microprocessor interface, analog-to-digital converters
bus relinquish time, 640–642
–BUSY output, 640
data access time, 640
least significant bit (LSB) errors, 643
Maxim MAX151 interface, 638–640
output coding, 637
time delay, 642–643
Microprocessor systems
accumulator (ACC) register, 984–985
applications, 1019
8-bit internal architecture, 1026–1031
bus, types, 1021–1022
central processing unit
components, 1026
functions, 1020
clock circuit
internal and external CPU clock, 1032
waveform, 1031
components, 1020–1021
data representation
binary, denary and hexadecimal, 1022
nibble, 1021
functions, 1026
operations
arithmetic logic unit, 1034–1035
example program and flowchart, 1036–1037
fetch-execute cycle, timing diagram, 1033
input and output, 1035–1036
interrupts, types, 1037
read and write, 1033
serial-to-parallel and parallel-to-serial data conversion, 1036
structural model of, 990–991
VLSI microprocessor chip, 1020
Mixed-signal processing (MSP), 480
Monolithic regulator IC, 1097–1098
Monostable circuits
alternative circuit to, 396–397
use and limitations, 395
Moore and Mealy machines
sequential logic circuit, 345
state machine, 367
state transition diagram, 347
MSP. See Mixed-signal processing
Multiple channel ADCs, 650
Multiple feedback (MFB) topology
band pass filter, 718–719
high-pass filter, 711–712
low-pass filter, 703–704
low-pass filter baising, 737
Multirate filters
decimation factors
concept of, 515
FIR filter, 515–516
interpolation factors
concept and frequency domain effects, 516–517
Murphy’s law, 183–184
MXDEV™, 1137–1138
N
NAND gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 308
Negative feedback
configuration, 564
control equation, 564–565
gain block and feedback gain, 563–564
voltage divider circuit, 565–567
Nickel-Cadmium battery, 232
Nickel metal hydride battery, 1112–1113
Nonelectrolytic capacitors, 67
Noninverting AC amplifier, 890–891
Noninverting integrator
approximation, 900
inverting buffer, 899–900
Noninverting operational amplifier
inverting negative reference, 878
inverting positive reference, 877
noninverting negaitive reference, 878
noninverting positive reference, 879–880
Nonrechargeable batteries. See Primary cells
Non-recurring engineering (NRE), 931
Nonsinusoidal waveform generators
astable (free-running) circuits, 800–803
Bowes, White or emitter coupled circuit, 803
cross-coupled circuit, 801–802
DAC interpolation and waveform synthesis, 807–808
function generator, 804–806
simple ROM waveform, 806
triangle and universal waveform generator, 805–806
Nonvolatile RAM (NVRAM). See Flash memory
NOR gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 307
Norton’s theorem, 103–104
NOT gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 308
NPN transistor
junction transistor, 235–237
low-power relay, 678–679
power transistor, 237
NTC. See Negative temperature coefficient
Number systems, digital circuits
binary coded decimal (BCD) conversion, 290–291
gray code, 289–290
hexadecimal-binary conversion, 294–297
octal-binary conversion, 291–293
signed binary, 284–288
unsigned binary, 280–283
voltage levels, 279
O
Octal-binary conversion
conversion procedure, 292–293
magnitude, 291
One-bit half-adder cell, 325–328
One-time programmable (OTP) devices, 431
One-time programmable PROM cells, 919
On-off control system, 1060–1063
Op amp circuits. See also Amplifiers
constant current source, 914
inverting integrator
drift compensation, 896–897
electronic reset, 898
input current compensation, 895–896
mechanical reset, 897–898
resistive reset, 899
schematic representation, 894–895
inverting summer, 891–892
noninverting summer, 892–893
noninverting summer with buffers, 893–894
oscillators
Bubba oscillator, 908–909
buffered phase shift oscillator, 907–908
classical phase shift oscillator, 906–907
quadrature oscillators, 905–906
triangle oscillator, 909–910
Wien bridge oscillator, 902–905
single-supply op-amp circuit, 871–872
boundary conditions, 873
ideal assumptions, 872
split-supply op-amp circuits
reference voltage input, 869–870
voltage follower, 912
voltage source, 911
Open-loop output impedance, 590
Operational amplifiers (Op amps)
active filters
open-loop gain and filter response, 741–742
single-supply amplifiers, 743
amplification block, 561
block diagram, 559–560
circuits, 571
closed-loop-amplifier circuit, 542–543
CMOS and bipolar amplifiers, 603–604
comparator circuits, 562
current to voltage conversion, 612–613
difference amplifier, 609–611
instrumentation amplifiers, 614
inverting amplifier configuration, 608–609
inverting circuit, 609
modeling of, 599–600
negative feedback, 562–567
noninverting amplifier configuration, 607–608
noninverting circuit, 608
open-loop gain vs. frequency, 541
output of, 561
parameters
electrical tables and data sheets for, 573
frequency characteristics parameters, 596–598
impact on circuit design, 572
parasitic elements, 589–590
pitfalls of, 616–618
positive feedback, 567–571
slew rate, 542–543
stage design of, 600–602
summing amplifiers, 611–612
summing block, 560
transistors and, 562–563
voltage follower amplifier, 604–607
Opto-coupler, interface isolation, 463–464
Optoisolators, 228–229
OR gate
circuit symbol, 307
IEEE/ANSI standard logic symbol, 308
Oscillators
audio-frequency
low-distortion, 814–815
SVF-based, 812–813
Wien bridge configuration, 809–812
Bubba oscillator, 908–909
differentiated positive and integrated negative feedback, 800–804
phase shift oscillator
buffered, 907–908
classical, 906–907
quadrature oscillators, 905–906
radio-frequency
Colpitts, 816–817
relaxation, 800
triangle oscillator, 909–910
voltage-controlled
HP8662A synthesized signal generator, 827
RF signal source purity, 823–824
Wien bridge oscillator
automatic gain control, 904–905
nonlinear feedback, 903–904
Output impedance (Zo), 590–591
Output logic macro cell (OLMC), 421
Oven-controlled crystal oscillators (OCXOs), 792
P
PALs. See Programmable array logic
Parallel resonant circuit, 142
Parallel resonant frequency, 140
Parasitic capacitance, 552
Parks–McClellan program
equiripple FIR filter design, program inputs, 503
frequency and step response, 504–505
impulse response, 506
Remez exchange algorithm, 502–503
69-tap FIR filter and program outputs, 504
Partial odd/even number detector
block diagram, 328–329
circuit schematic diagram, 330–331
CPLD development board and pin assignment, 330–332
truth table, 330
Passive components
capacitors
capacitance, 61–62
charging and discharging, 60–61
color code markings, 68–69
components, 59
energy storage, 63
physical dimensions, 63–64
series and parallel combination of, 70–71
specifications for, 66
types of, 66–67
inductors
color code markings, 81
electrical characteristics of, 74
energy storage, 78
flux and electro motive force, 76
inductance, 77
physical dimensions of, 79–80
series and parallel combinations of, 81–82
specifications, 80–81
light-dependent resistors (LDR), 56
resistors
BS 1852 coding, 47
characteristics and types of, 38–39
color code markings, 42–43
power dissipation, 42
power ratings, 39
series and parallel combinations of, 48–51
voltage vs. current, 36–37
surface mounted components (SMC), 84–87
thermistors
applications, 56
characteristics, 55
variable capacitors, 73–74
variable inductors, 84
variable resistors, 57–58
voltage dependent resistor (VDR), 57
Passive twin-T filter, 725
PCB. See Printed circuit board
Permeability, 30
Permittivity, 21–22
PFC. See Power factor correction
Phase detector
input phase difference, 821–822
output, 820–821
types and working principle, 825–826
Phase lock loop synthesizer
first-order loop, 822
operating principle, 819–820
prescaler ratio, 820
second-order loop filter, 824–825
Phase margin at unity gain (φm), 596–597
Phase modulation, 758–759
Phase shift oscillator
buffered, 907–908
classical, 906–907
Photo-coupler. See Optoisolators
Photosensing circuit, 612–613
PICmicro™ MCU, 1143
PID control, 1066–1069
Place and route software
recursive cut, 978
simulated annealing, 977
PLAs. See Programmable logic arrays
PLD. See Programmable logic device
PN junction diode, 214–215
PNP transistor, 1054
4-Point moving average filter
frequency response, 492–493
general equation of, 490
step function response, 491
theorem of, 493
Positive feedback
block diagram, 567–568
hysteresis effect, 570–571
input and output, 578–579
Positive temperature coefficient (PTC), 51
Positive temperature coefficient (PTC) thermistor, 1086
Potential divider circuit, 94–95
Power and ground traces, PCB, 1119–1121
Power-circuit design
safety margin, 268
transistor matching, 267
Power dissipation, 42
Power factor correction (PFC), 1088–1089
Power losses
high input voltage, 1094
sources of, 1091
Power semiconductor mounting
hardware mounting, 1200–1201
heat sink surface preparation, 1198
insulating washer
for different materials, 1199
interface thermal resistances, 1199–1200
lend bend, 1198–1199
screw mounting methods, 1197
Power supplies
linear type, 1072–1074
specifications, 1078
standard unit
advantages and disadvantages, 1078–1079
costs, 1079
switching type, 1074–1077
voltage requriments, 1071
Power supply rejection ratio (PSRR). See Supply voltage rejection ratio
Power transistors, 227
bipolar transistor
fabrication structures, 264–265
MOSFET role, 269–270
troubleshooting in, 266
characteristics, 265
high temperature in, 263–264
secondary breakdown, 262
Primary cells
alkaline manganese dioxide, 1108–1109
lithium, 1109–1110
silver oxide, 1109
sizes, 1106–1107
zinc air, 1109
Printed circuit board (PCB)
analog and digital design, 1118–1119
anti-aliasing filters, 1149
auto routed, 1135–1136
bypass capacitors, 1148–1149
capacitors, 1123–1124
CMOS input capacitance, 527–528
design checklist, 1150
digital and analog section, 1137–1138
inductors, 1130–1131
layout strategies
SAR A/D converters, 1131–1133
sigma-delta A/D converter, 1133–1135
manual layouts, 1138–1140
power and ground traces, 1119–1121
signal traces, 1147–1148
transmission line techniques, 525–526
Program counter (PC), 992–993
Programmable AND-fixed OR array. See Programmable array logic (PAL)
Programmable AND–programmable OR array, 422–424
Programmable array logic (PAL)
ABEL language, 925–929
architecture, 924
boolean equation and four product terms, 923–924
GAL and OLMC, 421
hardware description languages, 925
hypothetical PAL structure, 419–420
Programmable interconnect, FPGA
interconnect resources, 955
routing resources, 956
Programmable logic arrays (PLAs)
architecture, 922
simple high level languages, 923
Programmable logic device, 276
Programmable read only memorys (PROMs)
burning, 918
combinatorial logic and equivalent PROM, 921
microcode state, 919
PROM-based state machine, 922
reprogrammable PROM cells, 920
transistor and diode-based PROM cell, 919
Proportional-integral control, 1069
Prototyping, FPGA
development of chips and software, 962
loading chip design, 963
PTC. See Positive temperature coefficient
PTC thermistors, 56
P type/intrinsic/N type (PIN) diode, 214
Pull-up resistor interface, 443–444
Pulse generators, 800
Pulse transformers, 465
Push-button switches, 667
Q
Quadrature oscillators, 905–906
Quality factor (Q-factor)
bandpass filter, 715
band-rejection filter, 725
and bandwidth, 143
low-pass filters
gain response, 696
pole quality, 695
parallel resonant circuit, 142
Quiescent current. See Supply current (IDD)
R
Radian, 4–5
Radiation
aluminum foil, 1197
cooling, 1196
Radio-frequency (RF) circuits
amplitude modulation, 753
demodulators
AM and FM, 786
ratio detector, 786
types, 785
frequency modulation, 756–757
linearity
compression and intermodulation, 770
supersonic heterodyne (superhet) receivers, 768
mixers
dual-gate FET, 780–781
first detector, 779
local oscillator, 778–779
single and double-balanced mixer, 781
modulation
characteristics, 757
continuous and medium waves, 753
radio waves, 753–759
single-sideband, 756
types, 754
modulation index, 758–759
oscillators
advantages, 787
automatic level control loop, 792
Clapp (or Gouriet) circuit, 787–789
Colpitts oscillator, 816–817
crystal-controlled computer clock, 791
line stabilized, 790
negative resistance oscillators, 789
oven-controlled crystal, 792
straight receiver and reaction, 794
surface acoustic wave device, 790
temperature-compensated crystal, 792
two-device, 791
types, 788
principles, 758
Radio wave modulations
amplitude modulation, 753
frequency modulation, 756
phase modulation, 758–759
Rail-to-rail input, 587
RAM memory, 997–999
design and connections, 385–386
types, 385
vs. ROM, 386
Reactance, 130
code forms, 386
design and connections, 386–387
Read-write memory (RWM). See Random access memory (RAM)
Real time operating systems (RTOS), 556
Real-world signals
generation of, 480
origins of
signal characteristics, 477–478
units of measurement, 477
processing
analog vs. digital signal, 481–482
methods and technologies, 480
reasons for, 478–479
Rechargeable batteries. See Secondary cells
Recursive all pole lattice filter
estimation of filter coefficients, 523
structure, 522–523
Reference voltage (VREF)
difference amplifier, 611
circuit diagram and configuration, 610
transfer function, 609
voltage shift, 611
instrumentation amplifiers
circuit setup of, 614
transfer function, 615
Register transfer level (RTL) synthesis, 976–977
Relaxation oscillators, 800
Relays and pulse transformers, 465
Reliability
circuit design
components and CECC, 1182
de-rating, 1181–1182
electronic assembly, 1183
factors, 1180
redundancy, 1183–1184
stress screening and burn-in, 1183
temperature, 1180–1181
definitions, 1177–1178
design and development cost, 1179–1180
design faults, 1186
mean time between failures (MTBF)
definition, 1178
disadvantages, 1185
failure rates calculation, 1184–1185
mean time to failures (MTTF), 1178
system availability, 1178–1179
Reluctance, 30
Remez exchange algorithm, 502–503
Reprogrammable PROM cells, 920
Resistance temperature device (RTD), 615
Resistivity, 15
Resistors, 551
BS 1852 coding, 47
characteristics and types of, 38–39
color code markings, 42–43
power dissipation, 42
power ratings, 39
series and parallel combinations of, 48–51
voltage vs. current, 36–37
Resistor voltage divider, 1045–1046
Resonance, 141–142
Resonant air-cored transformer, 150
Resonant frequency, 141–142
RF amplifier
cascode stage
devices, 762
features, 763
common emitter, 761
complementary cascode stage, 763
dual-gate MOSFET, 764
impedance and gain
advantages and disadvantages, 775
AGC application, 775
attenuator, 776
automatic gain control, 773
input and output, 774
lossless feedback, 773
voltage-controlled RF attenuators, 776
junction depletion FET, 762
low-power, 759–762
neutralization
bridge, 765–766
cross-neutralization, 766
noise and dynamic range, 771–773
NPN bipolar transistor, 760
reverse isolation, 763
stability
cascode stage, 762
grounded base configuration, 762–763
neutralization, 765
technique, 765
thermal noise, 771–772
S
Safety
classification, 1155
design methodology, 1156–1158
electricity hazards, 1155
electronic equipment, 1153
equipments, 205
fire hazard, 1158–1159
insulation types, 1156
protection for design
connector arrangement, 1158
creepage and clearance distance, 1157
protective covers, 1156
Safety extra-low voltage (SELV), 1155
Sallen-Key topology
band-pass filter, 717
biasing
high-pass filter, 738
low-pass filter, 736
capacitor values, 741
high-pass filter, 710–711
low-pass filter, 700–702
sensitivity approximations, 739
Sample-and-hold (S/H) circuit
characteristics, 636
input change, 634
operation principle, 635
Sampled data systems (SDS), 1005
SAR. See Successive approximation register
Scan test shift register, 380
Schmidt trigger oscillator, 913
Schmitt trigger gate, 458–459
S-domain equation
bilinear transform, 1006
conversion to Z-domain, 1006–1008
pre-warping technique, 1008
SDS. See Sampled data systems
Secondary breakdown, power transistors, 262
Secondary cells
lead-acid, 1110–1111
lithium-ion, 1113–1114
mechanical design, 1105
nickel-cadmium, 1112
nickel metal hydride, 1112–1113
storage, shelf life and disposal, 1107–1108
types of, 1110
voltage and capacity ratings, 1104
5-second rule, 264
SELV. See Safety extra-low voltage
Semiconductor diode
I/V characteristics, 212
PN junction diode, 214–215
point contact device in, 211
P type-intrinsic-N type (PIN) diode, 214
reversed and forward biased diodes, 213
silicon diodes, 212–213
small-signal Schottky diodes, 215
varactor diode, 213–214
Zener diodes, 215
Semiconductor temperature sensors, 672
Sensors
contactless joystick, 666
driving high-current loads, 678–679
electrical analogy signal, 660
instrumentation and control system, 657–658
LED indicators, 676–679
motors, 681–682
semiconductor temperature sensor, 672–673
snubber circuit with an inductive load, 682–683
solid-state relays (SSRs), 682–683
switches
alternative switch debounce circuits, 670–671
debounce circuit, 669–670
DIL switch, 668
latching action switch, 672
toggle and push-button switches, 667
touch-operated switch, 671
waveform produced by a switch closure, 668–669
temperature and gas sensors, 664–665
threshold detectors
AD590 semiconductor temperature sensor, 676
light-dependent resistor (LDR) vs. photodiodes, 674–675
types of, 662–664
1001 Sequence detector
Boolean logic expression, 375–376
circuit schematic diagram, 376–377
output logic decoding, 376
state encoding, 374
state transition diagram, 373–374
state transition table, 375
Sequence generator, 419
Sequential logic circuits, 271–272
asynchronous sequential logic circuits, 343
counter circuit design
divide-by–5 circuit, 362–365
three-bit straight binary down-counter, 358–361
three-bit straight binary up-counter, 354–358
design
state transition diagram, 345–347
synchronous sequential logic circuits, 343–344
Serial interfaces, analog-to-digital converters
I2C bus, 647–649
proprietary serial interfaces, 649–650
system management bus (SMBus), 649
Series inductance. See Resistors
Series resonant frequency, 140
Servo loop, 584
Settling time (ts) parameter, 598–599
SHARC digital signal processors
series damping resistors for, 528
source termination method, 530–532
SHARC driver, 530
Shift right operator (SRL), 1011
Short-circuit-detector circuit, 202–203
Sigma-delta converter
A/D converter, 1133–1135
disadvantages, 632
high resolution, 630
oversampling of, 629
working principle, 630–631
Signal processing
analog vs. digital signal, 481–482
methods and technologies, 480
reasons for, 478–479
Signal sources
nonsinusoidal waveform generators
astable (free-running) circuits, 800–803
Bowes, White or emitter coupled circuit, 803
cross-coupled circuit, 801–802
DAC interpolation and waveform synthesis, 807–808
function generator, 804–806
simple ROM waveform, 806
triangle and universal waveform generator, 805–806
sine wave generators
audio-frequency oscillators, 809–812
voltage-controlled oscillators
HP8662A synthesized signal generator, 827
RF signal source purity, 823–824
voltage reference IC, 797–800
Signed binary systems
coding schemes, 284
decimal to binary conversion, 286
2′s complement arithmetic operations, 287–288
2′s complement number coding, 285
Silicon diodes, 212–213
Simple amplifier, 255
Simulation Program with Integrated Circuit Emphasis (SPICE)
AC and DC small-signal analysis, 153
astable multivibrator circuit analysis, 154
distortion analysis, 158
high-gain amplifier analysis, 155–156
logic simulation
Class B amplifier, 164
combinational logic circuit, 166
four-stage shift register, 165
netlist and component models, 162–163
noise analysis, 159–160
pole-zero analysis, 157
sensitivity analysis, 159
thermal analysis, 160
Wien bridge oscillator analysis, 161
Sine wave generators
audio-frequency oscillator
low-distortion, 814–815
SVF-based oscillator, 812–813
Wien bridge oscillator, 809–812
radio-frequency oscillators
Colpitts oscillator, 816–817
Single-chip microcomputers, 1020
Single-sideband (SSB) modulation, 756
Single-supply op-amp circuit. See also Amplifiers
boundary conditions, 873
ideal assumptions, 872
schematic representation, 871–872
SIT. See Static induction transistor
Slew rate (SR)
internal compensation capacitor, 592
op-amps, 593–594
Small damping resistors, 528
Small-signal diodes, 213
Small-signal Schottky diodes, 215
Small-signal transistors, 255–256
SMC. See Surface mounted components
Snap-off diodes, 215
Solar cells, 229–231
Solid-state relays (SSRs)
consists of, 1049
control method, 1049–1050
interface circuits, 682–683
vs. conventional relays, 682
SOPC. See System on programmable chip
Source termination method, DSPs
clock distribution method, 530–532
working principle, 529–530
Spartan™-3 FPGA, 386
Spectral inversion method, 507
Spectral reversal method, 507
Spice models, op-amps, 599–600
SPI™ port, 1143
Split-supply op-amp circuits
reference voltage input, 869–870
Spot noise parameter, 594
Squegging oscillator, 815
S-R flip-flop (set-reset flip-flop), 348
S-R latch (set-reset latch), 348
Standard cell design
CAD tools, 413
libraries of, 410–411
NRE costs, 411
Standard product IC
fixed-functionality, 274
memory, 276
processor, 275
programmable logic device (PLD), 276
State machine
defintion, 345
design, 366–367
Moore vs. Mealy machines, 377
1001 sequence detector, 373–377
traffic light sequencer, 368–372
Static CMOS circuits
inverter
circuit schematic diagram, 320–321
one-bit full-adder cell, 326–328
one-bit half-adder cell, 325–326
partial odd/even number detector, 328–332
two-input multiplexer, 323–325
logic gate architecture, 319–320
Static induction transistor (SIT), 759
Static RAM (SRAM), 385–386
Static random access memory (SRAM), 957
mux and transistor routing, 958
reprogrammable, 959
vs. antifuse, 960
Static timing analysis, 978
Std_logic libraries, 972–973
Successive approximation converter, 626–628
Successive approximation register (SAR) A/D converters
block diagram, 1131–1132
pinout for, 1132–1133
power strategy, 1133–1134
Summing amplifiers
circuit diagram, 612
transfer function, 611
Supply current (IDD), 592
Supply voltage rejection ratio (kSVR), 591–592
Surface acoustic wave (SAW) device, 790
Surface mounted components (SMC), 84–87
Surface-mount technology, boundary scan method, 1170
SVF-based oscillators, 812–813
Switchers
DC-to-DC converters, 1075
definition, 1074
design, 1077
load analysis, 1075–1076
Switches
alternative switch debounce circuits, 670–671
debounce circuit, 669–670
DIL switch, 668
latching action switch, 672
toggle and push-button switches, 667
touch-operated switch, 671
waveform produced by a switch closure, 668–669
Switching power supplies. See Switchers
Switch-mode power supply
advantages, 1094
efficiency, 1091
inrush current, 1085
interference, 1087
switching noise, 1099
vs. linear power supply, 1102
Switch-on surge
current limiting, 1085–1086
effects on toroidal transformers, 1084–1085
fuse and resettable thermal circuit breaker, 1085
PTC thermistor limiting, 1086
Synchronous sequential logic circuit, 344–345
frequency lock loop, 819
System management bus (SMBus), 649
System on programmable chip (SOPC), 940
T
129-Tap digital FIR filter, 484
69-Tap FIR filter, 504
Temperature-compensated crystal oscillator (TCXO), 792
Temperature-sensing circuit
integration time, 538
negative temperature coefficient (RNTC), 539
resistor/capacitor (R/C), 537–538
Termination techniques, digital signal processors (DSPs)
end termination method, 528–529
source termination method
clock distribution method, 530–532
working principle, 529–530
Testability
boundary scan methods
boundary-scan cells, 1171
description of, 1170–1172
surface-mount technology, 1170
design techniques
circuit design, 1175–1176
test connections, 1174
devices
designing methods, 1173
Test Access Port, 1172–1173
functional
automatic test equipment, 1169
test procedures, 1168–1169
in-circuit testing, 1167–1168
Test access port (TAP), 1172
Test benches. See VHDL model
advantages, 969
aspects, 971
circuit under test (CUT), 969
goals, 967–968
instantiating components, 968–969
stimuli addition, 970
T-flip-flop (toggle flip-flop), 348
Thermal capacity
electrical analog circuit, 1191
properties of metals, 1191–1192
Thermal management
heat sinks
black anodized aluminum, 1194
cooling efficiency vs. altitude, 1194
custom design, 1193
forced air cooling, 1195–1196
heat exchanger, 1193
radiative cooling, 1196–1197
volumetric flow rate, 1196
power semiconductor mounting
heatsink surface preparation, 1198
insulating washer, 1199
lead bend, 1198–1199
mounting hardware, 1200–1201
placement and layout, 1201–1202
using thermal resistance
ambient temperature range, 1188
heat path partition, 1189–1190
heat transfer mechanism, 1187
power devices, characteristics of, 1192
properties of common metals, 1191
thermal and electrical equivalences, 1188
thermal capacity, 1190–1193
Thermal resistance
heatsinking, 1188
heat transfer, 1189
mechanism of, 1187
vs. air velocity, 1195
Thermistors
application of, 56
characterisctics of, 55
Thermocouple amplifier, 206
Thermocouple-based thermometer, 207
Thermocouples, 672–673
Thévenin theorem, 100
Thompson filter. See Bessel filter
Three-bit straight binary down-counter
Boolean logic expression, 360–361
state encoding, 359
state transition diagram, 358–359
state transition table, 360
Xilinx ISE™ schematic diagram, 361
Three-bit straight binary up-counter
Boolean logic expression, 355–357
state encoding and transition table, 355–356
state transition diagram, 354–355
Toggle switches, 667
Toroidal transformer, 150
Tracking analog-to-digital converters, 624–626
Traffic light sequencer
Boolean logic expression, 370–371
circuit schematic diagram, 372
output logic decoding, 371
state and transition table encoding, 369–370
state transition diagram, 368–369
Transconductance, 158
Transfer function, 544–545
difference amplifier, 609
floating current source circuit, 616
instrumentation amplifiers, 615
summing amplifiers, 611
Transformers
electrical characteristics of, 145
iron-cored power transformer, 147
principle of, 148–149
resonant air-cored transformer, 150
types of, 146
Transimpedance, 158
Transistor, associated problems
electrostatic discharge (ESD) damage, 256–257
simple amplifier, 255
VBE and current misconceptions, 257
zener diodes, 256
Transistor-transistor logic (TTL) digital logic IC, 271
Transmission line techniques, 525–526
Triangle oscillator, 909–910
Troubleshooting
analog circuits, 177–178
artificial intelligence, 189
clue recognition, 180–181
computer for replacement, 189–191
equipments for
analog-storage oscilloscope, 194
auxiliary meters, 197
digital voltmeter (DVM), 194–196
dual-trace oscilloscope, 193
grid-dip meters, 204
isolation and variable transformer, 199–200
line adapters, 208
safety equipment, 205
short-circuit-detector circuit, 202–203
thermocouple amplifier, 206
thermocouple-based thermometer, 207
experts advice, 179–180
failure analysis, 186–187
general-purpose test equipment, 178
methodical and logical plans, 182–183
Murphy’s law, 183–184
‘no problem’ attitude, 191–192
sloppy documentation, 186
teething troubles, 179
telephonic, 188–189
Truth tables, 308
AND, NAND and OR gates, 309
BUFFER and NOT gate, 311
NOR and EX-NOR gates, 310
1001 sequence detector, 376
three divide-by–5 circuit, 366
three-input logic circuit, 314–316
traffic light controller, 371
VHDL code, 311–313
Tschebyscheff filters
coefficients
0.5-dB passband ripple, 747
1-dB passband ripple, 748
2-dB passband ripple, 749
3-dB passband ripple, 750
low-pass filters
applications, 693
gain responses, 691–692
quality factor Q, 695
second order coefficients, 703
Twin-T filter
active and passive, 725–726
filter parameters, 726–727
Two-input multiplexer
circuit symbol, 323–324
discrete logic gates, 325
truth table, 324
U
Unity-gain bandwidth (B1), 596
Universal combinational logic function, 417–418
Universal serial bus (USB)
applications, 472–473
automatic dynamic mode, 473
Universal waveform generator, 806
Unsigned binary systems
conversion procedure, 282–283
magnitude, 281
USA Department of Defense, 434
V
Varactor diode, 213–214
Variable autotransformer, 199
Variable capacitors, 73–74
Variable inductors, 84
Variable resistors, 57–58
Variac™, 199
Varicap diode, 213–214
VDR. See Voltage dependent resistor
Very high-frequency (VHF) band, 756
Very high scale integrated circuits (VHSIC), 434
Very large scale integrated (VLSI) devices, 1019
VHDL (VHSIC hardware description language)
ASIC design problems, 435
2-to–1 multiplexer
behavioral code, 435–436
structure code, 436–437
source code, 435
VHDL model
issues for FPGA, 979
logic functions, 973
two input AND gate, 968
VHSIC. See Very high scale integrated circuits
Viewdraw software package, 433–434
Viewlogic software, 433–434
Viewsim functional simulation, 433–434
Voltage-controlled oscillators (VCO), 817–818
HP8662A synthesized signal generator, 827
phase detector
input phase difference, 821–822
output, 820–821
types and working principle, 825–826
phase lock loop synthesizer
first-order loop, 822
operating principle, 819–820
prescaler ratio, 820
second-order loop filter, 824–825
RF signal source purity, 823–824
Voltage dependent resistor (VDR), 57
Voltage follower, 912–913
Voltage follower amplifier
analog gain, 605
features, 606–607
Voltage gain, 258
Voltage reference IC, 797–800
W
Watchdog timer (WDT), 548
Waveform generator, 419
Waveform generators
audio-frequency oscillator, 809–815
function generators, 804–806
nonsinusoidal, 800–808
radio-frequency oscillators, 815–817
simple ROM, 806
Waveshaping circuits
differentiating circuit, 117
integrating circuit, 116
Wheatstone bridge sensor, 545
automatic gain control, 904–905
nonlinear feedback, 903–904
Wien-Robinson filter
active and pasive, 727–729
design procedure and filter parameters, 728
Windowed-sinc method, 500–501
X
Xilinx®, 386
Z
Z-domain functions
division model
logical shift right operator (SRL), 1011
for scaling numbers, 1011
test circuit, 1012
gain block
architecture, 1009
testbench, 1009
implementation in VHDL, 1008–1013
sum and difference models, 1010–1011
unit delay model, 1013
power transistor, 227
transient-voltage suppressors, 226
zener zapping technique, 227–228
Zero crossing switching, 1049
Zinc air battery, 1109
Zinc-silver oxide cells, 1109
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