Chapter 4. Basic Processor Configurability

They always say time changes things, but you actually have to change them yourself.

—Andy Warhol

Processor configuration is a new concept to most SOC designers. For decades, the industry has worked with fixed-ISA (instruction-set architecture) processors and the idea that processors can be tailored to specific tasks is rather novel. Tensilica has developed a processor-configuration design flow that allows SOC developers to enhance the 32-bit Xtensa processor’s ISA (instructions, register files, and registers) so that the processor executes a specific algorithm or set of algorithms faster. This approach results in a processor that executes the target task in fewer cycles. Reducing the required number of execution cycles eases the need for high processor clock rates and thus drops SOC operating power. The process of configuring an Xtensa processor closely resembles the now-common practice of optimizing performance through manual translation of critical routines from C to assembly language, so the specifics of the design flow may be different but the concept is somewhat familiar to any experienced system-development team.