15.1 Description of Technology

General packaging trends require wafer‐level chip‐scale packages (WLCSP) and fan‐out wafer‐level packaging (FO‐WLP), often referred to as embedded wafer‐level BGA (eWLB) packages, to cope with increasing functionality (e.g. higher number of inputs and outputs [I/Os]), larger and thinner package sizes, thermal and electrical performance, and lower cost of ownership combined with more demanding reliability requirements. Enhanced photosensitive dielectric materials are key building blocks to address the improved functionality and reliability expectations of these advanced packages. This chapter will focus on the development and the integration flow of low temperature photosensitive materials, providing FO‐WLP packages the enhanced functional requirements.

A wide range of chemical polymer platforms like epoxies, acrylates, phenolic‐based resins, benzocyclobutenes (BCB), silicones, fluorinated polymers, polyimides (PI), and polybenzoxazoles (PBO) are available for integration as dielectric materials in wafer‐level packages. Table 15.1 provides a limited overview of the chemical platforms and their key material properties applicable to WLCSP.

Polymer	Epoxy	BCB	PI	PBO
Chemical structure
Type	Thermoset	Thermoset	Thermoplastic	Thermoplastic
Imaging tone	Negative tone	Negative tone	Negative tone	Positive tone
Mechanical properties	+	+	+++	+++
Electrical properties	++	+++	++	++
Chemical compatibility	+	+	+++	++
Adhesion strength (DI/DI or DI/Cu)	++	+	+++	++

Generally PI and PBO materials outperform the other chemical platforms in various material properties, especially in terms of mechanical and thermal properties. However these properties are typically obtained after high temperature cure conditions in the range of 350–380 °C. Among the various FO‐WLP technologies, the “chip‐first” approach constitutes a prominent group. Chip‐first refers to the process where the chip is placed with the device side facing down on a temporary substrate or carrier prior to building the package around it. In this chip‐first FO‐WLP process flow, the chip is embedded in an epoxy mold compound (EMC), which limits the thermal budget to cure temperatures below 250 °C. The EMC has a typical glass transition temperature (T_g) below 200 °C, and the change in thermal expansion coefficient results in an unpredictable wafer warpage when heated above 200 °C. To a lesser extent, the EMC may also start to degrade at higher temperatures, even under inert atmosphere (e.g. N₂).

The first generation of eWLB packages typically integrated epoxy as dielectric material because these materials are cured at low temperatures in the range of 200 °C [1]. To enable higher reliability performance of eWLB packages, dielectric materials with improved mechanical properties, higher decomposition temperatures, and improved chemical resistance are required while maintaining the low temperature bake step. In addition these new dielectric products need to comply with the ever more stringent environmental and safety legislations like RoHS and REACH directives and with the extensive lists of banned components from IDMs.

From the various chemical platforms, PI or PBO materials are in the best position to meet these enabling requirements if their cure temperature can be reduced below 220 °C and if the outstanding material properties are preserved when cured at these low temperatures. Whether the integration scheme is a chip‐first or a chip‐last (more commonly referred to as redistribution layer first [RDL‐first]) approach has no impact on the material challenges for these dielectrics, although the latter scheme does not strictly require a low temperature cure dielectric. In the RDL‐first approach, like the SWIFT® package from Amkor, the high density RDL is built up on a carrier platform using conventional WLP technology, followed by die bonding and encapsulation [2].

The nonstandardized carrier sizes and dimensions also introduce a variety in coating technologies for the advanced dielectric material like spin coating, slot die/slit coating, or even dry film lamination. The next section will discuss a possible product development pathway to obtain low temperature cure PI materials with enabling material properties.

15.2 Material Challenges for FO‐WLP

The dielectric material is a major component of FO‐WLP packages and has therefore a large influence on the final package reliability performance. Current FO‐WLP packages that are manufactured in high volume typically use two dielectric layers and one copper redistribution layer (Cu RDL) with a cured film thickness between 5 and 12 μm. Advanced FO‐WLP packages may apply up to four dielectric layers or even dual side redistribution for three‐dimensional (3D) package‐on‐package (PoP) stacking.

The key material requirements for these enabling photosensitive dielectric materials are:

• Outstanding mechanical properties: Young’s modulus >2 GPa, ultimate tensile strength >150 MPa, and elongation at break >30%.
• Thermal material properties:
  • Glass transition temperature at approximately or above the solder ball reflow temperature.
  • Coefficient of thermal expansion (CTE) below <65 ppm °C⁻¹ to minimize warpage.
  • Decomposition temperature >400 °C.
• High chemical resistance against solvents, acids, bases, and solder fluxes.
• Good adhesion to copper and no copper migration during reliability tests.
• Low film shrink upon cure to reduce wafer warpage.
• Final cure temperature below 220 °C and target cure temperature below 200 °C.
• Limited outgassing above 300 °C.
• Lithographic performance:
  • High via resolution, high cured aspect ratio, high photospeed, robust process window, and sloped profile.
• Good electrical properties: low dielectric constant and dissipation factor over frequency range from several kHz up to hundreds of GHz.
• Compliance with current environmental, health, and safety (EHS) legislations (RoHS, REACH, etc.).

These material challenges are similar for both chip‐first and chip‐last approaches though the former additionally requires a higher planarization capability to cope with the typically higher topography during copper wiring and the associated chip‐to‐epoxy height offset. Chip‐to‐epoxy height offset is the typical protrusion of the chip above the EMC, introducing additional topography as shown in the schematic in Table 15.2. Chip‐to‐epoxy height offset is inherent to chip‐first technologies because the die are placed active side down onto double‐sided adhesive tape and then molded.

	FO‐WLP process
	Chip‐first approach	RDL‐first Chip‐last approach
Chip‐to‐epoxy height offset Dielectric needs to smooth out the topography
Degree of planarization required	High	Moderate
Coating technology	Spin coating Slot die/slit coating	Slot die/slit coating Spin coating Dry film lamination

Despite other rather obvious but nevertheless challenging constraints such as cost, purity, and stability, the chemical platform is preferably adjustable to various coating technologies used in the FO‐WLP process flows as shown in Table 15.2.

15.3 Material Overview

Several semiconductor polymer platforms were developed for RDL applications. Materials based on epoxy, phenolic, and BCB resins can commonly be classified as thermoset materials, while PBO‐ and PI‐based materials are usually classified as thermoplastic materials.

Thermoset polymers are supplied as a so‐called precursor consisting of a relatively short length polymer with reactive groups in an organic casting solvent. The polymerization, which happens after the lithographic patterning process, takes place during a thermal bake step, the so‐called cure, where the reactive groups are activated and form irreversible bonds. In this step the prepolymer is chemically transformed into a cross‐linked 3D polymer network, which fixes the polymer chains in a certain position (“setting”) and provides the isotropic dielectric behavior. The glass transition temperature (and many of the other material properties) will not only depend on the structure of the polymer but to a large extent also on the degree of cross‐linking. For example, highly cross‐linked thermosets will be difficult to deform under an external stress, even above their T_g, resulting in a rather low elongation at break. On the other hand, PI and PBO materials are mostly thermoplastic materials. Thermoplastic materials are typically long‐chain polymers that are reversibly deformable above a certain temperature. Not restrained by cross‐links, this type of polymer generally shows a significantly higher elongation at break, which is an important contributor for the package reliability [3]. Table 15.3 provides the main characteristics of a thermoset versus a thermoplastic polymer.

	Thermoplastic polymer	Thermoset polymer
Under mechanical stress
Advantages	High elongation at break Retains properties when heated above Tg	Low cure temperature High Tg
Disadvantages	Higher cure temperature	Low elongation at break Mechanical properties degrade when heated above Tg (less suitable for multiple heating cycles)

A PI polymer consists of a repeating [R–CO–N–CO–R] unit group typically with a molecular weight (MW) in the range of 20–100 K (Da). The MW and polydispersity index can be measured by gel permeation chromatography [4]. The presence of strong polar bonds and the fact that the lone electron pair on the nitrogen is conjugated with the carbonyl group (C=O) enable strong interchain dipolar and π–π interactions, making PI resistant to chemical agents and moisture attack during reliability stressing. The type of hydrocarbon units (R as aliphatic or aromatic) and the presence of other functional groups (Cl, F, NO₂, OCH₃) will further influence the material properties including its mechanical properties and consequently their final application.

In the case of PI and PBO, the long polymer chain length will have a very low solubility due to the high MW and the strong interchain interactions (dipolar and π–π). However, for coating processes (e.g. spin coating), the polymer needs to be available as a solution. Therefore a precursor polymer is typically used that is chemically converted (ring cyclization) to the final PI or PBO polymer structure during the cure step after the coating and lithography steps.

In order to render the precursor polymer photosensitive, further modifications are required to the polymer structure by attaching reactive groups that allow a change in polymer solubility (by cross‐linking or a polarity change) upon reaction with an activated photoinitiator.

In the following sections, we will mainly focus on the PI chemical platform for low temperature cure dielectrics for advanced FO‐WLP packages. A photosensitive PI precursor is generally prepared by the chemical reaction of an aromatic/aliphatic diamine with an aromatic/aliphatic dianhydride or multicarboxylic acid/ester in a dipolar aprotic solvent (see Figure 15.1). The polyamic acid or ester precursor is formed by the nucleophilic attack of the amino group on the carbonyl carbon of the anhydride unit.

A subtle variance in the selection of the diamine and dianhydride monomer structure will have a large effect on the mechanical and other material properties of the final PI. The selected monomers’ rigidity, overview given in Figure 15.2, will determine the final polymer morphology, either like a rigid rod or a flexible spaghetti as schematically presented in Figure 15.3. A rigid polymer backbone requires a significantly higher cure temperature to obtain the same level of imidization as a flexible polymer backbone because sterically it becomes increasingly difficult for the functional groups to react and cyclize. On the other hand, a rigid polymer backbone will usually exhibit outstanding mechanical properties compared with the flexible polymers. Enabling dielectric materials therefore requires a delicate balance between rigidity and flexibility and thus between lower cure temperature and improved physical properties as shown in Figure 15.4. A semirigid polymer backbone is therefore beneficial and is commonly used in low temperature cure PI materials.

After lithographic patterning of the PI precursor, the PI film will be thermally heated or baked. High thermal activation energy is required for the nucleophilic ring closure. Depending on the rigidity of the polymer backbone, a cure temperature of 350 °C or even higher will be required to complete ring cyclization or “imidization.”

To achieve a low temperature cure PI, ways need to be found to force the ring closure at a much lower temperature. Several possibilities have been proposed in the literature and applied in industry. First of all, different curing techniques have been suggested to reduce the cure temperature such as microwave irradiation [5]. This approach however requires new, specialized equipment while most assembly lines prefer to utilize their existing infrastructure of thermal cure ovens. Another development path is to incorporate pre‐imidized PI units into the polymer backbone to avoid the need for an imidization reaction [6]. The strong interchain interactions and close stacking between the polymer chains are loosened by introducing bulky units in or on the backbone to keep the polymer soluble.

An obvious and important way that was mentioned earlier is by optimizing the flexibility of the backbone to facilitate imidization at lower cure temperature. Chemical catalysis is another customer‐friendly approach to lower the activation energy enhancing the imide ring closure. A chemical catalyst is typically an acid or a base that is thermally activated at the beginning of the cure cycle and significantly lowers the final cure temperature. The required activation energy needed to transform the polyamic ester into the cyclic imide as a function of polymer backbone rigidity and chemical catalysis is schematically presented in Figure 15.5.

Fourier transform infrared spectroscopy (FTIR) is a practical tool to determine and track the chemical composition and changes in a material. In FTIR, the sample is exposed to infrared (IR) light, and the transmitted or reflected light is measured. If the IR wavelength matches the energy of a chemical bond (and the bond has a net dipole), that bond will absorb the IR light. Chemical changes can thus be tracked by following the absorption changes of the characteristic bonds under study. In this case, for example, the degree of imidization as a function of the cure temperature can be determined by investigation of the imide peaks of the spectra at different cure temperatures. Figure 15.6 illustrates the changes in absorption peaks for a dedicated design of polymer backbone and cure catalyst, resulting in a fully imidized PI at 200 °C cure temperature. The degree of imidization of the enabled PI as a function of the cure temperature is given in Figure 15.7. Consequently, enabled PI platforms are suitable for low or extreme temperature cure applications similar to epoxy, acrylate, or BCB materials.

15.4 Process Flow

The integration of low temperature cure PI in an FO‐WLP production process flow with either chip‐first approach or RDL‐first approach requires some process optimization in the coating, exposure, development, and cure process steps. Figure 15.8 provides the generic process steps. For photosensitive materials, the imaging type (positive/negative) is a consequence of the chemical system and an important aspect in a lithographic process: a positive tone material will become soluble in developer upon light exposure, while a negative tone material will become insoluble in developer upon light exposure (thus generative of the opposite image of the mask). Low temperature cure photosensitive polyimide (PS‐PI) materials are typically negative tone PI, while low temperature cure materials like PBO, epoxy, or BCB can be either positive or negative tone (see Figure 15.9). The negative tone PI materials generally use an organic solvent system for development, while the positive tone materials use an aqueous solution of tetramethylammonium hydroxide (TMAH) as developer.

The lithographic process of a low cure PS‐PI starts with substrate preparation, which is important to remove organic contamination from the surfaces and bring the substrate surface into the preferred chemical state to enhance the chemical interaction (i.e. adhesion) between substrate and PI material. The material (viscous liquid) is then applied onto the substrate by a spin‐coating process followed by a soft bake process to partially remove the solvent. After determination of the film thickness as a function of coating and bake conditions, the optimum spin‐speed and spin‐time conditions are selected to achieve good topography coverage with high wafer uniformity over a large soft bake temperature range (±10 °C) to compensate for possible reconstituted substrate warpage. These coated substrates then head for exposure. The lithographic recipes to define the minimum resolution capability are defined by setting up a standard focus exposure matrix (FEM), followed by optical inspection. Good resolution of round vias can be obtained with dimensions between 5 and 25 μm in a 12 μm thick soft baked film (see Figure 15.10) [1]. The exposure process conditions indicate large process latitude as demonstrated by the Bossung plot in Figure 15.11 with the (220 mJ cm⁻²) line as the best isofocal dose [1]. A linearity check is performed under the best process conditions to determine the mask bias between dimension on mask (DOM) and dimension on substrate (DOS).

After exposure and post‐exposure delay or post‐exposure bake, the exposed substrates are transferred to a developer module where an organic solvent system is used to develop the low temperature cure PI. An atomized spray or a multiple spray and puddle development process is applicable although the former process provides the highest resolution with minimum footing. The development time is not only a function of the soft baked film thickness but also of the soft bake temperature and time influence in a second‐order bulk PI dissolution speed. Cyclopentanone and propylene glycol monomethyl ether acetate (PGMEA) are typically the developer and rinse system for low temperature cure PI systems. After development a post‐development bake at 100 °C is optional to remove the excess of developer from the film.

The final cure process is performed in a furnace or oven during which the polymer will convert to the final PI. The imidization reaction is a polycondensation reaction with the formation of light alcohol components. These by‐products are removed together with any residual casting solvent by gentle nitrogen (N₂) purge in the oven. The oxygen (O₂) level in the oven and the N₂ carrier gas need to be as low as possible and preferably below 100 ppm. Higher oxygen levels in the furnace can oxidize the dielectric material, potentially resulting in reduced mechanical properties, and a darker PI film will be observed. During this final cure, the strong adhesion reaction of the PI film to the underlying substrates like EMC, copper RDL lines, cured PI film, or aluminum bond pads is established. The final shrinkage from an exposed soft baked film to cured film for a cure temperature <250 °C is less than 25%, generating a low residual stress film.

A descum process is finally performed to remove some residual PI (“footing”) in the small feature sizes. These PI residues are caused by UV light reflection during exposure on reflective areas of the substrate (e.g. aluminum bond pads). This footing extends 1–3 μm into the opening and reduces the available area for electrical contact. A reactive ion etching (RIE) reactor is used for an O₂‐anisotropic descum process, which removes the residues and increases via opening diameter and profiles. Then, the plasma removes any residual adhesion promoter of the PI formulation and cleans the metal pads’ surface, enabling a low contact resistance with the metal RDL (Figure 15.12).

15.5 Material Properties

Low temperature cure PIs have been successfully integrated in FO‐WLP high volume production process flows, mainly in the chip‐first approach, but also in fewer cases in the RDL‐first approach. The general process flow for the integration of photosensitive low temperature cure PI in the FO‐WLP process is given in Figure 15.13. Typically, two dielectric layers are used for FO‐WLP packages, but advanced applications require up to four RDL dielectric layers or even redistribution layers on both sides of the package.

The high level FO‐WLP process flow is very similar for the different dielectric material classes. An advantage of the low temperature cure PI is the limited outgassing level after final cure. This is important for the copper plating seed layer deposition process: during physical vapor deposition (PVD), the substrates can heat up significantly, and extensive outgassing could contaminate the substrate surfaces, potentially leading to reduced adhesion and delamination. Thermogravimetric analyses (TGA) show a 2 and 5 wt% loss temperature, respectively, above 300 and 340 °C for a cured PI film cured at 230 °C and even a decomposition temperature above 500 °C (Figure 15.14). This reduced outgassing of the dielectric material during PVD will improve the seed and dielectric layer adhesion strength and reduce the risk of delamination. The high 2 and 5 wt% loss temperatures also favor shortening the outgassing time during the PVD seed layer sputter process, which allows for faster cycle times.

Regarding film deposition techniques, low temperature cure PI chemical platforms require relatively little adjustment to cover both liquid spin‐coating processes and slot die/slit coating processes. The viscosity value usually needs to be tuned with additional casting solvents and wetting additives for improved flowability. Also the soft bake temperature profile normally requires some optimization for gentle outgassing of the abundant casting solvent to avoid possible voids or defects in the soft baked film.

The commonly used WLP exposure tools (e.g. Ultratech AP300, Canon FPA‐5500 series, Rudolph Instruments JetStep series, SÜSS MicroTec MA300) are also suitable for the patterning of the low temperature cure PI. Broadband (BB) exposure is used for the larger feature sizes with high wafer throughput, while i‐line exposure is typically used for the finer via structures in the first RDL dielectric layer. Besides stepper or mask aligner exposure, these dielectric materials are also suitable for laser direct imaging processing. Laser light (from a YAG solid‐state laser with a wavelength of 355 or 405 nm) can expose and pattern the soft baked film. A variety of development equipment and furnaces have been successfully applied for the low temperature cure PI.

Easy integration of a dielectric material in the FO‐WLP process flows requires outstanding material compatibility with acids, bases, and solvents that are used in various process steps (e.g. plating, seed etch, etc.). In order to evaluate chemical compatibility, a common method is to prepare coupons of, e.g. a Si wafer coated with the material of interest and place these coupons in a wide range of chemicals (solvents, strippers, acids, bases) for a certain time and at a certain temperature (often elevated). The coupons are then inspected for changes like discoloration, delamination, cracks, etc., and the film thickness (change) is determined. To make the test even more realistic, the dielectric film is usually patterned with dense feature sizes as this creates stress points and allows easier ingression (swelling or dissolving) of the chemicals into the dielectric material film.

Low temperature cure PI materials developed by Fujifilm Electronic Materials named LTC 9300 E07 and E67 have been tested in this way and do not show any discoloration, delamination, or cracks around the features. Also the film thickness change stays less than 1.5%. Figure 15.15 shows these results for a rather aggressive stripper based on a mixture of amines and dimethyl sulfoxide (DMSO). The outstanding chemical resistance is a consequence of the strong PI interchain interactions (dipolar and π–π), which lead to a close stacking and packing of the PI polymer backbones, thereby hindering penetration of solvent molecules into the dielectric.

A key set of material properties for a dielectric material are the mechanical properties. Young’s modulus (E), ultimate tensile strength (UTS), and elongation at break are determined by tensile testing. In a tensile test, a freestanding film specimen of the material under study is clamped and pulled while measuring the extension and applied force from which the parameters mentioned above can be determined. The freestanding film specimen is typically prepared by coating and curing a dielectric film on a wafer with a sacrificial layer like SiO₂, TiW, or copper. After cure, the wafer is placed in an etchant to remove the sacrificial layer, thereby releasing the dielectric film from the substrate. The film can then be cut in test strips of the desired size. Alternatively for a photosensitive dielectric, strips (straight or dog bone shaped) can be patterned lithographically in the film, which usually leads to better test results as the edges are smoother compared with a cut film (microscopic tears are stress points where the specimen can break prematurely, leading to low repeatable results). These sample preparation methods allow easy evaluation of various process parameters of the cure such as ramp‐up rate, final cure temperature and time, and the cool‐down rate.

Tensile tests are typically performed at room temperature (25 °C) but can also be done at reduced temperature (−55 °C) with special accessories to simulate the material behavior during thermal cycling test (TCT). Figure 15.16 shows the stress–strain cure of a low temperature cure PI material (LTC 9300 series cured at 230 °C) at room temperature and at −55 °C.

Other important material properties like glass transition temperature (T_g) and CTE are measured by dynamic mechanical analysis (DMA) and thermomechanical analysis (TMA) (see Figure 15.17). The glass transition temperature is the temperature (range) at which the material (reversibly) transitions from a glassy (hard) to a rubbery (soft) state (related to motion of segments of the polymer backbone), while the CTE is quite simply the rate of change in dimensions as temperature changes.

In TMA the elongation of a film specimen is measured while a certain force is applied, and the temperature is gradually changed. At T_g, the elongation will rapidly increase as the material changes to a rubbery state, so from this measurement, both the CTE and T_g can be determined.

DMA is quite similar in setup, but instead of applying a stationary force, the external force is oscillated, and the material response is recorded while temperature changes. When the material under study changes to a rubbery state, the response will change in amplitude and frequency from which the modulus (loss and storage) and the loss tangent δ can be calculated. Again the temperature at which this change occurs is indicative of the glass transition.

As the (low temperature cure) dielectric material serves a specific function in the final FO‐WLP package where it is subjected to electrical fields, the electrical material properties are also of key importance. These electrical properties need to be characterized over a wide frequency range since device applications range from DC to EHF. Several electrical measurement techniques are needed to cover the frequency range of interest from several kHz to hundreds of GHz. Mercury probe analysis is commonly used at low frequency from 3 kHz up to 3 MHz. Transmission line models in combination with a vector network analyzer (VNA) are used for medium frequency ranges from several MHz up to 3 GHz, while ring resonator models allow measurement of high frequencies ranging from 3 up to 110 GHz [7].

These techniques have been applied to Fujifilm’s low temperature cure dielectric material, and Figure 15.18 summarizes the results.

The dielectric constant of low temperature cure PI varies from 3.4 to 2.95 over the full frequency range, and the dissipation factor is below 0.01. The decreasing dielectric constant with increasing frequency is attributed to reduced polarization of polarizable groups and dipoles (permanent and nonpermanent) on the PI backbone as these can no longer follow the rapidly changing electric field at these high frequencies.

If the electrical measurement setup is mounted inside an environmental chamber, the influence of temperature and humidity can be investigated. The electrical characterization as a function of temperature (−40 to 125 °C) reveals that the temperature has little impact on the electrical parameters for low temperature cure PI. The hygroscopic nature of PI increases the dielectric constant by 20% under high (80% relative humidity [RH]) humidity conditions [8].

As a summary of the material parameters described above, Table 15.4 provides an overview of low temperature cure PI in comparison with other commercially available low temperature cure materials.

Last, but certainly not least, is the adhesion of dielectric materials: considering the complexity and the multitude of materials and layers in WLP packages, strong adhesion of the dielectric material is critical for achieving outstanding device reliability.

PIs in general have good intrinsic adhesion properties due to the high amount of dipoles on their backbone, which can interact with other materials or substrates. An oxide‐ or hydroxyl‐terminated surface will therefore enhance the adhesion of PI. Other substrates (e.g. metals) might require a treatment (dehydration bake, plasma treatment, primer) to achieve the required adhesion level. Most low temperature cure PI formulations are also optimized with dedicated adhesion promoters to improve the chemical interaction between organic and metallic substrates.

To evaluate adhesion, many test methods are available as many of these have been developed by the paint industry. A very common method is the tape test where an adhesive tape is applied to the coated substrate and removed. If the film stays on the substrate, the adhesive force is larger than that of the tape. To improve the sensitivity of this method, often a crosscut is made in the film, or in the case of photosensitive materials, a checkerboard pattern is printed as delamination is often initiated at the edges. Counting the number of lifted fields from the checkerboard also provides a way to semiquantitatively judge adhesion quality.

Another test method is the scratch method whereby a stylus is moved over a coated surface, and the force is gradually increased. The force at which a scratch or some sort of damage occurs is indicative of the adhesion toward the substrate.

Pull or peel off tests are also not uncommon: a loose piece of the coating or a metal stud that is glued to the coating is pulled perpendicular to the substrate, and the force at which the film/stud is detached is indicative of the adhesion toward the substrate.

Finally, a shear tester, such as those by Nordson DAGE and XYZTec, can be used to measure the force needed to shear a patterned feature of the dielectric film from a substrate. This test is schematically depicted in Figure 15.19.

Using this method, it is possible to study and optimize the adhesion strength as a function of various parameters such as substrate preparation, adhesion promoter type, and concentration.

15.6 Design Rules

The design guidelines for the target dielectric film thickness in FO‐WLP packages are typically in the range of 7–12 μm film thickness. The viscosity of the formulation determines the film thickness range and is primarily set by the polymer concentration level. The standard version is a high viscosity version and covers the cured film thickness range from 6 to 35 μm. Thinner film thickness ranges are possible with a lower viscosity version, which is a dilution of the high viscosity version with casting solvent and which provides identical material properties. The scribe lines or sawing streets between the FO‐WLP packages require special attention during the RDL dielectric design phase. As the low temperature cure PI dielectric has a film shrinkage around 25% in all directions, some consideration regarding RDL dielectric stacking layout is required to avoid negative profiles at the sawing streets as shown in Figure 15.20. The first drawing, as shown in Figure 15.20a, results in negative dielectric profiles because this layout favors a larger shrinkage in the vertical direction than in the horizontal direction. A negative profile is easily overcome by increasing the horizontal overlap of dielectric layer (N) to dielectric layer (N − 1) film compared with the (vertical) film thickness as shown in Figure 15.20b. The preferred ratio of horizontal length to vertical height should be preferably larger than a factor of 1.2. Another option is to avoid any dielectric overlap of dielectric (N) to dielectric (N − 1) as shown in the third drawing of Figure 15.20c.

15.7 Reliability

The dielectric material plays a key role in the final reliability performance of the advanced FO‐WLP packages. The standard package reliability test consists of a preconditioning test followed by either a TCT, (un)biased highly accelerated stress test (uHAST), high temperature storage test (HTS), or temperature humidity bias test (THB). Secondly, board‐level tests are performed including temperature cycle on board (TCoB) and drop test. These tests, described in various JEDEC standards (EIA/J‐STD‐020C, JEDEC JESD22‐A103, JEDEC JESD22‐A104, JEDEC JESD‐22‐A104/IPC‐9701, JEDEC JESD‐22‐B111 daisy chain), are however very time‐consuming, labor‐intensive, and therefore expensive analyses.

In order to avoid the above lengthy and expensive reliability test, a prescreening on dielectric level is proposed. The behavior of material and mechanical properties under reliability stress test can be evaluated on blanket dielectric films. The test consists of first determining the material and mechanical properties at time zero and then after a defined time in an autoclave (i.e. pressure cooker test [PCT] – JEDEC JESD22‐A102) ranging from 0, 250, and 500 hours up to 1000 hours. PCT conditions are 121 °C with 100% RH and 2 atm pressure. A schematic presentation of the test on blanket cured PI film is described in Figure 15.21.

The Young’s modulus, UTS, and elongation‐at‐break data as a function of the PCT test time has been determined for LTC 9320 cured at 230 °C for three hours and is shown in Figure 15.22. This data clearly shows no significant change in material properties over PCT time, and this is indicative that potential chemical changes such as hydrolysis of the imide units and scission of the polymer do not take place during the extended exposure to humidity and temperature. Analysis of the FTIR spectra also proved that there is no degradation of the PI under PCT stress conditions.

As low temperature cure PI materials maintain their mechanical properties during accelerated aging test, this predicts that the material will be able to provide the required mechanical support during the package reliability tests. Therefore, the low temperature cure PI was reliability tested on FO‐WLP packages according the JEDEC standards. Table 15.5 summarizes the results of the test vehicles without UBM layer and the applied test conditions for package and board reliability level.

Unlike the standard low cure dielectrics under thermal cycling, it was found that the low temperature cure PI has the capability to slow down the propagation of cracks, which originate in the intermetallic that is formed between the solder and copper pad at the outer circumference around the solder ball. The new low temperature cure PI material has the capability to stop the crack propagation at the bottom dielectric layer such that the crack will not propagate in the die active area for both test vehicles [1]. Therefore, the electrical functionality of the unit is preserved at least until 1000 cycles, and the cross sections carried out during characterization indicate that this limit can be even exceeded [1].

TCoB for TV A was carried out with continuous in situ electrical monitoring to estimate the parameters of the Weibull distribution. The Weibull cumulative distribution function (cdf) model predicts 0% failures until 500 cycles and 1% for 766 cycles, and the mean time to failure (MTTF) is 1225 cycles. Failure analysis of the solder balls revealed solder ball fatigue damage with cracks developing from the corner of the intermetallic formed between solder ball and copper pad of the PCB board. The failure mode is more likely due to the surface‐mount technology (SMT) process (Figure 15.23) [1].

A drop test with in situ electrical monitoring during stress test was performed for TV A. The pass criteria of less than 5% fails at 30 drops based on the Weibull cdf require 140 drops, and the MTTF is 1059 drops. Physical failure characterization shows that the only failure mechanism observed was solder joint fracture at the component side, specifically in the intermetallic layer, which became the more fragile interlayer connection (Figure 15.24).

15.8 Next Steps

The implementation of low temperature cure PI in FO‐WLP packages resulted in a significant improvement of the reliability performance of these packages. Nevertheless the general FO‐WLP package roadmap with multiple RDL dielectric layers will demand further improvements to the low temperature cure PI chemical platforms as shown in Figure 15.25.

A first key challenge is to reduce the cure temperature from >200 °C toward a cure temperature in the range of 170 °C while maintaining the outstanding mechanical properties. The target temperature of the low temperature dielectric should be similar to the mold compound cure temperature to reduce wafer warpage. Lower wafer warpage reduces wafer handling issues and improves the overall yield.

Secondly, improved resolution or higher cured aspect ratio will be required to meet scaling roadmaps. This seems likely to be achievable by optimization of the photo‐package system of the formulation.

Copper migration under electrical bias will become critical with reducing line/space dimensions below 5/5 μm downward. Copper diffusion as a function of the cure temperature of the low temperature PI will need to be modeled. The influence of copper lines/spaces, substrate preparation, environmental conditions, and applied voltage during stress test on copper diffusion needs to be fundamentally understood for future product optimization. Additionally a reduction in the moisture uptake of PI may retard copper corrosion processes, e.g. copper discoloration.

The manufacturing processes of low temperature cure PI will be challenged to cope with the continuous trend of reduced trace metals and particles in the formulation. The batch‐to‐batch variability needs to be limited to allow the assembly suppliers to reduce the in‐line statistical process control (SPC) check and reduce the overall manufacturing cost.

Finally, the pathways for these new enabling dielectric materials need to be in compliance with the ever stringent EHS legislation set by regulatory bodies such as the EU’s European Chemicals Agency (ECHA) or the United States’ Environmental Protection Agency (EPA). This puts a high burden on the research and development divisions of the material companies to propose technical solutions without significant cost adders in a short time period.

References

1. 1 Almeida, R., Barros, I., Campos, J. et al. (2014). Enabling of fan‐out WLP for more demanding applications by introduction of enhanced Dielectric material for higher reliability. 2014 IEEE 64th Electronic Components and technology conference (ECTC), Orlando, FL (2014), pp. 935–939.
2. 2 Huemoeller, R., Zwenger C. [Amkor Technology, Inc.] (2015). Silicon wafer integrated fan‐out technology. Reprinted from March April, 2015. http://ChipScaleReview.com (accessed 6 August 2018).
3. 3 Toepper, M., Fischer, T., Baumgartner, T., and Reichl, H. (2010). A comparison of thin‐film polymers for wafer level packaging. 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC), Las Vegas, NV (2010), pp. 769–776.
4. 4 Yost, W.T., Cantrell, J.H., Gates, T.S., and Whitley, K.S. (1998). Effects of molecular weight on mechanical properties of the polyimide. In: SJTM Materials Division NASA‐Langley Research, Review of Progress in Quantitative Nondestructive Evaluation, vol. 17 (ed. D.O. Thompson and D.E. Chimenti). New York: Plenum Press.
5. 5 Hubbard, R.L., Fathi, Z., Ahmad, I. et al. (2004). Low temperature curing of polyimide wafer coatings. IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585) (2004), pp. 149–151.
6. 6 Araki, H., Shoji, Y., Masuda, Y. et al. Novel low‐temperature curable positive tone photosensitive dielectric materials with high elongation for panel level package. International Wafer‐Level Packaging Conference (IWLPC) 2017 Proceedings.
7. 7 Talai, A. (2014). A permittivity characterization method by detuned ring resonators for bulk materials up to 110 GHz. Microwave Conference (EuMC), 44th European, Rome, Italy (6–9 October 2014).
8. 8 Vanclooster, S. and Janssen, D. (2016). Are low temperature cure polyimides suitable for high frequencies? Fujifilm Advanced Lithography Workshop, Dresden, Germany (September 2016).