This chapter is a summary of digital system architecture. The general problem dealt with is the synthesis of a digital circuit implementing some given algorithm, in such a way that a set of conditions related to the costs and the delays are satisfied. The costs to be taken into account could be
the number of cells in the case of an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA),
the number of integrated circuits if standard components are used.
There are other costs, among them those related to the circuit packages, such as
the number of pins of the integrated circuits,
the electric power consumption.
The most important timing conditions concern the data input and output operations, among others,
the maximum delay between the input of a data set and the output of the result (latency),