24.1 Voltage References

The traditional voltage reference was the Weston standard cell, and these are still used in calibration laboratories. However, in most electronic instruments nowadays, from power supplies to digital voltmeters (DVMs), an electronic reference is used instead.

A Zener diode exhibits a voltage drop, when conducting in the reverse direction, which is to a first approximation independent of the current flowing through it, i.e., it has a low slope resistance. Thus if a Zener diode is supplied with current via a resistor from say the raw supply of a power supply (Figure 24.1(A), the voltage variations across the Zener—both AC due to supply frequency ripple and DC due to fluctuations of the mains voltage—will be substantially less than on the raw supply, provided that the value of the resistor is much greater than the diode’s slope resistance. In practice, this means that about as many volts must be “thrown away” across the resistor as appear across the diode. Even so, the improvement is inadequate for any purposes other than the cheapest and simplest stabilized power supply. Figure 24.1(B) shows how the performance of the regulator can be notably improved by using the high drain slope resistance of a junction FET in place of the resistor. Unfortunately an FET is a lot dearer than a resistor. Two-lead FETs with the gate and source internally connected as shown are available as “constant current diodes” and work very well; unfortunately they are even more expensive than FETs, which themselves have always commanded a price ratio relative to small-signal bipolar transistors of about five to one. If an FET is used, the problem of the usual 5:1 spread in I_dss can be alleviated by including a source bias resistor, as in Figure 24.1(C), or even by adjusting it for a given drain current as in Figure 24.1(D).

Zener diodes have been much improved over the years. Earlier types left one with the difficult choice of going for lowest slope resistance—which was found in devices with a rating of about 8.2V—or for lowest temperature coefficient (TC or “tempco”), then found in 5.1V devices. With modern devices such as the Philips BZX79 series, lowest TC and lowest slope resistance occur for the same voltage rating device; that is, +0.4%/°C and 10Ω at 5 mA respectively in the BZX79 C6V2 with its 6.2V ±5% voltage rating. A point to watch out for is that the measurement of a Zener diode’s slope resistance is usually an adiabatic measurement. This means that a small alternating current is superimposed upon the steady DC and the resulting alternating potential is measured. The frequency of the AC is such that the diode’s temperature does not have time to change in sympathy with each cycle of the current. If now there is a change in the value of the steady DC component of current through the diode, there will be an accompanying instantaneous small change in voltage δV due to δI , the change in current flowing through the slope resistance Rs, followed by a slower change of voltage due to the TC as the operating temperature of the diode changes. This clearly highlights the benefit of a range of diodes where the minimum slope resistance and TC can be had in one and the same device.

Returning to Figure 24.1(A), this arrangement can provide a stabilization ratio V_raw/V_reg of about 100:1 or 1%, whereas the FET aided version improves on this by a factor of about 30, depending on the FET’s slope resistance. However, a useful if not quite so great improvement can be provided by the arrangement of Figure 24.2 [Ref. 24.1] Here the diode current is stabilized at a value of approximately 0.6/R₂, since the PNP transistor’s V_be changes little with change of emitter current. Consequently, if V_raw increases, most of the resultant increase in current through R₁ is shunted via the collector to ground rather than through the Zener diode. Where a modest performance, about 10 times better than Figure 24.1(A), is adequate, the circuit of Figure 24.2 offers a very cheap solution. Where substantially better performance is required, a voltage reference IC is nowadays the obvious choice. These are available from most manufacturers of linear ICs and operate upon the bandgap principle. A typical example is the micropower two-lead LM385-1.2 from National Semiconductor, which is used in series with a resistor or constant current circuit, just like a Zener diode. This 1.2V reference device is available in 1% or 2% selection tolerance, operates over a current range of 10 μA to 20 mA, and features a dynamic impedance of 1Ω; the suffix X version features a TC at 100 μA of less than 30 PPM/°C. A 2.5V device, the LM385-2.5, is also available. Other commonly available reference voltage ICs come in various output voltages, including 5.0V, 10.0V and 10.24V.

24.2 NonsinusoidaI Waveform Generators

Sources of AC signals can be divided into two main categories: sine wave generators, and generators of nonsinusoidal waveforms. The latter can be subdivided again into pulse generators and other types. Pulse generators provide pulses of positive- or negative-going polarity with respect to earth or to a presettable DC offset voltage. The pulse repetition frequency, pulse width, amplitude and polarity are all adjustable; on some pulse generators, so too are the rise and fall times. Commonly also the output may be set to provide “double pulses,” that is pulse pairs with variable separation, and a pulse delay with respect to a prepulse, which is available at a separate output for test and synchronization purposes. Pulse generators of this type are used mainly for test purposes in digital systems, so they are not considered further here. So let’s press straight on and look at those “other types.”

Nonsinusoidal or astable waveform generators may be categorized as operating in one of two modes, both of which are varieties of relaxation oscillator. As the name implies, the oscillation frequency is determined by the time taken by the circuit to relax or recover from a positive extreme of voltage excursion, toward a switching level at which a transient occurs. The transient carries the output voltage to a negative extreme and the circuit then proceeds to relax toward the switching level again, but from the opposite polarity. On reaching it, the circuit switches rapidly again, finishing up back at the positive extreme.

The two modes are those in which differentiated (phase advanced) positive feedback is combined with broad band negative feedback on the one hand, and types in which broad band positive feedback is combined with integrated (phase retarded) negative feedback on the other. Figures 24.3 and 24.4 show both discrete component and IC versions of these two types, respectively. The circuit operation should be clear from the circuit diagrams and waveforms given.

There is no reason why such an oscillator should not use differentiated positive feedback and integrated negative feedback, as in Figure 24.5(A); indeed, there is a definite advantage in so doing. It results in a greater angle between the two changing voltage levels at the point at which regeneration occurs, and this makes that instant less susceptible to influence by external or internal circuit noise. Thus, the frequency of oscillation is more stable, a worthwhile improvement since the frequency purity of astable oscillators generally is very much poorer than that of sinusoidal oscillators using an LC resonant circuit. In the latter the stored energy is much greater than any circuit noise, which consequently has less effect. However, a circuit such as Figure 24.5(A) contains two time constants, both of which play a part in determining the frequency. The circuit of Figure 24.3(B) will provide a 10:1 variation of frequency for a 10:1 variation of the resistance R forming part of the frequency determining time constant CR. The same applies to the circuit of Figure 24.5(A) only if more than one resistor is varied in sympathy. Thus the circuit of Figure 24.5(A) is more attractive in fixed frequency applications or where a tuning range of less than an octave is required. For wide frequency applications, as in a function generator providing sine, triangular and square output waveforms, it is not uncommon to opt for the economy of single resistor control.

Figure 24.5(B) shows a popular and simple astable oscillator circuit. There is only a single path around the circuit, for both the positive and the negative feedback. At any time (except during the switching transients) only one of the two transistors conducts, both tail currents being supplied via the 1K resistor or from the +15V rail.

The circuit of Figure 24.6 works on a slightly more sophisticated principle than the circuits of Figures 24.3 and 24.4, where the feedback voltage relaxes exponentially [Ref. 24.2]. It uses the Howland current pump to charge a capacitor, providing a linearly rising ramp. When this reaches the trigger level of half the supply rail voltage (at the noninverting input of the comparator), the trigger level, and the voltage drive to the current pump, both reverse their polarity, setting the voltage on the capacitor charging linearly in the opposite direction. The frequency is directly proportional to the output of the current pump and hence to the setting of the 10K potentiometer, which can be a multiturn type with a ten-turn digital dial. With the values shown the circuit provides five frequency ranges from 0 to 1 Hz up to 0 to 10 kHz, with direct read-out of frequency. Each range determining capacitor has an associated 4K7 preset resistor associated with it, enabling the full-scale frequency to be set up for each range, even though ordinary 10% tolerance capacitors are used. The circuit provides buffered low-impedance triangular and square wave outputs.

Most function generators provide a sine wave output of sorts. The popular 8038 function generator IC includes an on-chip shaping stage to produce a sine wave output by shaping the triangle waveform. This operates purely on a waveform shaping basis and thus works equally well at any frequency. An alternative scheme is to use an integrator: a triangular (linear) waveform is integrated to a parabolic (square law) waveform which forms a passable imitation of a sine wave, the total harmonic distortion being about 3.5%. However, the disadvantage of the integrator approach is that the output amplitude varies inversely with frequency, unless the value of the integrator’s input resistor is varied to compensate for this.

An aperiodic (nonfrequency dependent) method of shaping a triangular wave into an approximation to a sine wave is to use an amplifier which runs gently into saturation on each peak of the triangular waveform. Unlike the integrator method, where the sharp point at the peak of the triangle wave becomes a slope discontinuity at the zero crossing point of the pseudo-sine wave, it is difficult with the aperiodic shaping method to avoid some residual trace of the point at the peak of the sine-shaped waveform. A scheme which has been used to avoid this is to slice off the peaks of the triangular wave before feeding it to the shaping circuit [Ref. 24.3]. In the reference cited, by choosing the optimum degree of preclipping and of nonlinearity of the shaping amplifier gain, distortion as low as 0.2% is achieved at low frequencies (a times ten improvement on the results usually achieved by this method). The shaping amplifier is implemented in an IC using a 1-GHz device process, resulting in good conversion of triangular waveforms to sine waves at frequencies up to 100 MHz.

Some function generators are capable of producing other waveforms besides the usual square/triangle/sine waves. A popular waveform is the sawtooth and its close cousin the asymmetrical triangle (see Figure 24.7). This figure also indicates how a stepwise approximation to any arbitrary waveform can be produced by storing the data values corresponding to say 256 successive samples of the waveform over one whole cycle in a read-only memory (ROM), and then reading them out sequentially to a digital-to-analog converter (DAC). In this way it is possible to reproduce natural sounds which have been recorded and digitized, for example the sound of a diapason or reed pipe from a real pipe organ, as is done in some electronic organs. The step nature of the output will correspond to very high-frequency harmonics of the fundamental, which in the organ application may well be beyond the range of hearing, but where necessary the steps can be smoothed off with a low-pass filter. This can still have a high enough cut-off frequency to pass all the harmonics of interest in the output waveform.

Another way of achieving a smooth, step-free output waveform is to make use of the multiplying capability of a DAC. The output current from a DAC is equal to the input bit code times the reference voltage input. Figure 24.8 shows two multiplying DACs with reverse sawtooth waveforms applied to their reference inputs so that as the output of the P DAC decreases, that of the Q DAC increases. Sample values are fed to the DACs at the same rate as the sawtooth frequency. When the output of the P DAC reaches zero, its input code is changed to that currently present at the input of the Q DAC. Immediately after this the sawtooth waveforms fly back to their initial values, so that the output from the Q DAC is now zero, and its input bit code is promptly changed to that of the next waveform sample. The output currents of the two DACs are summed to give a smoothly changing voltage output from the op-amp. The generation of a sine wave by this means is illustrated in Figure 24.9, but any arbitrary waveform can be produced once the appropriate values are stored in ROM. In practice, both the new DAC values are simply applied at the same instant that the sawtooth waveforms fly back to their starting values: any “glitch” in the output voltage, if appreciable, can be smoothed out with a little integrating capacitor across the summing op-amp’s feedback resistor, which in Figure 24.8 is internal to the DAC.

An interesting application of this is for writing data on the screen of a real-time oscilloscope. Such an oscilloscope uses the electron beam to write the traces under control of the X and Y deflection plates, but it does not produce a raster scan like a TV display, so some other means is needed if information such as control settings is to be displayed on the screen. Two completely separate but complementary voltage waveform generators such as Figure 24.9 can be used to produce the appropriate X and Y deflection voltages to write alphanumeric data on the screen, the appropriate DAC data being stored in ROM. This scheme is used on many makes of oscilloscope. When the display read-out is on, it is possible under certain conditions to observe short breaks in the trace where the beam goes away temporarily to write the read-out data.

24.3 Sine Wave Generators

Turning now to sine wave generators, let’s look first at audio-frequency generators. These generally do not use LC tuned circuits to determine the frequency, and therefore have a degree of frequency stability intermediate between that of tuned circuit oscillators and relaxation oscillators, and in some cases not much better than the latter. To measure the distortion of a high-fidelity audio power amplifier, one needs, in addition to a distortion meter, a sine wave source of exceptional purity. Not only must the source’s distortion be exceedingly low, but its frequency stability must be of a very high order. This is because the usual sort of distortion meter works by rejecting the fundamental component of the amplifier’s output with a narrow notch filter, so that the harmonics, residual noise and hum can be measured. Their level relative to the total output signal, expressed as a percentage, is the total harmonic distortion (THD) or, more strictly, the total residual signal if noise and hum are significant. Clearly, if the frequency of the sine wave generator drifts it will be difficult to set and keep it in the notch long enough to take a measurement. However, even if its drift is negligible, it may exhibit very short-term frequency fluctuations. Thus, it will “shuffle about” in the notch, resulting in a higher residual output than if its frequency were perfectly steady, as it tends to peep out first one side of the notch and then the other.

Now this is simply an explanation in the time domain of something which can equally well be explained in the frequency domain. Figure 24.10(A) shows an ideal sinusoidal signal, while Figure 24.10(B) shows, much exaggerated for clarity, a practical sine wave, warts and all. In addition to the ideal sine wave there are close-in noise side-bands of two sorts, AM and FM. These represent energy at frequencies very close to that of the sine wave, falling rapidly in amplitude as the frequency difference increases. The FM noise sidebands are the manifestation in the frequency domain of slight phase variations, which were noted as frequency shuffle in the time domain and which are shown as FM sidebands in Figure 24.10(B). There are also AM sidebands corresponding to slight amplitude variations in the sine wave, and these also will contribute to the residual. The residual may be considered as being responsible for it being impossible to say exactly where the tip of the vector in Figure 24.10(B) is at any time; it will be somewhere in the much exaggerated “circle of uncertainty” shown. (Note that noise sidebands, both AM and FM, are also found either side of the output frequency of an LC oscillator and even of a crystal oscillator; it is just that in those cases they are restricted by the high Q of the frequency determining components to a very much narrower fractional bandwidth about the centre frequency.) In a well-designed audio oscillator, the energy in the noise sidebands which is not rejected by the notch of the distortion meter is always lower in level than the energy of the harmonics.

Figure 24.11 shows an audio oscillator using the popular Wien bridge configuration. In Figure 24.11(A) you can see the principle of the thing. By using the idea of extremums—replacing a capacitor by an open-circuit at 0 Hz and by a short-circuit at infinite frequency—there will clearly be no signal at B at these frequencies. It turns out (the sums are not difficult, have a go) that at the frequency f = 1/ 2πRC the amplitude at B is one-third of that at A and the two waveforms are in phase. At other frequencies the attenuation is greater and the waveforms are out of phase. If the bridge is just out of balance sufficiently to provide the necessary input to the maintaining amplifier, then the latter will drive the bridge at an amplitude adequate to produce the said input. If this sounds like a specious circular argument, it is: in the practical circuit of Figure 24.11(B) the necessary degree of bridge imbalance is provided by a thermistor. The usual type is an R53, which has a cold resistance of 5K (or 5 × 10³Ω, hence the type number). At switch-on, the bridge is unbalanced by much more than is necessary, so that the positive feedback via the CR network exceeds the negative feedback via the thermistor/resistor combination. Therefore, the circuit commences to oscillate at the frequency at which the phase shift and attenuation of the CR network is least. As the amplitude of the oscillation builds up, the current through the thermistor heats it up. Now the thermistor consists of a pellet of amorphous semiconductor whose resistance falls rapidly with increasing temperature; the negative feedback via the thermistor/resistor arm therefore increases, and the bridge approaches balance. At an output voltage of about 3V peak to peak, the dissipation in the thermistor, with the circuit values shown, is approaching the rated maximum, corresponding to a temperature of the pellet inside its evacuated glass envelope of 125°C, and the output amplitude is stabilized. Oscillators operating on this principle are commercially available from many manufacturers, such are their popularity. The oscillator can even be made to cover the frequency range 10 Hz to 10 MHz, although it is not then possible to optimize the circuit for the lowest possible distortion in the audio-frequency range.

The main problems with a thermistor stabilized Wien bridge oscillator are amplitude bounce and poorish distortion. The former is due to the thermistor: it is found that on changing frequency, the amplitude of the output oscillates up and down several times before settling to a steady value. Running the thermistor near its maximum permitted dissipation helps to minimize this. The other problem is due to the limited selectivity of the Wien bridge, which does little to reduce any distortion in the maintaining amplifier, and (at frequencies below 100 Hz) to the finite thermal time constant of the thermistor.

The Wien bridge oscillator shown in Figure 24.11(B) uses a two-gang variable resistor to vary both resistors of the frequency determining network simultaneously. This keeps constant the attenuation through the network at the zero phase shift frequency. It can also provide a 10 to 1 frequency tuning range for a 10 to 1 resistance variation, as can be deduced from the formula for the frequency quoted above. There are numerous sine wave oscillator circuits which provide frequency variation using only a single variable resistor, but in these the frequency ratio obtained is only equal to the square root of the resistance variation [Refs. 24.4, 24.5].

An improved audio oscillator can be based on the state variable filter. Oscillation is ensured by the addition of fixed positive feedback and variable negative feedback applied to the inverting and noninverting inputs, respectively. The degree of NFB can be controlled by an FET, used as a variable resistor. In turn, the FET’s resistance is controlled by a DC voltage proportional to the oscillator’s peak-to-peak output voltage, so as to make the positive and negative feedback balance at the desired output amplitude. A variation on this scheme is shown in the SVF-based oscillator of Figure 24.12, which covers the frequency range 200–2000 Hz: here the PFB is variable, while the NFB or damping is provided by the phase advance due to C₁ [Ref. 24.6]. Interestingly, Tr₁ can be replaced by a IN4148 diode with virtually no increase in the harmonic distortion, which is about 0.02%. This is because the resultant slight dent in the positive peak of the sine wave at IC_1a’s output, as C₂ is topped up, is composed of high-order even harmonics. These are heavily attenuated in the two following integrators IC_1b and IC_1c.

The circuit of Figure 24.12 exhibits two undesirable features, which a little lateral circuit design can circumvent. First, if other values of C₃ and C₄ are switched in, to provide 20–200 Hz and 2–20 kHz ranges, the smoothing time constant R₅C₂ is inadequate on the lower range, leading to increased distortion owing to the FET’s resistance varying in sympathy with the ripple. Worse still, the time constant is excessive on the top frequency range, leading to amplitude bounce just like a thermistor stabilized oscillator and even complete instability of the level control loop. Second, the frequency is inversely proportional to the integrator time constants, leading to a very nonlinear frequency scale if the two-gang fine frequency control potentiometer (pot) R₇ has a linear resistance law. The scale is excessively open at the low-frequency end and terribly cramped at the top end. A somewhat better, more linear, scale results if a reverse taper log pot is used, but this is a rather specialized component. If the frequency scale is marked on the skirt of the knob rather than on the panel of the instrument, a normal log pot can be used, but there is still a problem due to the wide selection tolerance and poor law repeatability of log pots.

Both of these drawbacks are avoided by the circuit of Figure 24.13. Here, the degree of NFB applied to the noninverting terminal is fixed, while the PFB is applied to the inverting terminal via a diode clipping network. Thus, the oscillator works as a high-Q filter with a small square wave input of approximately fixed amplitude at its corner frequency. Amplitude control does not involve any control loop time constant and there is no rise in distortion below 100 Hz, such as is always found with thermistor-controlled circuits. The NFB or damping is set by the two resistors feeding back to the non-inverting terminal of IC₁. The ratio is one part in 83 and for feedback organized in this way the Q is one-third of the ratio, that is just over 27 in this case. If you assume that the input to the filter is a perfect square wave at the corner frequency, one would expect the third-harmonic component, which in a square wave amounts to one-third of the fundamental amplitude, to be attenuated by a factor of nine at the low-pass output from IC₃. For that is the theoretical attenuation of a frequency three times higher than the corner frequency at 12 dB/ octave, relative to the flat response at low frequencies. Meanwhile, the fundamental at the corner frequency is actually accentuated by the factor Q, in this case 27. So for a per unit input, the output from IC₃ should consist of 27 per unit at the fundamental (approximately) and one-ninth of one-third at the third harmonic. So the third-harmonic component in the output should be 1/27² per unit, which works out at about 0.15%. Despite a few approximations (the fundamental of a per unit square wave is itself slightly larger than unity, and the fifth and higher odd harmonics also contribute marginally to the distortion at the low-pass output), that is just about the distortion level measured in the output of the circuit of Figure 24.13 at all frequencies from 20 Hz to 20 kHz. Furthermore, if the integrators’ frequency determining resistors are high in value compared with the value of the two-gang fine frequency control pot, a linear law pot will provide a substantially linear scale.

Having covered audio-frequency oscillators in some detail, let’s turn our attention next to radio-frequency oscillators. The basic oscillator circuits have already been covered in the previous chapter, so here I will just look at a couple of interesting variations before moving on to see how oscillators can be integrated with other circuits to increase their flexibility and accuracy. Figure 24.14(A) shows a two-transistor RF oscillator designed to be free of all time constants other than that of the tuned circuit itself, so that it cannot “squegg,” i.e., oscillate in bursts instead of continuously, as sometimes happens [Ref. 24.7]. Squegging is a form of relaxation oscillation usually involving a CR time constant forming part of the stage’s biasing circuit. The two transistors form a DC coupled pair with 100% NFB. They can only oscillate at the frequency at which the tuned circuit provides phase inversion or 180° phase shift. Further, if the total resistance of R₂ + R₃ is greater than R1, then the tuned circuit must also provide a voltage step-up. C₁ and C₂ are in series as far as determining the frequency goes, and, by making C₂ C₁, a wide tuning range can be achieved with the variable capacitor. If waveform is unimportant, R₂ and R₃ can be replaced by a single 10K resistor.

The question of suppressing unwanted modes of oscillation is particularly important in crystal oscillators, since in most cases the quartz crystal (which is simply a high-Q electromechanical resonator) can vibrate in several different modes, rather like the harmonics of a violin string or the overtones of a bell. Indeed many crystals are designed specifically to operate at a harmonic (often the third) rather than at their fundamental resonance, since for a given frequency the crystal is then larger and has a higher Q. In the highest-quality crystal oscillators, the strain compensated (SC) cut is used. This is a doubly rotated crystal, where the angle of the cut is offset from two of the three cystallographic axes. It has the advantage of a much lower temperature coefficient than the commoner cuts such as AT or BT, together with less susceptibility to shock and improved ageing characteristics (Figure 24.14(B)). These advantages do not come without an appropriate price tag, in that the SC crystal is more difficult and expensive to produce and has more spurious modes than other crystal types. For example, the 10 MHz SC crystal used in the Hewlett-Packard 10811A/B ovened reference oscillator is designed to run in the third-overtone C mode resonance. The third-overtone B mode resonance is at 10.9 MHz, the fundamental A mode is at 7 MHz, and below that are the strong fundamental B and C modes. The circuit of Figure 24.14(C) shows the SC cut crystal in the 10811A/B oscillator connected in what is basically a Colpitts oscillator, so as to provide the 180° phase inversion at the input of the inverting maintaining amplifier [Ref. 24.8]. With the correct choice of values for L_x, L_y and C_y, they will appear as a capacitive reactance over a narrow band of frequencies centred on the desired mode at 10.0 MHz, but as an inductive reactance at all other frequencies. Thus all of the unwanted modes are suppressed.

24.4 Voltage-Controlled Oscillators and Phase Detectors

Increasingly today receivers, and more particularly transmitters, have digital read-out and control of frequency. Consequently, where the old-time RF designer strove to design a variable frequency oscillator tuned with a mechanical variable capacitor, whose frequency (at any given capacitor setting) was very stable regardless of temperature and supply voltage, the design problem nowadays is usually slightly different. The oscillator is likely to be a voltage-controlled oscillator (VCO) forming part of a phase-locked loop synthesizer, where the oscillator’s output frequency is locked to a stable reference such as a crystal oscillator. Not that synthesizers are the only application for VCOs. Figure 24.15 shows a VCO covering the frequency range 55–105 MHz, which is suitable for the generation of very wide deviation FM [Ref. 24.9]. Alternatively, if its output is mixed with a fixed 55 MHz oscillator, a very economical 0–50 MHz sweeper results.

Probably the earliest description of a phase-locked loop as such is to be found in the article “La Reception synchrone,” by H. de Bellescize, published in L’Onde Electronique, vol. 11, pp. 230–40, June 1932. This described the synchronous reception of radio signals, in which a local oscillator operates at the same frequency as the incoming signal. If the latter is an amplitude modulated wave, such as in MW broadcasting, the audio can be recovered by mixing the received signal with the local oscillator, provided the local oscillator has exactly the same frequency as the carrier and approximately the same phase. This can be achieved by locking the frequency and phase of the local oscillator to that of the signal’s carrier—in other words, a phase-locked loop. When the local oscillator and the mixer are one and the same stage, as in Figure 23.21, the result is a simple synchrodyne receiver, in which the carrier of the received signal takes control of the frequency and phase of the (just oscillating) detector circuit. In a synthesizer employing a phase-locked loop, however, the oscillator, the phase detector (mixer) and the all-important loop filter are all separate, distinct stages.

The operating principle of a synthesizer incorporating a phase-locked loop is indicated in the block diagram of Figure 24.16(A). A sample of the output of the oscillator is fed by a buffer amplifier to a variable ratio divider; let’s call the division ratio N.

The divider output is compared with a comparison frequency, derived from a stable reference frequency source such as a crystal oscillator. An error voltage is derived which, after smoothing, is fed to the VCO in such a sense as to reduce the frequency difference between the variable ratio divider’s a output and the comparison frequency. If the comparison is performed by a frequency discriminator, there will be a standing frequency error in the synthesizer’s output, albeit small if the loop gain is high. Such an arrangement is called a frequency lock-loop (FLL); these are used in some specialized applications. However, the typical modern synthesizer operates as a phase-locked loop, where there is only a standing phase difference between the ratio N divider’s output and the comparison frequency. The oscillator’s output frequency is simply Nf_c, where f_c is the comparison frequency. Thus f_c equals 12.5 kHz gives a simple means of generating any of the transmit frequencies used in the VHF private mobile radio (PMR) band, used by taxi operators, delivery drivers, etc., which is channelized in steps of 12.5 kHz in Europe (15 kHz in North America).

In fact, there is a practical difficulty in that variable ratio divide-by-N counters which work at frequencies up to 150 MHz or more are not available, but this problem is circumvented by the use of a prescaler. If a fixed prescaler ratio, say divide by 10, is used, then the comparison frequency must be reduced to 1.25 kHz to compensate. However, the lower the comparison frequency, the more difficult it is to avoid comparison frequency ripple at the output of the phase comparator passing through the loop filter and reaching the VCO, causing comparison frequency FM sidebands. Of course one could just use a lower cut-off frequency in the loop filter, but this makes the synthesizer slower to settle to the new channel frequency following a change in N. The solution is a ‘variable modulus prescaler’ such as a divide by 10/11 type. Such prescalers are available in many ratios, through divide by 64/65 up to divide by 512/514, thus a high comparison frequency can still be used: their detailed mode of operation is not covered in this book, as it is a purely digital topic.

A phase-locked loop synthesizer is an NFB loop and, as with any NFB loop, care must be taken to roll off all the loop gain safely before the phase shift exceeds 180°. This is easier if the loop gain itself does not vary wildly over the frequency range covered by the synthesizer. In this respect, a VCO whose output frequency is a linear function of the control voltage is a big help (see Figure 24.17) [Ref. 24.10]. The other elements of the loop equally need to be correctly proportioned to achieve satisfactory operation, so let’s analyze the loop in a little more detail. Returning to Figure 24.16(A), the parameters of the various blocks forming the circuit have been marked in, following for the most part the terminology used in what is probably the most widely known treatise on phase-locked loops [Ref. 24.11]. Assuming that the loop is in lock, then both inputs to the phase detector are at the comparison frequency f_c, but with a standing phase difference θ_i−θ_o. This results in a voltage ν_d out of the phase detector equal to K_d(θ_I − θ_o).

In fact, as Figure 24.20 shows, the phase detector output will usually include ripple, i.e., alternating frequency components at the comparison frequency or at 2f_c, although there are types of phase detector which produce very little (ideally zero) ripple. The ripple is suppressed by the low-pass loop filter, which passes ν₂, the DC component of ν_d, to the VCO. Assuming that the VCO’s output radian frequency ω_o is linearly related to v₂ then ω_o = K_oν₂ = K_oFK_d (θ_i − θ_o), where F is the response of the low-pass filter. Because the loop is in lock, ω′ (i.e., ω_o/N) is the same radian frequency as ω_c, the reference. If the loop gain K_oFK_d/N is high, then for any frequency in the synthesizer’s operating range, θ_i − θ_o will be small. The loop gain must at least be high enough to tune the VCO over the frequency range without θ_i − θ_o exceeding ±90° or ±180°, whichever is the maximum range of operation of the particular phase detector being used.

Let’s check up on the dimensions of the various parameters. K_d is measured in volts per radian phase difference between the two phase detector inputs. F has units simply of volts per volt at any given frequency. K_o is in hertz per volt, i.e., radians per second per volt. Thus while the filtered error voltage v₂ is proportional to the difference in phase between the two phase detector inputs, v₂ directly controls not the VCO’s phase but its frequency. Any change in frequency of ω_o/N, however small, away from exact equality with ω_c will result in the phase difference θ_i − θ_o increasing indefinitely with time. Thus the phase detector acts as a perfect integrator, whose gain falls at 6 dB per octave from an infinitely large value at DC. It is this infinite gain of the phase detector, considered as a frequency comparator, which is responsible for there being zero net average frequency error between the comparison frequency and f_o/N. (Some other writers alternatively consider the VCO as the integrator, producing an output phase which is proportional to the integral of the error voltage. It comes to the same thing either way; it’s just that the explanation I have given seems clearer to me. You pays your money and you takes your choice.)

Consider a first-order loop, that is, one in which the filter F is omitted, or where F = 1 at all frequencies, which comes to the same thing. At some frequency ω₁ the loop gain, which is falling at 6 dB/octave due to the phase detector, will be unity (0 dB). This is illustrated in Figure 24.16(B) and (C), which show the critical loop unity-gain frequency ω₁ on both an amplitude (Bode) plot and a vector (Nyquist) diagram. To find ω₁ in terms of the loop parameters K_o and K_d without resort to the higher mathematics, break the loop at B, the output of the phase detector, and insert at A a DC voltage exactly equal to what was there previously. Now superimpose upon this DC level a sinusoidal signal, say 1V peak. The resultant peak FM deviation of ω_o will be K_o radians per second. If the frequency of the superimposed sinusoidal signal were itself K_o radians/second, then the modulation index would be unity, corresponding to a peak VCO phase deviation of ±1 radian. This would result in a phase detector output of K₁ volts (assuming for the moment that N = 1). If we increase the frequency of the input at A from K_o to K_oK_d, the peak deviation will now be 1/K_d and so the voltage at B will unity. So the loop unity-gain frequency ω₁ is K_oK_d radians/second, or, more generally, K_oK₂/N, as shown in Figure 24.16(B) and (C). With a first-order loop there is no independent choice of gain and bandwidth; quite simply ω₁ = K_oK_d/N₁. We could reintroduce the filter F as a simple passive CR cutting off at a corner frequency well above ω₁, as indicated by the dashed line in Figure 24.16(B) and by the teacup handle at the origin in Figure 24.16(C), to help suppress any comparison frequency ripple. This technically makes it a low-gain second-order loop, but it still behaves basically as a first-order loop provided that the corner frequency of the filter is well clear of ω₁ as shown.

Synthesizers usually make use of a high-gain second-order loop and I will examine that in a moment, but first a word as to why this type is preferred. Figure 24.18(A) compares the close-in spectrum of a crystal oscillator with that of a mechanically tuned LC oscillator and a VCO. Whereas, the output of an ideal oscillator would consist of energy solely at the wanted output frequency f_o, that of a practical oscillator is accompanied by undesired noise sidebands, representing minute variations in the oscillator’s amplitude and frequency. In a crystal oscillator these are very low, so the noise sidebands, at 100 Hz either side, are typically −120 dB relative to the wanted output, falling to a noise floor further out of about −150 dB. The Q of an LC tuned circuit is only about one-hundredth of the Q of a crystal, so the noise of a well-designed LC oscillator reaches −120 dB at more like 10 kHz off tune. In principle a VCO using a varicap should not be much worse than a conventional LC oscillator, provided the varicap diode has a high Q over the reverse bias voltage range; however, with the high value of K_o commonly employed (maybe as much as 10 MHz/volt), noise on the control voltage line is a potential source of degradation. Like any NFB loop, a phase-locked loop will reduce distortion in proportion to the loop gain. “Distortion” in this context includes any phase deviation of ω′ from the phase of the reference f_c. Thus, over the range of offset from the carrier for which there is a high loop gain, the loop can clean up the VCO output substantially, as illustrated in Figure 24.18(B). In fact, the high loop gain will force θ_o, the instantaneous phase of ω′, the output of the divider N, to mirror almost exactly ω_i, the instantaneous phase of the output of the reference divider M. Thus, the purity of ω′ will equal that of ω_c, the reference input to the phase detector. It follows that the VCO output phase noise should be reduced to only N times that of the reference input to the phase detector, i.e., N/M times that of the crystal reference oscillator itself, as indicated in Figure 24.18(B). This assumes that the phase noise sidebands of f_c are in fact 20 log M dB below the phase noise of the crystal reference f_ref. Unfortunately this is often not so, since dividers, whether ripple dividers or synchronous (clocked) dividers, are not themselves noise free, owing to inevitable jitter on the timing edges. Likewise, the variable ratio divider will not in practice be noise free, so that the close-in VCO phase noise in Figure 24.18(B) will be rather more than 20 log(f_o/f_ref) dB higher than the phase noise of the crystal reference.

A second-order loop enables one to maintain a high loop bandwidth up to a higher frequency, by rolling off the loop gain faster. Consider the case where the loop filter is an integrator as in Figure 24.19(C); this is an example of a high-gain second-order loop. With the 90° phase lag of the active loop filter added to that of the phase detector, there is no phase margin whatever at the unity-gain frequency; as Figure 24.19(B) shows, disaster (or at least instability) looms at ω₁. By reducing the slope of the roll-off in Figure 24.19(A) to 6 dB per octave before the frequency reaches ω₁ (dashed line), a phase margin is restored, as shown dashed in Figure 24.19(B), and the loop is stable. This is achieved simply by inserting a resistor R₂ in series with the integrator capacitor C at X−Y in Figure 24.19(C). This is the active counterpart of a passive transitional lag. If R₁ = (√2)R₂, then at the corner frequency ω_c = 1/CR₂ the gain of the active filter is unity and its phase shift is 45°, while at higher frequencies it tends to −3 dB and zero phase shift. If ω_c equals K_oK_d = N, then ω₁ (the loop unity-gain frequency) is unaffected but there is now a 45° phase margin. As Figure 24.19(b) shows, at frequencies well below ω₁, the loop gain climbs at 12 dB/octave accompanied by a 180° phase shift, until the op-amp runs out of open loop gain. This occurs at the frequency ω, where 1/ωC equals AR₁, where A is the open loop gain of the op-amp; an op-amp integrator only approximates a perfect integrator. Below that frequency the loop gain continues to rise for evermore, but at just 6 dB/octave with an associated 90° lag due to the phase detector which, as noted, is a perfect integrator. This change occurs at a frequency too low to be shown in Figure 24.19(A); it is off the page to the top left. I have only managed to show it in Figure 24.19(B) by omitting chunks of the open loop locus of the tip of the vector.

For a high-gain second-order loop, analysis by the root locus method [Ref. 24.12] shows that the damping (phase margin) increases with increasing loop gain; so provided the loop is stable at that output frequency (usually the top end of the tuning range) where K_o is smallest, then stability is assured. This is also clear from Figure 24.19. For if K_o or K_d increases, then so will ω₁, the unity-gain frequency of the corresponding first-order loop. Thus ω_c (the corner frequency of the loop filter) is now lower than ω₁, so the phase margin will now be greater than 45°.

Having found a generally suitable filter, let’s return for another look at phase detectors and VCOs. Figure 24.20 shows several types of phase detector and indicates how they work. The logic types are fine for an application such as a synthesizer, but not so useful when trying to lock onto a noisy signal, e.g., from a distant tumbling spacecraft; here the ex-OR type is more suitable. Both pump-up/pump-down and sample-and-hold types exhibit very little ripple when the standing phase error is very small, as is the case in a high-gain second-order loop. However, the pump-up/pump-down types can cause problems. Ideally, pump-up pulses—albeit very narrow—are produced however small the phase lead of the reference with respect to the variable ratio divider output; like-wise, pump-down pulses are produced for the reverse phase condition. In practice, there may be a very narrow band of relative phase shift around the exactly in-phase point, where neither pump-up nor pump-down pulses are produced. The synthesizer is thus entirely open loop until the phase drifts to one end or other of the "dead space," when a correcting output is produced. Thus the loop acts as a bang-bang servo, bouncing the phase back and forth from one end of the dead space to the other—evidenced by unwanted noise sidebands. Conversely, if both pump-up and pump-down pulses are produced at the in-phase condition, the phase detector is no longer ripple free when in lock and, moreover, the loop gain rises at this point. Ideally the phase detector gain K_d should, like the VCO gain K_o, be constant. Constant gain, and absence of ripple when in lock, are the main attractions of the sample-and-hold phase detector.

In the quest for low noise sidebands in the output of a synthesizer, many ploys have been adopted. One very powerful aid is to minimize the VCO noise due to noise on the tuning voltage, by substantially minimizing K_o, to the point where the error voltage can only tune the VCO over a fraction of the required frequency range. The VCO is pretuned by other means to approximately the right frequency, leaving the phase-locked loop with only a fine tuning role. Figure 24.21 shows an example of this arrangement [Ref. 24.13].

REFERENCES

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[24.2] March I. Triangle Generator Reads Frequency Directly. In: New Electronics. 13 August 1985;24.

[24.3] New Sine Shaper. Hewlett Packard Journal. June 1983;Vol. 34(no. 5):37.

[24.4] Williams P. RC Oscillators, Single-element Frequency Control. In: Wireless World. December 1980;82.

[24.5] Dobkin RC. Easily Tuned Sinewave Oscillators. Electronic Engineering December 1971;116.

[24.6] Hickman I. FET Controlled Oscillator. In: New Electronics. 25 November 1986;19.

[24.7] Short GW. Good-tempered LC Oscillator. In: Wireless World. February 1973;84.

[24.8] Burgoon JR, Wilson RL. SC-Cut Quartz Oscillator Offers Improved Performance. Hewlett Packard Journal. March 1981;Vol. 32(no. 3):20.

[24.9] March I. A Wide Range VCO. In: New Electronics. 14 December 1982;19.

[24.10] Dearden J. A Linear Voltage Controlled Oscillator. In: Electronic Engineering. June 1983;26.

[24.11] Gardner FM. Phaselock Techniques. John Wiley and Sons Inc. 1966.

[24.12] Truxal JG. Automatic Feedback Control System Synthesis. New York: McGraw Hill; 1955.

[24.13] Low-Noise RF Signal Generator Design. Hewlett Packward Journal. February 1981;Vol. 32(no. 2):12.