Instructions of this group are those that let us manipulate individual bits within an operand and/or set bytes in accordance with the sate of flags in the EFlags/RFlags register.
With high-level languages that implement bit fields, it is quite easy to access individual bits even if we want to perform more complex operations than just scan, test, set or reset, as provided by Intel Assembly. However, with high-level languages having no bit fields we have to implement certain constructs in order to have access to individual bits and that is where Assembly is more convenient.
While bit and byte instructions may have a variety of applications, let's consider them (just a few of them) in the context of the CRC8 example. It would not be completely right to say that using these instructions in that example would have significantly optimized it; after all, it would let us get rid of a single instruction, making the implementation of the algorithm look a bit clearer. Let's see how crc_loop would have changed:
crc_loop:
shl al, 1 ; Shift left-most bit out to CF
setc bl ; Set bl to 1 if CF==1, or to zero otherwise
shl dl, 1 ; shift left-most bit out to CF
setc bh ; Set bh to 1 if CF==1, or to zero otherwise
xor bl, bh ; Here we, in fact, are XOR'ing the previously left-most bits of al and dl
jz .noxor ; Do not add POLY if XOR result is zero
xor dl, poly
.noxor:
loop crc_loop
The preceding code is quite self-explanatory, but let's take a closer look at the set of bit instructions:
- BT: This stores a bit from the destination operand (bit base) to the CF. The bit is identified by the index specified in the source operand.
- BTS: This is the same as BT, but it also sets the bit in the destination operand.
- BTR: This is the same as BT, but it also resets the bit in the destination operand.
- BTC: This is the same as BT, but it also inverts (complements) the bit in the destination operand.
- BSF: This stands for bit scan forward. It searches the source operand for the least significant bit that is set. The index of the bit, if found, is returned in the destination operand. If the source operand is all zeros, then the value for the destination operand is not defined and ZF is set.
- BSR: This stands for bit scan reverse. It searches the source operand for the most significant bit that is set. The index of the bit, if found, is returned in the destination operand. If the source operand is all zeros, then the value of the destination operand is not defined and ZF is set.
- TEST: This instruction makes it possible to check for several bits being set at the same time. To put it simply, the TEST instruction performs the logical AND operation, sets flags accordingly, and discards the result.
Byte instructions are all of a form SETcc, where cc stands for condition code. The following are the condition codes on the Intel platform, as specified in section B.1 Condition Codes of Appendix B EFlags Condition Codes of Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1:
| Mnemonic (cc) | Condition tested for | Status flags setting |
| O | Overflow |
OF = 1 |
| NO | No overflow |
OF = 0 |
|
B |
Below Neither above nor equal |
CF = 1 |
|
NB |
Not below Above or equal |
CF = 1 |
|
E |
Equal Zero |
ZF = 1 |
|
NE |
Not equal Not zero |
ZF = 0 |
|
BE |
Below or equal Not above |
(CF or ZF) = 1 |
|
NBE |
Neither below nor equal Above |
(CF or ZF) = 0 |
|
S |
Sign |
SF = 1 |
|
NS |
No sign |
SF = 0 |
|
P |
Parity Parity even |
PF = 1 |
|
NP |
No parity Parity odd |
PF = 0 |
|
L |
Less Neither greater nor equal |
(SF xor OF) = 1 |
|
NL |
Not less |
(SF xor OF) = 0 |
|
LE |
Less or equal |
((SF xor OF) or ZF) = 1 |
|
NLE |
Not less or equal |
((SF xor OF) or ZF) = 0 |
So, as we may conclude using the preceding table and the setc instruction from the CRC8 example, it instructs the processor to set bl (and bh) to 1 if the C condition is true, which means CF == 1.