Intel-based processors have 8 XMM registers for use with SSE, which are named XMM0 to XMM7 on 32-bit platforms, and 16 XMM registers, named XMM0 to XMM15, on 64-bit platforms. It is important to note that only 8 XMM registers are available on 64-bit platforms while not in long mode.

The content of each of the XMM registers may be considered to be one of the types below:

• 16 bytes (which we saw in the AES-NI implementation)
• Eight 16-bit words
• Four 32-bit double words
• Four 32-bit single precision floating-point numbers (we will use the registers this way throughout the chapter)
• Two 64-bit quad words
• Two 64-bit double precision floating point numbers

SSE instructions are able to operate on the same parts of registers that are used as operands and on different parts of the operands (for example, they can move the lower part of the source register to the higher part of the destination register).