1

Fundamentals of Integrated Circuits

Objectives

To understand the key applications of integrated circuit (IC) technology, which are prevalent in many verticals and industries, because knowledge of these applications builds awareness and helps students and readers expand their scope of thinking of IC.

  • History and development of IC technology, from its humble beginning by researchers to wonders in modern electronics and technology
  • Basic concepts for the fabrication of active devices such as diode, BJT, JFET, MOSFET and electronic components such as R, L and C and their interconnections
  • Working concepts of ICs by understanding device configurations, component specifications, and various features such as gain bandwidth
  • Device identification and the procurement practices of various vendors
1.1 INTRODUCTION

I think there is a world market for maybe five computers.

—Thomas J. Watson,

Chairman, IBM, 1943

Where a calculator on the ENIAC is equipped with 18,000 vacuum tubes and weighs 30 tons, computers in the future may have only 1,000 vacuum tubes and weigh only 1.5 tons.

—Popular Mechanics, 1949

There is no reason anyone would want a computer in their home.

—Ken Olson,

President, Chairman, and Founder, Digital Equipment Corp. (DEC), 1977

These are the predictions by industry luminaries and publishers in the early 20th century, when electronic circuits using vacuum tubes appeared in the market. Even if some of these may be urban legends, it is probably true that none of those famous people predicted the outbreak of computers and electronic chips, which are now so integral to the rapid progress of mankind.

Today, we see many applications using integrated chip technology. Some of these we see (televisions), some we carry (smart phones, laptops), and soon we will be wearing them (wearable computers, Google Glass). The following is a short list of such applications, to help us identify them:

  1. Consumer and home electronics:
    1. (a) Televisions with LED/LCD 3D screens, with resolution up to ultra high definition (HD) (4xHD, 4x1028) and Internet connectivity
    2. (b) Tablets, smart phones, and phablets (tablets with phone features) with 3G/4G connectivity, with millions of software applications running on iOS/Android/Tizen mobile operating system (reaching octa-core ARM (Advanced RISC Machine) microprocessors as of March 2014)
    3. (c) Wearable computers such as Google Glass—a pair of glasses with built-in display and connected to the Internet and nanomaterial-based wearable shirts with built-in sensors and microprocessors used for medical monitoring and security
    4. (d) Laptops and desktops (more of a phenomenon of the past 20 years, and now replaced by tablets and smart phones, used for business and personal purposes)
    5. (e) Home energy management (HEM) and automation (sensors and controllers working together with smart grid implementation of utilities for providing comfort and conserving energy)
    6. (f) Connected devices to facilitate energy conservation and other maintenance needs (future refrigerators and air conditioners will come with connectivity to send consumption and settings data to any managing gateway and also receive signals to participate in energy and demand response tasks of a smart grid)
  2. Industrial Internet and Internet of Things: The Internet, started in 1995, has brought together the entire world (knowledge, information, and data; publications; companies and their products; governments and their services, and most popular communications such as email) to the fingertip of global users. Now, General Electric (GE) and Cisco envision the same level of connectivity to be extended to all devices (end devices, meters, sensors, and controllers) to come together for unique applications. These can be as follows:
    1. (a) An automobile system can detect a problem with a part in a running car and communicate with the nearest workshop and even with the manufacturer (and their supplier).
    2. (b) When an electric utility sees the peak demand increasing within a neighbourhood or city, a demand response signal can be sent out to large load devices in the field (air conditioners and refrigerators in the home, HVAC in buildings) and request for energy conservation.
  3. Smart grid for electrical, water, and gas utilities: This involves a broad upgrade of the existing infrastructure, which is decades old, with new range of electronics, communication, and information technology (IT) systems so as to make the supply reliable, secure, and cheaper and to help the environment.
  4. Automobile electronics: Today’s computers have many sensors and controllers spread all across the cars that are connected to microprocessor-enabled smart systems. These are used to identify wear and tear issues and help troubleshoot, thereby improving overall customer experience, security, and comfort and extending the life of the car.
  5. Medical technologies (advanced diagnostics, telemedicine): With the help of advancements in medical technology in sensing, diagnosis, and treatment, the average human life span has been extended to about 65 years in India and 80 years in the USA.

    Medical robots can do health check-ups that are cost effective and can provide quality service anywhere in the world (extending into rural areas). With check-ups, issues can be identified ahead of time, and preventive care can be administered.

    For providing proactive medical care, advanced sensors are coming up in patient-friendly packages, such as a heart monitor in a locket that continuously monitors the heart beat and rate, identifies any issues, notifies the patient’s relatives and the nearest hospital, and even calls for ambulance.

    When combined with nano-robots, surgeries will be more sophisticated, ensuring higher success rate. Three-dimension printing is going to be used to recreate sample models of internal organs, ahead of the operation, based on the diagnostic data, so that surgeons can plan their surgeries more meticulously.

  6. Space missions and satellites: Curiosity is a rover that was launched to Mars on 26 November 2011 and it continuous to send enormous data live, helping us to expand our understanding of the Red Planet.

    India’s Indian Space Research Organization (ISRO), as part of its Chandrayan mission, sent an unmanned lunar probe in 2008 and followed it by manned lunar rover in 2016.

    Satellites have become commonplace, with ISRO taking a firm market position in launching satellites into geosynchronous orbits using its indigenously developed Polar Satellite Launching Vehicles (PSLVs).

  7. E-government systems: Advanced and sophisticated software systems are being deployed on low-cost computers and communication networks—a serious and committed initiative taken up by all countries for providing transparency and ease of use of government functions to their citizens.
  8. 8. Advanced applications: There are many more advanced applications such as modern warfare systems (guided missiles for short and very long ranges), robotics and related systems (for home, industrial production, and automation), and radar systems in airports and seaports.

More and more sectors are being influenced by the integrated chip technology and heavily depend on it for their faster growth.

1.2 HISTORY

Now, let us move back in time and see how the electronic revolution began.

In 1958, Jack Kilby at Texas instruments invented the integrated circuit (an oscillator circuit), which is now universally known as IC. For his pioneering work, he was awarded the Nobel Prize in Physics in 2000. Jack Kilby’s work was named an IEEE milestone in 2009. Robert Noyce, an engineer at Fairchild Semiconductor, is also considered to have invented the IC at the same time as Kilby.

Initial designs of electronic circuits used electronic devices with resistor (R), inductor (L), and capacitor (C) components. However, continued growth in miniaturization and IC technology has made modern gadgets of very small size with low power operation possible.

1.2.1 Invention of Planar Technology for IC Fabrication

  1. Jack Kilby used gold wires to connect individual circuit elements on the IC, making the invention difficult for commercialization and large-scale adaption.
  2. In 1958, at Fairchild, Jean A. Hoerni developed PN junctions using.
  3. In 1959, Hoerni’s process was further advanced by Robert Noyce with the idea of evaporating a thin layer over the PN junction circuits. This layer connected through holes in silicon dioxide to the junctions and then etched to interconnect the circuit.
  4. This is the beginning of planar technology, which laid the foundation for the design of complex ICs.

Overall, the following three key inventions paved the way for IC technology:

  1. Invention of transistor at Bell Labs, New Jersey, USA (we should thank AT&T for its immense contribution to mankind)
  2. Invention of the IC at Texas Instruments
  3. Invention of the planar IC process at Fairchild Semiconductor

The focus of this book is on aiding students, teachers, and engineers understand the principles of electronic system design using ICs.

Until the evolution of ICs, both analog and digital circuits were assembled with dis­crete components interconnected by conducting wires. A new process was developed during the 1960s to fabricate all circuit components as a single unit on a silicon chip. This process is known as integrating the circuit to perform a well-defined function using microcontroller ICs, operational amplifiers, and so on.

An IC consists of multiple electronic components such as transistors, field-effect transistors (FETs), complementary metal-oxide-semiconductor (CMOS) devices, resistors, capacitors, and inductors (using gyrator concept). Electronic components are suitably interconnected on a semiconductor wafer (chip) using wires, based on a design. The study of linear ICs includes step-by-step learning of system-level architecture and design to achieve required application.

Moore’s Law

In 1965, Gordon E. Moore, Director, R&D, at Fairchild (later co-founder of Intel Corporation), published a paper about cramming or integrating more and more components into ICs. Moore observed that the number of transistors (transistor count) on ICs would double every two years. This came to be famously known as Moore’s Law. It was later amended that the doubling effect happens every 18 months.

1.2.2 Brief History of Various Developments in IC Technology

  1. 1960—Epitaxial deposition was developed in 1960 at AT&T Bell Laboratories (New Jersey, USA). In this process, a single crystal layer is deposited on a crystalline substrate. This method is widely popular in the fabrication of bipolar and sub-micron CMOS circuits.
  2. 1960—The first MOSFET (metal-oxide-semiconductor field-effect transistor) was fabricated by Dawon Kahng and Martin Atalla at AT&T Bell Laboratories.
  3. 1961—The first commercial IC was introduced by Fairchild Semiconductor (San Jose, California, USA) and Texas Instruments (Dallas, Texas, USA).
  4. 1962—Transistor-to-transistor logic (TTL), a class of digital circuits, combining logic gating and amplifying functions was invented. TTL is notable in the widespread use of IC technology in computers, consumer electronics, controllers, and so on.
  5. 1962—The semiconductor industry picked up steam and touched sales of $1 billion (USD), demonstrating the potential of the upcoming new IC age.
  6. 1962—Radio Corporation of America (RCA) Laboratories (Somerville and Princeton, New Jersey, USA) designed the first metal-oxide-semiconductor (MOS), led by Steven R. Hofstein and Frederic P. Heiman. This was later followed by many releases. RCA used its digital parts in its computers (RCA Spectra 750) and radio frequency (RF), intermediate frequency (IF), video, and audio amplifiers in its television sets (RCA TV).
  7. 1963–64—The MOS IC was first used by General Microelectronics to pack more transistors than bipolar technology (at lesser cost), building the first IC chip for calculators.
  8. Fast forward to 1993—Intel Pentium I was invented, which sparked the desktop computer revolution. The Pentium processor had 3.1 million transistors and a fast clock of 60–66 MHz (built on a die size of 264 sq. mm).
  9. 9. 1994—The semiconductor industry business passed the $100 billion landmark, growing from a humble beginning of $1 billion in 1962—a hundred times growth in just 32 years.
  10. 1994—This year also saw the release of 64Mbit DRAM (dynamic random-access memory) using the CMOS process. CMOS is a digital design technology that uses complementary and symmetric pairs of MOSFETs (P type and N type), resulting in low power requirements and providing the ability to pack many more transistors (pushing, or rather following, Moore’s Law).
  11. 1997—Intel Pentium II was manufactured using CMOS technology, packing 7.5 million transistors and achieving a clock speed of 233–300 MHz (on a die of size 209 sq. mm).
  12. 12. 1998—CMOS technology was used to produce 256Mbit DRAM chips, further speeding up computer operations in server machines as well as desktops.

Table 1.1 provides a snapshot of the history of processors and their transistor count.

tbl1.1

Table 1.1 Snapshot of History of Processors and Their Transistor Count

Intel announced in 2012 that the Xeon Phi family of processors (after Pentium and Itanium) plans to achieve performance greater than one teraFLOPS (tera floating-point operations per second), using 22 nm process size.

The impact of electronics and digital technology is widespread, across every vertical that is visible to us (mobile phones, televisions, etc.) or not so visible (industrial electronics, automation, satellites, etc.) in a wide range of applications in various fields including medical, defence, e-governance, consumer, research, and space. Many of these applications were provided at the beginning of the chapter.

1.3 INTRODUCTION TO ICs

In electronic parlance, a monolithic IC is known simply as an IC. It is also called as a silicon chip, chip, micro chip, or micro circuit. An IC contains a miniaturized set of electronic circuits in a plastic or metal housing. It is very compact in size and consists of many active devices, diodes, transistors, FETs, MOSFETS, and passive circuit components (R, L, and C) in an integrated form on silicon semiconductor wafers.

The evolution of ICs has revolutionized the world of electronics starting from televisions, radios, mobile phones (migrating to smart phones), and tablet computers (7” mini to 10” full screens that are fast replacing desktops and laptops) to electronic monitoring and managing circuitry in automobile, aerospace, medical, and defence technologies. They are embedded into almost every gadget around us that we may or may not see.

Integrated circuits are designed for specific functions. Analog ICs such as operational amplifiers are used in amplifiers, comparators, analog computers, filters, analog to dig­ital converters, digital to analog converters, and so on. Digital ICs are used as logic gates, counters, flip-flops, microprocessors, microcontrollers, central processing units (CPUs), field-programmable gate arrays (FPGAs), and so on.

Some advantages of ICs are (a) small size, (b) low cost of production, (c) low power consumption, and (d) ability to contain several sets of electronic circuits in one package.

1.4 CLASSIFICATION OF ICs

Integrated circuits are classified into the following types depending upon the number of gates on the chip:

  1. SSI (small-scale integration), in which the IC has up to a dozen logic gates per chip
  2. MSI (medium-scale integration), in which the IC has a few hundreds of gates per chip, which are interconnected to perform some specific function
  3. LSI (large-scale integration), with a few thousands of transistors per chip
  4. VLSI (very-large-scale integration), with hundreds of thousands to millions of transistors per chip
  5. ULSI (ultra-large scale integration) with billions of transistors per chip
  6. WSI (wafer scale integration) to build VLSI using total wafer
  7. 7. SOC (system on chip) containing all the components of a computer or other well-­defined systems

The IC specifications depend upon customer needs, performance, and marketability. Each IC is a single unit, packaged with a designed and imprinted circuitry (for a specific purpose—microprocessor, DRAM, graphics processing unit, etc.) with pins (terminals that come out of the IC from either two sides or all four sides) for connecting inputs, outputs, and power supply. IC pin numbers can be identified from the manufacturer’s data sheets.

Data processing and communication device requirements have increased multifold. The evolution of VLSI design, implementations through ICs, and cutting edge technology have made the present-day systems possible.

Depending upon their applications, ICs can be classified as follows:

  1. Analog (linear) and digital ICs:
    1. (a) Analog ICs process analog signals.
    2. (b) Digital ICs work by using Boolean algebra based on 1 and 0 signals in the logic gates. Some examples for digital ICs include DSP (Digital Signal Processing) chips, microcontrollers (8051), and microprocessors (8086, Pentium, Itanium, etc.). Present day world is going on to digital transactions.
  2. Mixed signal ICs: These have both analog and digital circuits on the same chip. Examples include analog to digital converters (ADC) and digital to analog con­verters (DAC). Various varieties of ICs are manufactured in large quantities for vari­ous industries. Several practical applications are grouped into universal circuits such as logic gates and microprocessors.
  3. Highly specialized components as standard ICs: Specialized high-performance functions are placed in a single IC to meet other applications. Examples are network interfaces (in high-performance Ethernet cards) and single-chip floating-point processors (for special operations).
  4. Application-specific integrated circuits (ASICs): If the required number of chips for a specific application is in large volumes, single ICs are fabricated by combining the desired features of several standard ICs. Such single IC units reduce the circuit size, cost, power consumption, and resulting heat. Examples include microcontroller chips.
  5. Systems on chip: The SOC device concept evolved during the previous decade after 2000. It revolutionized IC design and manufacturing process technologies. A complete circuit such as the CPU of a computer can be implemented on a single chip using specialized component ICs. Examples of SOCs are memory circuits, input and output interfaces, graphics processing units, and clocking blocks. SOCs are mostly used in notebooks and laptops. They consume less power, space, and cost. These chips have high reliability, performance, and power management features. Power management is mostly required during switch on and sleep operations of a computer.

Figures 1.1(a) and 1.1(b) show typical SSI ICs:

GR01a

Fig. 1.1(a) Quad Two-input OR Logic Gates (IC 7432)

GR01b

Fig. 1.1(b) NOT Gate IC 7404 Containing Six NOT Logic Gates

  1. IC 7432 contains quad two-input OR logic gates with 14 pin dual in-line (DIP) ­package. Outputs have direct compatibility with CMOS and N-MOS TTL logic family devices. There is high noise immunity.
  2. 2. IC 7404 contains six NOT logic gates (inverters), which perform logic invert operation. The output of an inverter is the complement of its input logic state. If the input is 0, the output is 1.
1.5 ADVANTAGES OF IC OVER DISCRETE COMPONENTS
  1. Scaling (size and space):
    1. (a) An IC consists of a semiconductor wafer with dimensions as low as 100 mm in diameter and 0.15 mm in thickness. Millions of devices can be fabricated on this wafer depending upon the circuit design.
    2. (b) Each wafer is further divided into hundreds of rectangular areas called chips.
    3. (c) A complete circuit is fabricated on each chip to perform a defined function.
    4. (d) Costs come down drastically due to mass production using batch-processing system.
    5. (e) Miniaturization and compact systems are possible due to packaging of entire system or subsystem on a chip. This results in reduced size, built-in interconnections, and reduced cost of the overall system.
    6. (f) Devices with identical features can be obtained. This helps in the use of matched transistor pairs in push–pull amplifiers and differential amplifiers (as used in operational amplifiers).
    7. (g) These systems can be complete CPUs (of a computer), memory circuits, graphics processors, sensors, and so on, simplifying the assembly of final systems (computers or mobiles).

      Figure 1.1(c) shows a view of an IC and other components on a printed circuit board (PCB).

      GR01c

      Fig. 1.1(c) View of IC and Other Components on a PCB

  2. Reliability:
    1. (a) The manufacturing process consists of assembling all components and their interconnections at the same time as a batch. Hence, an IC functions reliably for a long period of time.
    2. (b) Batch processes in IC manufacturing facilitate the selection of matched components with identical specifications related to system design.
    3. (c) The circuit design requires matched components as, for example, in push–pull amplifiers. It is possible in IC fabrication.
  3. 3. Power consumption by IC: Due to miniaturization of the circuit components and interconnectivity, operating voltage and current requirements are less. Therefore, power dissipation is quite low in active devices using ICs.
1.6 BASIC CONCEPTS OF IC FABRICATION USING MONOLITHIC IC TECHNOLOGY

Integrated chips are manufactured on thin circular slices of silicon semiconductors known as wafers. Typical wafer diameter is of the order 100–300 mm.

Silicon is a naturally available mineral abundantly found in the earth’s crust. It is a semi-metallic element and appears as sand in nature. It is a semiconductor with an ­electrical conductivity characteristic between that of a conductor and an insulator. Its electrical properties suit perfectly well for manufacturing electronic devices and components in the IC form.

Silicon in its natural form as an ore (after mining from earth) appears as in Fig. 1.1(d) (under electron micrograph). Polycrystal silicon ore is melted in vacuum and processed into pure silicon crystal ingots. They are made into cylindrical ingots and then cut into ­different sizes. Silicon wafers are available in circular shapes. They are fabricated with N-type and P-type conductivity to suit the different conductivity level requirements in industry.

GR01d

Fig. 1.1(d) Image of Silicon Material from Electron Micrograph

Size and purity are determined (in the process) keeping in view of the characteristic features of silicon wafers used for the manufacturing process of monolithic ICs. A silicon wafer is the basic building block for manufacturing ICs (Fig. 1.1e).

GR01e

Fig. 1.1(e) Single Crystal Wafer

Thousands of individual ICs are fabricated on each wafer. Figures 1.2(a) and (b) show the details of an IC memory circuit with various blocks and pins for connections to electrical signals (both inside the chip and to external circuits). Figure 1.2(b) shows the total IC in a plastic package.

GR02a

Fig. 1.2(a) Microcontroller Circuit with Input and Output Terminals (pins) for Specific Functions

GR02b

Fig. 1.2(b) IC in Plastic Packaging Encapsulates Various Compo­nents Fabricated

IC Fabrication Using Patterned Diffusions

The internal details of integration of various systems in IC are shown in Fig. 1.2(a). In monolithic ICs, all active devices (diodes, transistors, FETs, and MOSFETs) and passive circuit components (R, L and C) are fabricated on a single (mono) wafer of a silicon semiconductor material. Aluminium metallization provides interconnection of several interlinked components in the circuit.

Electrical signals in the chip device are transmitted through conducting layers or wires to the metallic pins on the outer package periphery of the IC for both input and output. The internal wires electrically bond the chip to the package and the chip is held in the package cavity by glue (epoxy resin, as shown in the figure). Packaging in plastic is popular and the process is known as encapsulating in plastic. It is done by melting plastic around the chip, with the metal pins (used for external electrical connections) bent to the correct positions (as shown in Fig. 1.2b). IC technology is progressing with miniaturization to suit various applications.

IC packaging is the final stage of fabrication of an IC. Various components assembled on the silicon wafer (using different technologies) with ­connection terminals are encapsulated in different types of packages that provide environmental protection and help to use the total IC as a single unit for further system development. Metal pins are used for input and output circuit connections, power supply leads, and so on as per the system design of an IC.

The following are the three main types of packages (shown in Figs 1.2c and d).

GR02c

Fig. 1.2(c) Ceramic Flat Package IC with Input and Output Pin Connections for Internal and External Circuits

  1. Flat package: In the initial years of ICs, flat packaging was done using ceramic or ­plastic. This process was invented by Y. Tao at Texas Instruments in 1962 for low power dissipation (as shown in Fig. 1.2c).
  2. Dual in-line plastic or ceramic package: This contains 8, 14, 16, 28, 52, or more number of pins (Fig. 1.2d).
    GR02d

    Fig. 1.2(d) IC in DIP

  3. 3. Metal can package or transistor outline packaging: Metal package is used for ­transistors with the maximum leads limited to 10 (Fig. 1.2e).
    GR02e

    Fig. 1.2(e) Operational Amplifier 741 with Metal Can Packaging (Device and Pin Number Details)

Comparison of BJT, N-MOS Transistor, and CMOS Devices

Different types of transistors have different IC design and fabrication technologies. Their use is based on the power and speed requirements in view of practical application such as microprocessors and logic circuits.

Consider three types of transistors that function as logical NOT (inverter) circuits (Fig. 1.3). However, the three types of transistors have different behaviours as regards to speed and power management.

GR03

Fig. 1.3 (a) BJT; (b) N-channel MOSFET Inverter; (c) CMOS Inverter Circuits

Bipolar junction transistors (BJTs) run faster than FET and CMOS devices, whereas CMOS devices consume less power in consumer device applications compared to the other two transistor types.

High-frequency Signal Issues Considered during IC Layout Design

Digital signal transmission over ICs does not have any issues up to 30 MHz and the system works normally. However, for transmission at high-frequency signals (data), the signal waveform gets distorted due to the side effects.

  1. Crosstalk noise: Whenever two wires are near each other, the magnetic fields around the wires interact. Such interactions cause cross coupling of energy between signals and result in crosstalk noise.
  2. Reflection noise: It is caused by impedance mismatch and characteristic impedance issues when transmitting high-frequency signals over communication wires.
  3. Power grounding noise: This noise appears due to fault (switching currents) in the grounding wires or buses in the chip and causes interference.
  4. Electromagnetic interference (EMI): Problems occur due to electromagnetic induction or radiation from an external source (cathode ray tube or old television monitors, heaters, ovens, etc.), resulting in degradation of signal to total loss.
  5. Electromigration: Power densities along the wires cause either signal or power migration issues.
1.7 FABRICATION PROCESS OF A SIMPLE N-TYPE MOSFET

MOSFET is basically a voltage-controlled electronic switch with many applications as amplifiers, logic gates, memory chips, and CPUs. Nowadays, laptop computers with quad-core processors and mobile smart phones with octa-core chips with high clock speed and processing power are available in the market.

A MOSFET device is a material sandwich consisting of (a) metal, (b) oxide, and (c) silicon materials in it. The structural details given later provide better insight into the technology processes involved in IC fabrication and their utility values in the cutting edge technology of present and future systems.

N-Type Mosfet: For an N-type MOSFET, the substrate is a P-type silicon semiconductor. The device has three electrodes—source drain, and gate, where source and drain are two heavily doped N-type regions. Conductive layers of polysilicon material or metalized ­aluminium are deposited over a thin layer of silicon dioxide to function together as a gate electrode. The silicon dioxide layer acts as an insulating layer between the gate and the substrate. Metalized aluminium is used for the source and drain electrodes as well.

Device Structural Patterns: The manufacturing process forms patterns on the wafer to create devices and wires. IC manufacturing is very versatile and efficient, as a large number of identical chips can be processed at a time on a single chip (wafer).

  1. Selection of type of substrate (wafer):
    1. (a) Silicon wafer is a thin slice of silicon semiconductor material (monocrystal). It is used in the fabrication of monolithic ICs.
    2. (b) The starting wafer is a P-type substrate for an N-type MOSFET and an N-type substrate for a P-type MOSFET.
    3. (c) A P-substrate is selected here to obtain an N-channel MOSFET. The substrate is also called as the bulk or body. There is a terminal from the body for the MOSFET device.
  2. Wafer cleaning (preparation of wafer): Wafers are chemically cleaned to remove any ­contamination that may be present on the wafer. Surface preparation and cleaning of ­silicon (P type or N type) wafers is an important step in the manufacture of ICs. It includes both physical and chemical processes. The thickness of the wafer is about 500 μm.
  3. Silicon dioxideepitaxial layer formation: ICs are fabricated in bare, clean silicon wafer by patterning different layers of the device and other components depending on the details of the required IC (Fig. 1.4).
    GR04

    Fig. 1.4 Formation of Silicon Dioxide Layer on P-type Substrate

    A silicon dioxide epitaxial layer of the order of 1 μm thickness is deposited on the entire silicon wafer by exposing it to oxygen. It is a type of thermal oxidation (chemical process of reaction of silicon with oxygen) to form a silicon dioxide layer on the substrate material. The silicon dioxide layer forms an insulator between different levels of metallization and a mask between different diffusion processes. It functions as an insulating material in MOS transistors and as a dielectric material in MOS capacitors.

  4. Photosensitive resist material coating: Kodak photoresist (KPR) material (light-­sensitive material) is coated uniformly on the entire silicon dioxide layer (Fig. 1.5). It guides ultraviolet light (UVL) radiation through unpainted regions on the mask. To prepare a uniform layer, the photoresist material coating is applied on the wafer while the wafer is spinning. The thickness of the deposited layer is about 1 μm (1 μm = 1 × 10−6 m).
    GR05

    Fig. 1.5 Kodak Photoresist Material Film Coating On Silicon Dioxide

  5. Photomask with paintings on regions to form islands (wells): This is shown in Fig. 1.6.
    GR06

    Fig. 1.6 Rolex Sheet Acting as Photomask with Two Painted Regions

    1. (a) Patterning techniques use photomask (Rolex sheet) on which paintings are made on appropriate places ­depending on the number of devices and needed diffusions. The patterns are based on planned circuit layout.
    2. (b) To fabricate a MOSFET, two islands are formed in the P-type substrate, and for N-type diffusions.
  6. Formation of windows or islands: Opaque paint is coated at two places on the photomask to form drain and source N-type material islands.

    Manufacturing of different components such as bipolar transistor, MOS transistor, and CMOS device is done with changes in the painted regions on the masks to obtain relevant circuit patterns of wires and areas of devices on chips.

  7. Exposure to UVL radiation:
    1. (a) Exposure of wafer to UVL radiation causes polymerization (hardening) of the photoresist material (light sensitive liquid) on the silicon dioxide layer in the exposed areas (through photomask) (Fig. 1.7).
      GR07

      Fig. 1.7 UVL Radiation Exposure to Photomask with Painted Regions

    2. (b) The two regions of the photoresist material and the silicon dioxide layer below the painted regions (on the mask) remain soft.

    The process discussed in steps 5–7 is known as photolithography. Photolithography is used to mask patterns on different places on the wafer for polymerization of silicon on certain areas. Identification and formation of well (island) areas depends on the device patterns (e.g., transistor, diode, FET, MOSFET, and L, C, and R elements) and diffusions for P-type or N-type materials.

  8. Etching process to form two wells (openings) after photolithography: Immediately after the completion of the photolithographic process, the wafer undergoes the etching process to remove the silicon dioxide layer and the soft ­photoresist material below the painted regions on the mask. Thus, two wells (openings) are formed in two areas (Fig.1.8).
    GR08

    Fig. 1.8 Etched Regions to Allow Diffusion of N-Type Islands for Source and Drain

  9. 9. Removal of remaining photoresist ­material: The hardened photoresist material is cleaned (removed) with another type of chemical material (Fig. 1.9).
    GR09

    Fig. 1.9 Removal of Photoresist Material and Formation of Two Windows in Silicon Dioxide to Diffuse Source and Drain N-Type Islands

  10. Diffusion of N-type impurities in window areas to form source and drain: The diffusion (or ion implantation) process uses N-type dopant (doping agent) atoms such as phosphorus and arsenic (pentavalent dopant atoms). Pentavalent atoms are diffused into the silicon semiconductor in controlled magnitudes to suit the designed device current and power levels. The dopant material concentrations are monitored by an electron microscope based on the conductivity levels of the areas on the chip layout (Fig. 1.10).
    GR10

    Fig. 1.10 Formation of Source and Drain Using N-Type Diffusions

  11. Metallization of aluminium for gate area and aluminium metal contacts for source, drain, and gate electrodes (Fig. 1.11):
    GR11

    Fig. 1.11 Aluminium Metallizations for Gate and Metal Contacts to Gate, Source, and Drain Electrodes of N-Type Mosfet

    1. (a) The final product may not be perfect in all respects. Wafers are cut into smaller chips, and each IC is individually tested. Once the ICs pass the test, they are placed in designed packages for marketing and use.
    2. (b) Integrated circuits use transistors and circuit connections through wires as per the circuit design layout. IC circuits are very small, and miniaturization of the circuit size reduces the transit times for charge flow, resulting in low power, fast cycle, and low cost.

Nowadays, polysilicon material depositions are replacing ­aluminium metallization because of better ­conductivity. Polycrystalline silicon reduces the threshold voltage VT to the order of 1–2 V (due to increased conductivity). It enables the MOSFET to switch on at lower gate voltages.

The MOSFET has four terminals as shown in the Fig. 1.12. In addition to the three normal electrodes, namely source, gate, and drain, used for regular analysis, it has a fourth ­terminal connected to the body of the device. Silicon gate technology was invented in 1968 by Frederico Faggin, an engineer at R&D laboratories of Fairchild Semiconductor, Palo Alto (later developed as the famous Silicon Valley), California, USA. (Self-aligned gate MOS IC was invented by Frederico Faggin, extending the research path of AT&T Bell Laboratories). This technology has improved the performance of silicon gate transistors with increased speed and reliability. It requires a smaller area of silicon. Fairchild 3708 analog multiplexer was the first commercial product developed using silicon gate transistors. Previously, ICs with BJTs were faster and consumed less power than MOSFET-based ICs. However, the advantages of silicon gate transistors have helped overcome the limitations of the MOSFET devices. Since its invention, most of the complex ICs use silicon gate technology in MOS transistors, replacing the older bipolar technology. Study of this historical evolution should induce enthusiasm in young electronics and communication engineers of the present era.

GR12

Fig. 1.12 MOSFET Structure and Its Terminals

The following are the processes involved in the fabrication of ICs:

  1. Making silicon wafers: Silicon wafers are created in super-clean vacuum chambers where the silicon material is cleaned, made into highly pure ingots (cylinders), and cut into very thin wafers (slices).
    1. (a) Clean vacuum chambers: Surface preparation and cleaning of silicon (silicon dioxide, P type, or N type) wafers is important in the manufacture of semiconductors and ICs. It comprises both physical and chemical processes, implemented in vacuum chambers (with rigorous control of all contaminants). Refer to Vacuum Physics and related topics for more detail.

      Since the circuits are being designed at a nanoscale, even a tiny dust particle can damage the circuit function. Air is filtered and re-circulated continuously to maintain a dust-free atmosphere, and the employees wear dust-free special uniform while working inside the chambers.

    2. (b) Create pure silicon ingots (cylinders): Sand of good quality (Australia is a major source) is melted at very high temperatures (1600°C) and mixed with a pure seed crystal to create pure silicon ingots (of 99.9999999% purity). These ingots are of different lengths and diameters. These ingots are formed into the right diameter (1”–12” in diameter, may extend to 18”) and length, as required for wafer preparation.
    3. (c) Cut into wafers: Silicon ingots are sliced by high-precision diamond saws into thin and highly polished wafers. These wafers may have thickness ranging from 275 μm for 2” diameter to 525 μm for 5” diameter, basically thicker for wafers of larger diameter. These cut wafers are polished, verified for those with the same thickness and flatness as per specification, and separated out for further processing.

      Typical electronic circuit elements such as transistors (BJT, FET, and MOSFET), capacitors, and resistors are created into layers of these wafers. Moreover, hundreds of chips are etched onto each wafer.

  2. Photolithography: The electronic circuit layout is designed and patterned on top of the silicon wafers. The method of writing circuit and device patterns onto silicon wafers (using optical or UV radiation) is known as photolithography. Various circuit elements are built in epitaxial layers on the silicon wafer. The word lithography is a combination of the words lithos (meaning stone) and graph (meaning write)—­writing on stone—and photo stands for light.

    Integrated circuits are designed through simulation on computer aided design (CAD) systems and tested thoroughly to perfection using different types of integral software tools. Based on the completed design, a number of glass photomasks are made for the implementation of various epitaxial layers in the circuit. These ­photomasks (one for each layer) are applied on the thin wafer or substrate to imprint a pattern of circuit using photolithography.

  3. Epitaxial process: The formation or deposition of an ordered crystalline layer on the thin wafer or substrate is the process of epitaxial growth. The term epitaxy is a combination of the two Greek words epi (meaning upon) and taxis (meaning orderly arrangement). During epitaxial growth, doping concentrations in the device structure are controlled suitably to improve device performance levels.
  4. Metallization: Aluminium is used for metallization during IC fabrication to connect various parts and components in the IC. Bonding wires (25 μm diameter).

    Connect the bonding pads (100 μm × 100 μm aluminium areas) from various areas of package to chip. They also interconnect various parts in the electronic circuit in the chip. Aluminium metallization conducting layers have the following advantages:

    1. (a) Easy process of forming thin conducting layers inside the IC
    2. (b) Least resistance conducting path (ohmic contacts only)
    3. (c) Good conductivity
    4. (d) No reactions with other materials used in the device or component making processes
    5. (e) Mechanically stable interconnections in the circuit

    These advantages make aluminium the preferred material for VLSI circuit fabrications. Aluminium metal layers are patterned to produce the necessary interconnections and bonding pad configurations for IC manufacture.

  5. Etching: The etching chemical removes the unwanted material from the wafer after the completion of each photolithographic process.
  6. Assembly and packaging: Each silicon wafer is designed to contain numerous devices and circuit components depending upon the circuit design. Individual ICs are separated and packaged.

    There are three types of packaging styles:

     

    1. (a) Flat ceramic or plastic packaging (invented in 1962 by Y. Tao at Texas Instruments)
    2. (b) Metal can type encapsulation for transistors with a maximum of 10 terminals
    3. (c) Dual in-line packages containing 8–52 pins (several ICs such as microcontrollers, microprocessors, and FPGA contain more pins (typically requiring pins on all four sides) to deal with internal and external circuit connections)

    Working environment (mounting and soldering) with ICs having DIP is more convenient on printed circuit boards. Most of the mother boards on personal computers, laptops, and electronic gadgets have easy assembling facilities for DIP ICs.

    If an IC is available with all the types of packages, the choice of selection lies on the assembly environment, cost, and reliability of handing the system.

1.8 BASIC STRUCTURAL DETAILS OF MOSFET (MOSFET FABRICATION IN IC FORM)
  1. MOSFET has three terminals: (a) source, (b) gate, and (c) drain (Fig. 1.13).
    GR13

    Fig. 1.13 Structure of N-channel MOSFET (with N-channel between Source and Drain

  2. Gate-to-source voltage VGS controls the conduction state of power MOSFET.
  3. There is an insulating layer between the gate and an electrostatically induced channel of electrons (for N-Channel MOSFET) between the drain and the source.
  4. Applying gate-to-source voltage VGS larger than the device threshold voltage (↓V1 (TH)) (the minimum gate voltage VGS required for switching ON the device is known as the threshold voltage) causes the power MOSFET to turn ON by varying the geometry of the induced channel of electrons or modulating the channel conductivity in (MOSFET with built-in channel) DEMOSFET (depletion enhancement MOSFET) devices.
  5. Gate voltage levels control the MOSFET parameters to function as an electronic switch, amplifier, oscillator, and so on.

The scale down in MOSFET dimensions (VLSI and nanotechnologies) with a metal gate or polysilicon material gate along with proper adjustment of other parameters reduces parasitic capacitances and increases the speed of operation of the device. Reduction in the channel length between the drain and source reduces the travel time of charge carriers along the channel and increases the speed of energy flow. Horizontal length L of the silicon gate is called as channel length. It is about 1.5 μm.

A short-channel MOSFET has larger values of trans-conductance gm because gm α 1/L. Here, gm is a measure of the sensitivity of the drain current for changes in gate-to-source biasing voltages and it controls the device gain.

One of the major applications of MOSFET is as an electronic analog switch—replacing mechanical relays in electronic circuits. Mechanical relays were used in old telephone exchanges (automatic telephone exchanges), and BJT, JFET, and MOSFETs are used as electronic switches in modern circuits. An advantage of these electronic devices is that they can create a closed circuit condition (when the devices are in ON state) or an open circuit condition (when the devices are in OFF state) between two points in an electronic path based on the control signal on the other electrode (without any mechanical movements). Many of these switches are grouped together to work as multiplexer circuits in electronic exchanges. MOSFETs with a large gm provide larger values of voltage gain AV and gain bandwidth product. Figure 1.14 shows some more details underlying MOSFET fabrication in the IC format.

GR14

Fig. 1.14 Structural Details of N-channel MOSFET

1.9 SEMICONDUCTOR DIODE

Diode fabrication is done using epitaxial growth and diffusion technology. Thin layers of different materials are grown one over the other (epitaxial layers using different processes) to function as a single structure.

  1. A very thin silicon or germanium semiconductor material wafer (of design dimensions) is taken as the substrate material. The substrate could be (a) a silicon material if the diode is a silicon diode or (b) a germanium material if the diode is a germanium diode.
  2. An N-type epitaxial layer is grown on the substrate to form the cathode material for diode
  3. A metallic layer is formed at the bottom of the substrate for cathode connections to diode.
  4. In the N-type diode, P-material diffusion is made to form the anode for the diode.
  5. A silicon diode layer and metallization are formed for the anode contacts, as shown in the Fig. 1.15.
    GR15

    Fig. 1.15 Epitaxially Grown PN Junction Diode

This is the typical process of fabrication of a PN junction diode in IC chips.

1.10 INTEGRATED circuit (IC) RESISTORS AND CAPACITORS

1.10.1 IC Resistors

Integrated circuit resistors are manufactured by using the bulk resistance of either the base- or emitter-diffused regions (layers) of transistors. Diffused resistors are manufactured by controlling the concentration of doping impurity and depth of diffusion in the base or ­emitter regions of IC transistors. By controlling the doping concentrations, resistors of designed value can be obtained. IC resistors mostly use the base region of the IC transistor, as this region has the highest resistivity. Low-value resistors are manufactured by using the emitter region of the transistor, which has very low resistivity. The choice of the base region layer or the emitter region layer for diffusion depends upon the value of the resistor, temperature coefficient, and tolerance (amount of deviation of resistance from precision value).

Base-diffused Resistors

Figure 1.16 shows the formation of a resistor using base diffusion of IC transistors. This process is found to be very convenient, and therefore, base-diffused resistors have become quite popular.

GR16

Fig. 1.16 IC Resistor Using Base Diffusion

The value of a resistor can be estimated using the dimensions (parameters) of the resistor layer formation, as shown in Fig. 1.17. In this figure, L is the layer (sheet) length between points (1) and (2) in either base or emitter regions of transistors and A is the sectional area of the diffused resistor; as per design, A = W × T, where W is the width of the layer and T is the thickness of the layer under consideration for the resistor. Hence,

GR17

Fig. 1.17 Basic Dimensions of Resistor Layer to Determine Resistance Value

Eqn002

where ρ is the resistivity of the diffusion layer.

Temperature coefficient of resistance Eqn003

where PPM is parts per million and °C is degrees in centigrade.

Resistors in the range of 50 Ω to 50 kΩ are manufactured using the transistor base layer.

Emitter-diffused Resistor

The fabrication details of an emitter-diffused resistor are shown in Fig. 1.18. Emitter-diffused resistors are available from 10 Ω to 1 kΩ. The N-material layer of a transistor can be constructed as a resistor. Small-value resistors are manufactured by controlled diffusion in the emitter during the fabrication process. There are two aluminium metal contacts for the resistor terminals.

GR18

Fig. 1.18 (Transistor) Emitter-diffused Resistor

Polysilicon Resistors

Polysilicon material is used in silicon gate MOS technology to form the gate and to manufacture polysilicon resistors. These resistors are manufactured during the formation of gate regions of MOSFETs.

1.10.2 Monolithic Capacitors Using PN Junctions

Capacitors are fabricated by using the capacitance property associated with reverse-biased PN junctions of transistors.

Capacitance Eqn004 farads

A reverse-biased PN junction has a wide depletion region. The depletion region (works as a dielectric) in association with the two adjacent conducting layers (P and N materials) functions as a capacitor. The width d of the depletion region also depends upon the ­concentration of the doping material (dopant atom concentrations). Hence, the magnitude of the capacitance is inversely proportionate to the depletion region width d.

There are two methods of fabrication of IC capacitors.

  1. PN junction with depletion region as dielectric and the embedding P and N type materials as conducting planes function as capacitor
  2. MOS capacitors

Inductors in Integrated Circuits

Inductors are normally simulated using gyrators (operational amplifiers with capacitive load function as inductor at its input port).

The BJT structure in IC fabrication has two main PN junctions.

  1. One capacitance is between the emitter and base regions (layers) of a transistor, which is the emitter junction. It has a capacitance CEB. It can be fabricated during the formation of transistors in IC.
  2. The second PN junction is between the collector and base layers, which is the collector junction. It has a capacitance CCB.

Another capacitance CCS is between the transistor collector and P-type substrate. This junction capacitance with substrate forms parasitic capacitance. It is not practically used.

Switched Capacitors as Resistors

One of the specifications for IC design is optimization of chip space or area to reduce the chip cost and to accommodate more number of components in a given area. However, one of the major issues in fabricating large-value resistors is the requirement of a large area. Hence, this led to the invention of resistors that are simulated by capacitors, where the capacitors are operated in the switching mode.

From Ohm’s law, it is known that current I flowing through a resistor is equal to the ratio of voltage V across the resistor (V = V1 (1) − V1 (2)) and its resistance R, where V1 is the input voltage and V2 is the output voltage across the resistor.

The following explains the operation of a switching mode capacitor as a resistor (Fig. 1.19):

GR19

Fig. 1.19 Concept of Resistor Simulation Using Switching Mode Capacitor

  1. Two pulse inputs are applied to the gate terminals of two MOSFETs acting as switches S1 and S2. Transistor T1 acts as a closed switch in ON state, when the gate voltage pulse VP1 is high during the interval 0 to T1. Then, the capacitor charges to a voltage V1 with the polarity of voltage as shown on the capacitor. During this time interval, transistor T2 is in OFF state.
  2. During the time period T1 to T2, the transistor switch S1 is in OFF state, when its gate voltage is low. The second transistor switch S2 is in ON state, as its gate voltage is high. The capacitor discharges to voltage V2, which appears at the output port.
  3. Due to the two pulses, input voltages with phase intervals Φ1 and Φ2 (out-of-phase clock signals) switching actions between the ON and OFF states of the transistors transfer the capacitor voltages (charges) from the input port to the output port.
  4. The switching actions (mentioned in point 3) by the two electronic switching MOSFETs can be performed by the two clock pulse input voltages shown in Fig. 1.19. Such clock pulses can be generated by a 555 timer circuit explained in chapter on 555 IC.
  5. Current I is transferred during the switching processes between the two capacitor voltages V1 and V2.

    Eqn005

    where TS is the switching time.

    From this equation, resistance Eqn006 where fs is the ON and OFF ­switching frequency of the two transistors.

  6. The switching mode capacitor with frequency fs can function as a resistor with value Eqn007.
  7. This equation for resistance suggests that the value of resistance is inversely ­proportional to the values of capacitance and switching frequency.

Example 1.1

Calculate the value of a switching mode capacitor resistor R with following data:

  1. (a) Switching capacitor C = 1,000 pF
  2. (b) Switching frequency fs = 20 kHz

Solution: Switched capacitor (SC) resistor Eqn008

Eqn009

Switched mode capacitor resistors are used in operational amplifier integrator circuits, where they need large values of resistors to meet the requirement of time constant RC > 10 T, where T is the time period of the input pulse signal. A similar application of these resistors is in active filter circuits.

1.11 JUNCTION FIELD EFFECT TRANSISTOR (N-Channel FET)

A junction field effect transistor (JFET) is one type of FET. It has very high input impedance, and hence, JFET devices have become very popular in many electronic circuit applications. JFET was initially suggested by Julius Lilienfield in 1925, but practical devices came into the field of electronics only during the 1950s after the evolution of transistor and semiconductor device technology.

A JFET behaves as (a) an electronically controlled switch and (b) a voltage-controlled resistance. JFET applications in amplifier and oscillator circuits revolutionized electronics.

There are two types of JFET devices:

  1. N-channel FET
  2. P-channel FET

JFET (with Induced Channel) Fabrication Details in ICs

The basic structural details of an N-channel FET are shown in Fig. 1.20. An FET device consists of (a) source, (b) gate, and (c) drain. Biasing voltages are shown in the figure. The PN junction between the gate and the source is reverse biased, making the input impedance of JFET device very high. Hence, the device draws zero current from the signal sources. N+ regions at the source and drain electrodes are formed to provide good ohmic contacts.

GR20

Fig. 1.20 N-channel Junction FET

The processes involved in making an IC chip are shown in Fig. 1.20 with the help of the structural details of a single FET device.

1.12 BIPOLAR JUNCTION TRANSISTOR

Bipolar junction transistors are of two types: (a) NPN transistors and (b) PNP transistors (Fig. 1.21). An NPN transistor has three terminals—emitter, base, and collector. The emitter (N-material) is the source for electrons and is highly doped. The base (P-material) has a small area of cross section. It is lightly doped so that the base current Eqn010 is relatively smaller than the collector current (IC) and the emitter current (IE). Then, the collector and emitter currents are approximately equal Eqn011. The collector (N-material) has a larger area of cross section than the other two areas.

GR21

Fig. 1.21 (a) BJT NPN Transistor; (b) BJT PNP Transistor

The fabrication of PNP and NPN transistors are similar to MOSFET fabrication explained earlier. On a single wafer, there are thousands of transistors in batch processing in ICs. The PN junction between the collector and the silicon substrate is reverse biased to achieve isolation between transistors.

In IC BJTs, there are parasitic capacitance at the isolation provided by reverse biasing the junction between the collector and the substrate.

1.13 APPLICATION-SPECIFIC IC

Application-specific IC is a specialized IC, designed for a custom function or operation unlike general-purposes ICs such as microprocessors or DRAMs. An example of an ASIC is an IC designed solely to run a cell phone.

The microcontroller IC 8051 was first invented by Intel Corporation during the late 1970s. It has all blocks and functionalities associated with a computer. It is an SOC and has built-in read-only memory (ROM), random access memory (RAM), interrupts, clock circuits, input and output ports, and so on. Presently, Cadence Technology and Mentor Graphics tools are most popular in both industries and educational institutions for VLSI circuit layout design, synthesis, and testing. Microcontrollers are used in microwave ovens, VCD players, solar SCADA, energy monitoring and management systems, control applications, and so on.

1.14 IC ASSEMBLY AND PACKAGING

The final stage in the manufacturing of ICs consists of IC assembly and packaging. The assembled IC is kept in a case for mechanical support and to avoid physical damage to the electronic and mechanical structures. The external case is known as package. It supports the electrical connections between the internal circuit assembly and the external electronic system. Sometimes, packaging is also known as encapsulation or seal.

Assembly and packaging is done to provide high-quality prototype products to customers or consumers in the electronics industry. State-of-the-art machines of cutting edge technologies support different types of ASIC assembly and packaging for different worldwide manufacturers of similar products. Emerging technologies and market trends take care of the mass production, assembly, and packaging of ICs.

Assembly and packaging of an IC depends on the designed function and the intended place and conditions of usage. The IC assembly for a specific IC has to be defined and described to suit its requirements.

An IC assembly uses one of the following technologies for necessary electrical interconnections to the package (Fig. 1.22).

GR22

Fig. 1.22 Wire Bonding in IC Assembly

  1. Wire bonding: It is a highly reliable and flexible interconnection structure. Electrical wire interconnections use one of the following materials—gold, aluminium, or copper. There are two broad methods of electrical wire bonding used in the IC Assembly: (a) gold ball bonding and (b) aluminium wedge bonding.

    Gold ball bonding is done by using 25 μm wire between the IC layout node and the external package. This technology was used initially by AT&T Bell Laboratories, New Jersey, USA, in 1950 and the complete technology was developed by 1999.

  2. Tape automated bonding (TAB): Flexible metalized polymer tapes are used for mounting and interconnecting the IC circuit to the external packages (Fig. 1.23). It has the advantage of reduced wire loop lengths. Hence, it reduces the weight and improves electrical performance. This method is widely used since 1980. TAB interconnections are advantageous in a microprocessor and will allow ASICs to work better at high frequencies.
    GR23

    Fig. 1.23 TAB in IC Assembly and Packaging Technology

  3. Flip-chip bonding: This is the method of interconnecting the IC structural nodes to the substrate with the active face of the IC chip facing towards the substrate. This type of interconnection between the IC circuit layout and the package is very short with minimal resistance and better capacitance and inductive paths.

The following are the main purposes of IC assembly and packaging:

  1. Interconnect the IC with the rest of the electronic system (say, a CPU with the rest of the computer board).
  2. Provide mechanical support to the IC.
  3. Provide environmental protection (say, a heat sink on a CPU to control heat).
  4. Manage signal and power distribution from the nodes in the circuit to the external circuit or system.

The technology used in the IC assembly should (a) be flexible for IC replacement during the electronic system repairs, which is normally suitable to the Indian environment for ­servicing TVs, computers, or communication equipment, (b) be reliable in maintenance, and (c) thereby reduce the cost of the total electronic system.

GR24

Fig. 1.24 IC Assembly

Individual ICs are separated from the total fabrication used for mass production as ­follows:

  1. Each processed wafer contains hundreds or thousands of ICs (chips) on it.
  2. Individual ICs are separated from the wafer.
  3. Diamond-tipped saw tools are used to cut lines into the wafer surface and separate out the individual ICs (based on their dimensions).
  4. Individual ICs are separated by fracturing the wafer using the diamond tool cut.
  5. Individual assembling and packaging is done to suit the applications and use by ­different manufacturers and customers.

Different methods of packaging ICs

As mentioned earlier, the following methods of package are used for individual ICs:

  1. 1. DIP using ceramic or plastic moulding
  2. 2. Hermetic and ceramic flat package
  3. 3. Metal can package
GR25

Fig. 1.25 Timer IC 555 DIP

During the early years of IC technology, ceramic flat type package was used for IC chips. In the 1980s, ICs were manufactured with DIP for commercial applications of electronic circuits. In the late 1990s, plastic quad flat pack (PQFP) (e.g., logic gates) and thin small outline package (TSOP) ICs with a large number of pins (e.g., FPGA chip) evolved for high-pin IC applications such as FPGA, microcontrollers (8051 IC) (ASIC), and microprocessors.

After fabrication, the ICs are sealed in a package for easy operation and handling of ICs in electronic system design and manufacturing (ESDM). The importance of ESDM is increasing in the electronics industry worldwide.

1.15 OVERVIEW AND INTERPRETATION OF DATA SHEETS OF OPERATIONAL AMPLIFIERS
  1. Type of package used for IC: Metal can package and DIP package (Figs 1.26a and b)
    GR26

    Fig. 1.26 (a) Metal Can Package; (b) Fairchild 741 IC Dual-in-line Package

  2. Pin identification: From pin configuration diagram
  3. Supply voltage range: Maximum voltage for operation of operational amplifier is 10–36 V with nominal supply voltage
  4. Nature of service of IC: General purpose
  5. Large common mode and differential voltage range
  6. Operating temperature range: It depends upon whether the IC is used for commercial, industrial, or military applications.
  7. Power dissipation capability: For 741 IC, power dissipation is 500 MW. The power dissipation capability of an operational amplifier decreases with increase in its operating temperature.
  8. Bandwidth: Useful frequency range of application is 1 MHz.
  9. Input voltage range: ±15 V
  10. Maximum output voltage swing: ±10–12 V for different ICs
  11. Type of operational feature of amplifier: Frequency compensation incorporated
  12. Gain band width product: 1 MHz
  13. Mounting type: Through holes
  14. Number of pins in IC and their functionality: For the purpose of assembling and connection of terminals incorporated in the circuit
  15. Slew rate: 0.5 V/μs
  16. Rise time: The time it takes for a pulse to rise from 10 per cent (specified low value) to 90 per cent (specified high value) of its steady value
  17. Overshoot: This happens when a transitory signal goes over the expected final value (when changing from one state to another). A good design should have less overshoot or undershoot.
  18. Differential input voltage: VID = ± 30 V
  19. Large signal amplification: Typical value is 200.
  20. Short circuit protection provided.
  21. Offset null voltage capability: The potentiometer (10 kΩ) connected between the terminals on pins 1 and 5 nullifies the input offset voltage. At offset null, the ­operational amplifier output voltage will be zero (Fig. 1.27).
    GR27

    Fig. 1.27 Operational Amplifier Null Adjus­tment of Offset Voltage

  22. Voltage between offset null: ±0.5 V
  23. Low-power consumption
  24. Frequency compensation: Internal frequency compensation is provided. Hence, the amplifier operation is stable and does not require external components.
  25. Very high input resistance of the order of 1–2 MΩ
  26. Common mode rejection ratio (CMRR): 70–90
  27. 27. Supply voltage rejection ratio (SVRR)

The mostly used parameters of operational amplifiers are provided in this chapter in advance so that readers gain familiarity with various terms used in the succeeding chapters.

1.16 DEVICE IDENTIFICATION

Manufacturers print the name of the IC containing a ­minimum of seven letters or numbers on the top of the device, for example, 555 IC as shown in Figs 1.28 and 1.29. Here, the letters NE on the top of the IC represent the manufacturing company (Signetics). The three numbers 555 (type number) indicate that three 5 K resistors are used in the inside ­circuit. The letter S on the bottom row again indicates the company name (Signetics). In 7828, 78 indicates the year of the manufacture and 28 indicates the week in the year in which it was manufactured.

GR28

Fig. 1.28 Device Identification of 555 IC Using Printed Code Letters on Top of IC

GR29

Fig. 1.29 Identification of Pin Numbers on DIP ICs

1.17 PIN IDENTIFICATION AND TEMPERATURE RANGES

The number of a pin for pin identification of DIP ICs proceeds in the anticlockwise direction starting from a notch provided on the top of the plastic envelope on the IC (Fig. 1.29).

Each IC or device name has an indication for the temperature ranges of operation for the device. The working temperatures of an IC depend upon the nature of application and the environment as shown in Table 1.2.

tbl1.2

Table 1.2 Operating Temperature Range Depending upon Nature of Application and Environment

SUMMARY
  1. Several market applications that show the advancement due to IC and good use of IC technology-based systems are described.
  2. The classical history of ICs and their evolution are discussed.
  3. The process of IC fabrication is explained along with key examples. This approach and detailed information should provide motivation and expand the horizon—not only for the teachers and faculty but also for the students so that they are inspired to contribute in this fast-developing field and aim to be entrepreneurs.
  4. The following concepts on the structure and applications of ICs are introduced:
    1. (a) Classification of ICs
    2. (b) Basic concepts of IC fabrication using monolithic IC technology
    3. (c) Fabrication process of a simple structure of an N-type MOSFET
    4. (d) Basic structural details of MOSFETs
    5. (e) Semiconductor diodes
    6. (f) Integrated resistors and capacitors
    7. (g) JFETs
    8. (h) BJTs
    9. (i) ASICs
    10. (j) Manufacturer’s designations and specifications
    11. (k) Assembly and packaging of ICs
    12. (l) Overview and interpretation of datasheets
    13. (m) Device identification method
    14. (n) Pin identification and temperature ranges
QUESTIONS FOR PRACTICE
  1. What are the typical and latest applications of ICs in different sectors?
  2. What are the advantages of ICs over discrete circuits?
  3. Explain the various types of packages of operational amplifiers and the method of identification of various pins on the IC.
  4. Mention the important ideal characteristics of operational amplifiers.
  5. What does the term linear IC mean in terms of IC applications?
  6. What do you understand by input offset current and input offset voltage? Explain a popular method of obtaining input offset voltage.
  7. Explain the various steps (with figures) involved for the fabrication of PN Diode in IC.
  8. Explain the various steps (with figures) involved in the fabrication of NPN transistor in IC.
  9. Explain the various steps (with figures) involved in the fabrication of IC resistor.
  10. Explain the various steps (with figures) involved for the fabrication of a capacitor in IC form.
  11. Compare the performance features of BJT, FET and MOSFET devices.
  12. 12. Mention the various types of IC packages and their relation to operating temperatures in the field of IC applications.
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