S

S-plane:
filter, 587–588
pole and zero plot, 588
S Series Surface Mount Current Sensing Resistors , 700
SAE Standard J1113, 800
SAE Standard J551, 800
Sallen. R.P., 634
Sallen- Key filter, 634–636, 660
bandpass:
design equations, 645
diagram, 636
highpass:
design equations, 645
diagram, 636
implementation, circuit, 664, 665, 667
limitations, 657
lowpass:
design equations, 644
diagram, 635
notch, 636
Q-sensitive, 635
voltage control voltage source, 634
Sallen-Key topology, highpass transformation, 669
Sample mode, 376
Sample-and-hold amplifier, See SHA
Sample-to-hold offset, definition, 480
Sample-to-sample variation, in CCD, 242
Sampled data system:
baseband antialiasing filters, 331–332
block diagram, 327
coding and quantizing, 309–324
bipolar codes, 312–316
complimentary codes, 316–317
DAC and ADC static transfer functions, 317–324
DC errors, 317–324
unipolar codes, 311–312
fundamentals, 309–335
Nyquist criteria, 329–331
sampling theory, 327–335
SHA, 328–329
undersampling, 332–333
Sampling, and bandwidth, 333
Sampling ADC, 328
Sampling aperture, 466–469
Sampling clock:
distribution, ground planes, circuit, 872
grounding, 871
PCB, 824
Sampling clock jitter:
and aperture jitter:
graph, 468
SNR, graph, 468
effect on ADC SNR, 871
effect on SNR, 559, 560
and SNR, quantization noise, DNL, and input noise, graph, 469
Sampling theory, 327–335
Samueli, H., 298
SAR ADC, 372, 374–378
algorithm, 378
basic:
diagram, 374
timing diagram, 375
missing codes, 436
Scaled references, voltage, 526, 527
Scannell, J.R., 241
Schmitt trigger circuit, 114
Schottky diode, 23, 63, 176, 362, 551–552, 721–722, 750, 787, 875
manufacturers, 737
Schottky noise, 39
Schottky-barrier diode, 251
Schreier, R., 424
Scott-T transformer, 339
SCR, 63
Second- and third-order intercept points, definition, 456
Second-order allpass filter:
design equations, 652
diagram, 643
Second-order intercept point, distortion, 50
Second- order noise, model, 45, 46
Second- order system:
noise gain, 46
noise and signal gain, graph, 47
Seebeck coefficient, 228
thermocouple, 221, 222, 224
Segmentation, 354
Segmented current-output DAC:
6-bit, based on 3-bit thermometer DACs, diagram, 355
resistor- and current-source based, diagrams, 354
Segmented DAC, 354–356
Segmented string DAC, 342–344
with cascaded Kelvin DACs, 354
unbuffered, diagram, 343
Segmented voltage-output DAC, diagrams, 342
Selection guide:
for data converter, 511
data sheet, example, 510, 511
Semiconductor:
junction temperature, 75
temperature sensor, 215–217
advantages, 215
basic relationships. diagram, 217
characteristics, 216
Sense connection, and feedback, 828
Sensor, 195–243
accelerometer, 204–207
fault, 781
Hall effect magnetic, 198–200
Inductosyn, 203–204
positional, 195–213
precision, and cable shielding, 817
resolver, 200–203
semiconductor temperature, 215–217
synchro, 200–203
temperature, 215–240
current and voltage output, 218
current-out, 218–220
digital output, 233–236
nonlinear transfer functions, 215
Separate analog and digital grounds, 864–866
SEPIC converter, circuit, 714
Serial-Gray converter, 386
Serial timing diagram. DAC, example, 504
Setpoint controller, 236–238
resistor, equation, 236
Settling time, 470–471
ADC, feedthrough, 480
critical in multiplexed applications, diagram, 471
DAC, 475
definition, 475
graph, 475
function of time constant, various resolutions, table, 471
graph, 475
multiplexer, circuit and equations, 540
op amp, definition, 56–57
PCB, dielectric absorption, 838
SHA, 557
Setup time, timing specification, 483
74ACTQ240, Fairchild part, 857
74FCT3807/A, IDT part, 857
SFDR, 451–453
DAC, 477–479
test setup, 478
definition, 52
graph, 451
in-band, 451
out-of-band, 451
RF/lF circuit, 286–287
SHA, 328–329
basic circuit, 556
basic operation, 555–556
bias current compensation, 33
capacitor, 555, 556
circuit, 555–564
internal timing, 558
feedthrough, definition, 480
function, 328–329
hold mode, 562
specification, 559–561
internal, for IC ADC, 561–564
overvoltage, 781
in SAR ADC, 374–378
specifications, 556–564
track mode, 562
specifications, 556–557
waveforms, graph, 558
waveforms and definitions, 466
Shannon, C.E., 329
SHARC DSP, output rise times and fall times, graph, 855
Sheingold, Dan, 409, 521
Shielding:
cables, 816–818
connection, low frequency threats, 817
effectiveness:
calcu lation, 816
compromised by openings, 815
material s, skin depths and impedance, table, 815
mechanism, 813–816
reflection and absorption, 813–814
Shock, immunity, 213
Short circuit curre nt, op amp, 38
Shunt. voltage reference, 516
Sigma-delta, versus delta-sigma, 409–410
Sigma-delta ADC:
basics, 410–416
decimation, graph, 411
digital filtering, graph, 411
first-order, circuit, 412
grounding, 874
high speed clock, grounding, 863
internal digital filter, 528
multibit, circui t, 409
noise shaping, graph, 411
oversampling, graph, 411
as oversampling converter, 331–332
second-order, circuit, 414, 415
single-bit, circuit, 409
switched capacitor input, reference load, circuit, 528
Sigma-delta converter, 407–427
bandpass, 424, 425
high level of user programmability, 427
high resolution measurement, 420–424
historical perspective, 407–409
multibit, 417–418
block diagram, 417
Sigma-delta DAC, 356, 426
multibit, diagram, 426
single-bit, diagram, 425
Sigma-delta modulator:
class D audio power amplifier, 172–174
first-order, idling patterns, 416
higher order loops, 417
output, repetitive bit pattern, 416
oversampling versus SNR, graph, 415
quantization noise, 413, 414
second-order, idling patterns, 416
shape quantization noise, graph, 414
simplified frequen cy domain linearized model, 414
wavefonns, 413
Sign-magnitude code, 4-bit converter, 313, 314
Sign-magnitude converter, 319
Signal, phase, filter effect, 593
Signal gain, op amp, 12
Signal input, RFI coupling, 804
Signal lead, voltage drop, 828–829
Signal output, RFI coupling, 804
Signal return current, 829–830
Signal-to-noise ratio, See SNR
Signal-to-noise-and-distortion ratio, See SINAD
Signal trace routing, nonideal and improved, diagrams, 840
Silicon controlled rectifier, See SCR
Silicon junction diode, 251
Silicon switch, in PGA, 157
Siliconix Inc., 737
Simultaneous sampling system, using SHA, 555
SINAD, definition, 449–450
Sine (sin(x)/x) curve, normalized, graph, 366, 367
Sinewave, aliased, 330
Singer, L., 445
Single pole filter:
highpass, design equations, 644
lowpass, design equations, 644
Single pole RC:
active blocks, 629–630
construction, 629–630
Single pole response, op amp, 8
Single supply:
biasing:
circuit, 20
headroom issues, 20
op amp, 17–19
circuit design, 19–21
Single-channel digital isolator, 116–119
Single-ended current-to-voltage conversion, 359–360
Single-ended primary inductance (SEPIC) converter, circuit, 713, 714
Sin(x)/(x) (sine), 366–367
60 Hz notch filter, 677–678
response, graph, 678
60 Hz twin-T notch filter, circuit, 677
68HCll, microcontroller, 235
Skin effect, 846–848, 849, 878
PCB conductor, diagrams, 848, 849
Sleep, 373
Sleep operation, 719
Slew rate:
CFB op amp, 15–16
and full power bandwidth, 53
op amp, 668
definition, 52–53
SHA, 557
Slewing time, DAC settling time, 475
Slope clipping, 408
Slot antenna, EMI, 803
Slot and board radiation, EMI, 802
Small signal bandwidth, ADC, 450
Smith, B.D., 347, 352, 368, 385, 386
Snelgrove, M., 424
SNR:
DAC, 477–479
measurement, analog spectrum analyzer, 479
definition, 51, 449–450
and sampling clock jitter, quantization noise, DNL, and input noise, graph, 469
SNR- without-harmonics, 450
Snubber, 707, 710
Soakage, 762
Socket, 867
SOIC, sample guard layout, 836–837
Solutions bulletin, front page, sample, 510
Sonet/SDH OC-48 with Forward Error Correction, using AD8152, 548
SOT23, amp footprint, 836
Source termination:
bidirectional transmission between SHARC DSPs, 859
microstrip transmission lines, 857
Span, definition, 440
Sparkle codes:
ADC, 472–473
definition, 472
Specification page, data sheet, example, 489
Specification tables, for op amp, 56
Specifications, defining, 496
Spectrum analyzer:
measuring DAC SNR, 479
output, 303
for phase noise measurement, 303
Spice, 760
Sprague 595D series, electrolytic capacitor, 737
Spurious free dynamic range, See SFDR
SSM2018:
low-noise low-distortion VCA, 166
block diagram, 168
distortion characteristics, 168
SSM2019:
microph one preamplifier:
circuit, 165
input, 165
SSM2141:
monolithic IC line receiver, 170
gain accuracy, 171
SSM2141/2143, THD+ performance, 171
SSM2142:
balanced line driver, 171
block diagram, 172
SSM2143:
monolithic IC line receiver, 170
CMR and THD, graphs, 171
SSM2160, VCA with DAC, block diagram, 169
SSM2165:
microphone preamplifier:
block diagram, 166
transfer characteristics, 166
SSM2211:
speaker driver power amplifier:
application circuit, 167
performance, 167
Stable-dielectric ceramic, capacitor, 764
Stacked-film capacitor, 735–736
characteristics, 757
Staffin, R., 380
Standard input stage, differential pair, 17
Standard negative-feedback control system model, diagram, 289
Standard response:
Butterworth filter, 599
filters, 599–622
Standby, 373
Star connection, damping resistor, 856
Star ground, 864
mixed-signal ICs, 868
State variable filter, 638
(A), design equations, 647
advantages, 674
(B), notch, design equations, 650, 651
(C), allpass, design equations, 651
diagram, 638
digitally controlled, circuit, 675
digitally programmable, 674–677
implementation, circuit, 666
op amp functions, 657
redrawn, circuit, 675
Static transfer function, 433
Step-down (buck) converter:
basic:
diagram, 704
waveforms, 705
Step response:
filter, 598
definition, 598
Step-up (boost) converter, 708
basic:
circuit, 708
waveforms, 709
discontinuous mode, waveform, 710
input/output relationship, 709
point of discontinuous operation, 710
Stopband:
filter, 583
frequency, 584
Straight binary code, 310
Strain gage, 441
Stray capacitance, 707
in mixed-signal IC, 843
String DAC, 341
segmented, 342
Stripline transmission line, in PCB, 852–853
Subranging ADC, 380–385
improper trimming, errors, 324
input residue waveforms, diagram, 381
missing codes, graph, 381
N-bit two-stage, diagram, 380
pipeline stage, error correction, diagram, 382
trirruning error, graphs, 437
Subtractor:
definition, 92
op amp, circuit, 92
Succes sive approximation register, See SAR
Successive detection log amp, 126, 266
linearity, graph, 267
with log and limiter outputs, diagram, 267
Successive-approximation ADC, 374–377
grounding, 863
transient load, graph and circuit, 529
Super beta op amp, 36
Super-beta transistor, input, 32
Superheterodyne radio receiver, diagram, 247
Superheterodyne radio transmitter, diagram, 247
Superposition, filter, 587
Supply range, voltage reference, 525
Supply voltage, op amp, 16–17, 36
Surface microstrip, 851
delay constant, 852
rules of thumb, 852
Surface zener, 521
Surface-mount multilayer ceramics, decoupling, 881
Switch:
analog, 531–553
digital, crosspoint, 548–549
duty cycle, 705
duty ratio, 705
parasitic latch-up, 549–553
power MOSFET, buck and boost converters, circuits, 723
thermostatic, 236–238
video, 546–548
crosspoint, 548
in voltage converter, 746
Switch capacitance, retained charge, 538
Switch control, gated oscillator, circuit, 720
Switch mode power supply, 775
Switch mode regulator, 701
advantages, 701
diode and switch considerations, 721–723
ideal step-down (buck) converter, 704–708
inductor and capacitor fundamentals, 702–704
limitations, 701
power management, 701
ripple currents, 702
topology, basic, 701
Switch modulation, 715–717
control techniques, 717–719
pulse width modulation, 704
Switched capacitor:
unregulated, inverter and doubler, 746
voltage converter, 741–751
advantages, 742
inverter and doubler, circuits, 741
power loss, 748
power management, 741–751
voltage inverter, circuit, 746
Switched-capacitor DAC, 376
Switcher, non-isolated, topologies, 715
Switching capacitor, characteristics, 756
Switching electrolytic capacitor, 735
Switching regulator:
capacitor role, 732
inductor choice, 723–732
input filtering, diagram, 738
output filtering, diagram, 738
Switching time, DAC settling time, 475
Symmetric stripline, PCB transmission line, 852–853
Symmetrical bipolar voltage, 37
Synchro, 200–203, 310
diagram, 201
uses, 200
Synchronous rectifier, 702
Synchronous VFC, 395
diagram, 395
nonlinearity, graph, 396
quantized, 395
waveforms, 396
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