S
S Series Surface Mount Current Sensing Resistors ,
700
Sallen- Key filter,
634–636,
660
voltage control voltage source,
634
Sallen-Key topology, highpass transformation,
669
Sample-and-hold amplifier,
See SHA
Sample-to-hold offset, definition,
480
Sample-to-sample variation, in CCD,
242
Sampled data system:
baseband antialiasing filters,
331–332
coding and quantizing,
309–324
DAC and ADC static transfer functions,
317–324
Sampling, and bandwidth,
333
Sampling clock:
distribution, ground planes, circuit,
872
Sampling clock jitter:
and SNR, quantization noise, DNL, and input noise, graph,
469
Scaled references, voltage,
526,
527
Schmitt trigger circuit,
114
Schottky-barrier diode,
251
Second- and third-order intercept points, definition,
456
Second-order allpass filter:
Second-order intercept point, distortion,
50
Second- order noise, model,
45,
46
Second- order system:
noise and signal gain, graph,
47
Segmented current-output DAC:
6-bit, based on 3-bit thermometer DACs, diagram,
355
resistor- and current-source based, diagrams,
354
Segmented string DAC,
342–344
with cascaded Kelvin DACs,
354
Segmented voltage-output DAC, diagrams,
342
Semiconductor:
temperature sensor,
215–217
basic relationships. diagram,
217
Sense connection, and feedback,
828
Sensor,
195–243
precision, and cable shielding,
817
temperature,
215–240
current and voltage output,
218
nonlinear transfer functions,
215
Separate analog and digital grounds,
864–866
SEPIC converter, circuit,
714
Serial-Gray converter,
386
Serial timing diagram. DAC, example,
504
Settling time,
470–471
critical in multiplexed applications, diagram,
471
function of time constant, various resolutions, table,
471
multiplexer, circuit and equations,
540
op amp, definition,
56–57
PCB, dielectric absorption,
838
Setup time, timing specification,
483
74ACTQ240, Fairchild part,
857
74FCT3807/A, IDT part,
857
SHA,
328–329
bias current compensation,
33
feedthrough, definition,
480
waveforms and definitions,
466
SHARC DSP, output rise times and fall times, graph,
855
Shielding:
connection, low frequency threats,
817
effectiveness:
compromised by openings,
815
material s, skin depths and impedance, table,
815
Short circuit curre nt, op amp,
38
Shunt. voltage reference,
516
Sigma-delta, versus delta-sigma,
409–410
Sigma-delta ADC:
digital filtering, graph,
411
first-order, circuit,
412
high speed clock, grounding,
863
internal digital filter,
528
noise shaping, graph,
411
second-order, circuit,
414,
415
switched capacitor input, reference load, circuit,
528
Sigma-delta converter,
407–427
high level of user programmability,
427
high resolution measurement,
420–424
Sigma-delta modulator:
class D audio power amplifier,
172–174
first-order, idling patterns,
416
output, repetitive bit pattern,
416
oversampling versus SNR, graph,
415
second-order, idling patterns,
416
shape quantization noise, graph,
414
simplified frequen cy domain linearized model,
414
Sign-magnitude code, 4-bit converter,
313,
314
Sign-magnitude converter,
319
Signal, phase, filter effect,
593
Signal input, RFI coupling,
804
Signal output, RFI coupling,
804
Signal-to-noise ratio,
See SNR
Signal-to-noise-and-distortion ratio,
See SINAD
Signal trace routing, nonideal and improved, diagrams,
840
Silicon controlled rectifier,
See SCR
Silicon junction diode,
251
Silicon switch, in PGA,
157
Simultaneous sampling system, using SHA,
555
Sine (sin(x)/x) curve, normalized, graph,
366,
367
Single pole filter:
highpass, design equations,
644
lowpass, design equations,
644
Single pole response, op amp,
Single-channel digital isolator,
116–119
Single-ended current-to-voltage conversion,
359–360
Single-ended primary inductance (SEPIC) converter, circuit,
713,
714
60 Hz twin-T notch filter, circuit,
677
68HCll, microcontroller,
235
Slew rate:
CFB op amp,
15–16
and full power bandwidth,
53
Slewing time, DAC settling time,
475
Slot and board radiation, EMI,
802
Small signal bandwidth, ADC,
450
SNR:
DAC,
477–479
measurement, analog spectrum analyzer,
479
and sampling clock jitter, quantization noise, DNL, and input noise, graph,
469
SNR- without-harmonics,
450
Solutions bulletin, front page, sample,
510
Sonet/SDH OC-48 with Forward Error Correction, using AD8152,
548
SOT23, amp footprint,
836
Source termination:
bidirectional transmission between SHARC DSPs,
859
microstrip transmission lines,
857
Specification page, data sheet, example,
489
Specification tables, for op amp,
56
Specifications, defining,
496
Spectrum analyzer:
for phase noise measurement,
303
Sprague 595D series, electrolytic capacitor,
737
Spurious free dynamic range,
See SFDR
SSM2018:
low-noise low-distortion VCA,
166
distortion characteristics,
168
SSM2019:
microph one preamplifier:
SSM2141:
monolithic IC line receiver,
170
SSM2141/2143, THD+ performance,
171
SSM2142:
balanced line driver,
171
SSM2143:
monolithic IC line receiver,
170
SSM2160, VCA with DAC, block diagram,
169
SSM2165:
microphone preamplifier:
transfer characteristics,
166
SSM2211:
speaker driver power amplifier:
Stable-dielectric ceramic, capacitor,
764
Standard input stage, differential pair,
17
Standard negative-feedback control system model, diagram,
289
Star connection, damping resistor,
856
State variable filter,
638
(A), design equations,
647
(B), notch, design equations,
650,
651
(C), allpass, design equations,
651
digitally controlled, circuit,
675
implementation, circuit,
666
Static transfer function,
433
Step-down (buck) converter:
Step-up (boost) converter,
708
discontinuous mode, waveform,
710
input/output relationship,
709
point of discontinuous operation,
710
Straight binary code,
310
Stripline transmission line, in PCB,
852–853
Subranging ADC,
380–385
improper trimming, errors,
324
input residue waveforms, diagram,
381
missing codes, graph,
381
N-bit two-stage, diagram,
380
pipeline stage, error correction, diagram,
382
trirruning error, graphs,
437
Succes sive approximation register,
See SAR
Successive detection log amp,
126,
266
with log and limiter outputs, diagram,
267
Successive-approximation ADC,
374–377
transient load, graph and circuit,
529
Super-beta transistor, input,
32
Superheterodyne radio receiver, diagram,
247
Superheterodyne radio transmitter, diagram,
247
Superposition, filter,
587
Supply range, voltage reference,
525
Surface-mount multilayer ceramics, decoupling,
881
Switch:
power MOSFET, buck and boost converters, circuits,
723
in voltage converter,
746
Switch capacitance, retained charge,
538
Switch control, gated oscillator, circuit,
720
Switch mode power supply,
775
Switch mode regulator,
701
diode and switch considerations,
721–723
ideal step-down (buck) converter,
704–708
inductor and capacitor fundamentals,
702–704
Switch modulation,
715–717
pulse width modulation,
704
Switched capacitor:
unregulated, inverter and doubler,
746
voltage converter,
741–751
inverter and doubler, circuits,
741
voltage inverter, circuit,
746
Switched-capacitor DAC,
376
Switcher, non-isolated, topologies,
715
Switching capacitor, characteristics,
756
Switching electrolytic capacitor,
735
Switching regulator:
input filtering, diagram,
738
output filtering, diagram,
738
Switching time, DAC settling time,
475
Symmetric stripline, PCB transmission line,
852–853
Symmetrical bipolar voltage,
37
Synchronous rectifier,
702