D
DAC:
3-bit switched-capacitor, circuit, 376
8-bit, nonlinear transfer function, 367–368
12-bit, SFDR, FFT, 286–287
basic, diagram, 340
deglitcher, using SHA, 555
digital interfacing, 360–364
dynamic performance, 474
fully decoded, 345–347
gain, in R-2R ladder, 350
general nonlinear, diagram, 369
glitch impulse area, 475–476
ideaI 12-bit, SFDR, output spectrum, 283
input and output definitions, 309
intentionally nonlinear, 367–369
nonlinear 6-bit segmented, diagram, 368
output compliance voltage, 357
settling time, 475
string, 341–342
switched capacitor, 376
thermometer, 345–347
transitions, with glitch, graph, 475–476
Dale Electronics, Inc., 740
Damped oscillation, 52
Damping ratio, 589
Damping resistor:
fast logic, minimizing EMI/RFI, circuits, 858
series, high speed DSP interconnections, 856
Darlington NPN, pass device, 686
Darlington pass connection, 687
Data converter, 339–511
ac errors, 443–480
ac specifications, 490
analog switches and multiplexers, 531–553
choosing, 509–511
code transition noise and DNL, graphs, 437
dc and ac specifications, 431
dynamic performance, 447
table, 447
gain error, 319–320
intercept points, significance, 456
least significant bit, for 2V full scale input, table, 431
logic, timing, 364
offset error, 319–320
offset and gain error, graphs, 433
parameters, 509–511
part selection, 511
primary dc errors, 433
resolution, 509
table, 431
sample rate, 509
SHA circuits, 555–564
specifications, defining, 431–432
static transfer functions and dc errors, 433–441
support circuits, 513–580
thermal considerations, 891–895
timing specifications, 483–485
transfer functions for non-idea 13-bit DAC and ADC, graphs, 435
voltage references, 515–530
Data directed scrambling, 427
Data distribution system, using SHA, 555
Data ready, 372
Data scrambling, 427
Data sheet:
application circuits, 170–171
defining the specifications, 496
evaluation boards, 507
how to read, 487–508
interface, 503–504
pin description, 496
Dattorro, J., 408
DC error source, in amp, 101–104
DC errors, 433–441
DDS, 477
aliasing, 284–285
basic system, high resolution, 283
flexible system, diagram, 282
fundamental, 281
harmonics, 285
versus PLL-based system, 285
RF/IF circuit, 281–287
sampled data system, 281
tuning equation, 283
DDS system:
ADC clock driver, 285–286
ampli tude modulation, 286
dither, for quantization noise and SFDR, 287
harmonics, 286
SFDR considerations, 286–287
Dead time. DAC settling time, 475
Decimation, 411–412
Decoupling, 881–884
inadequate, effects, 882–883
PCB, 881–884
power line, forms resonant circuit, 884
surface-mount multilayer ceramics, 881
voltage reference, 515
Decoupling point, 870
Del Signore, B.P., 408
Delay constant, surface microstrip, 852
Delay dispersion, graph, 138
Delay skew, 860
Delta phase register, 282
Delyiannis, T, 643
Dempsey, Dennis, 344
Demultiplexed data bus, 860
Denormalization, filter, 599
Derating curves, 887
Detecting, architecture, 265
Detector, Tru-Power, RF/IF circ uit, 271–273
Dielectric, types, 756–760
Dielectric hysteresis, 762
Differential analog input capacitance, definition, 439
Differential analog input impedance, definition, 439
Differential analog input resistance, definition, 439
Differential analog input voltage range, definition, 439
Differential current-to-differential voltage conversion, 360
Differential DC coupled output:
with dual supply op amp, circuit, 358
with single-supply op amp, circuit, 359
Differential input voltage, op amp, 36
Differential linearity error, 434
Differential nonlinearity, 434
and code transition noise, 324
converter, 321
distortion effect, 447–448
Differential nonlinearity error, in ADCIDAC, graphs, 447
Differential nonlinearity temperature coefficient, 439
Differential transformer coupling, circuit, 358
Digiphase, 296
DigiTrim, in op amp, 29
Digital corrected subranging, 382
Digital crosstalk, definition, 480
Digital current, high, multiple PCB, diagram, 874–875
Digital data bus noise, immunity in high-speed ADC IC, 870
Digital error correction, 382
Digital filter, in sigma–delta ADC, 418–419
Digital filtering, 411
Digital ground pin, circuit, 865
Digital interface, 360–364
Digital isolation:
AD260/AD261 high speed logic isolators, 114–115
ADuM130X/ADuM140X multichannel products, 119–121
ADuM1100 architecture, 116–119
in data acquisition system, 115
iCoupler® technology, 115–116
techniques, 113–121
using LED/photodiode optocoupler, 114
using LED/phototransistor optocoupler, 113
Digital noise, in mixed-signal IC, 868–869
Digital phase wheel, 282
Digital phosphor scope, acquisition time measurement, 561
Digital PLL, 290
Digital sampling scope, acquisition time measurement, 561
Digital signal processor, See DSP
Digital switch, crosspoint, 548–549
Digital word, 339
Digital output temperature sensor, 233–236
Diode/op amp log amp, disadvantages, 265
DiPilato, J., 424
Direct digital synthesis, See DDS
Direct IF to digital conversion, 333
Discrete time sampling, 328
Dispersion, comparator, 137
Dissipation factor, definition, 764
Distance, EMI, 803
Distortion:
CFB op amp, 16
harmonic, 48
intercept points, 48
multi-tone power ratio, 48
op amp, definition, 48
SFDR, 48
SHA, 557
Distortion products, location, graph, 448
Dither, 286
Dither signal, 444
DNL:
and sampling clock jitter, quantization noise, SNR, and input noise, graph, 469
See also Differential nonlinearity
Dobkin, Robert C., 687
Doeling, w., 838
Dominant pole frequency, 25
Doublet glitch, 476
Drift with time, op amp, 28
Dropout voltage, 686
Dual-modulus prescaler, 294–295
Dual slope/multi-slope ADC, 396–398
Duty cycle, waveform, 19
Dynamic range, log amp, 267
Dynamic settling time, transient, charge coupling, graph, 539
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