9

Trinary Hybrid Multilevel Inverter (THMI)

The trinary hybrid multilevel inverter (THMI) has many advantages. We carefully analyze its characteristics in this chapter [1].

9.1    Topology and Operation

A single-phase THMI with h HBs connected in series is shown in Figure 9.1. The key feature of the THMI is that the ratio of DC link voltage is 1:3:…:3^h−1, where h is the number of HBs. The maximum number of synthesized voltage levels is 3^h.

As shown in Figure 9.1, v_Hi represents the output voltage of the ith HB. V_dci represents the DC link voltage of the ith HB. A switching function, F_i, is used to relate V_Hi and V_dci as shown in

${\upsilon }_{Hi}=F_i\cdot V_{dci}$

(9.1)

The value of F_i can be either 1 or −1 or 0. For the value 1, switches S_i1 and Si₄ need to be turned on. For the value -1, switches S_i2 and S_i3 need to be turned on. For the value 0, switches S_i1 and S_i3 need to be turned on or S_i2 and Si₄ need to be turned on. Table 9.1 shows the relationship of the switching function, the output voltage of an HB, and states of switches. The output voltage of the THMI, v_an, is the sum of the output voltages of HBs.

${\upsilon }_{an}={\displaystyle \sum _{i=1}^h{\upsilon }_{Hi}}$

(9.2)

From Equations (9.1) and (9.2), we can get

${\upsilon }_{an}={\displaystyle \sum _{i=1}^h{F}_i\cdot V_{dci}}$

(9.3)

FIGURE 9.1
Configuration of THMI.

TABLE 9.1
Relationship of Switching Function, Output Voltage of an HB, and States of Switches

In a single-phase h-HB THMI, the ratio of DC link voltages is 1:3:…:3^h−1. Suppose E is the unit voltage, the DC link voltage can be expressed as

$V_{dci}=3^{i-1}E$

(9.4)

From Equations (9.2) and (9.3), we can get

${\upsilon }_{an}={\displaystyle \sum _{i=1}^h{F}_i\cdot 3^{i-1}E}$

(9.5)

Suppose l is the ordinal of the expected voltage level that the inverter outputs. If l is not negative, the inverter outputs the positive lth voltage level. If l is negative, the inverter outputs the negative (-l)th voltage level. In a single-phase THMI with h HBs, given the value of l, the value of F_i can be determined by

$\begin{array}{c}{\text{F}}_h=\frac{\text{ABS}(l)}{l}{\text{B}}_{\text{b}}\left(\text{ABS}(l)-\frac{3^{h-1}-1}{2}\right)\\ {\text{F}}_{h-1}=\frac{\text{ABS}(l)}{l}{\text{B}}_{\text{b}}\left(\text{ABS}(l)-\text{ABS}({\text{F}}_h)\cdot 3^{h-1}-\frac{3^{h-1}-1}{2}\right)\\ ⋮\\ {\text{F}}_i=\frac{\text{ABS}(l)}{l}{\text{B}}_{\text{b}}\left(\text{ABS}(l)-{\displaystyle \sum _{k=i+1}^h\left(\text{ABS}({\text{F}}_k)\cdot 3^{k-1}\right)}-\frac{3^{i-1}-1}{2}\right)\\ ⋮\\ {\text{F}}_2=\frac{\text{ABS}(l)}{l}{\text{B}}_{\text{b}}\left(\text{ABS}(l)-{\displaystyle \sum _{k=3}^h\left(\text{ABS}({\text{F}}_k)\cdot 3^{k-1}\right)}-1\right)\\ {\text{F}}_1=\frac{\text{ABS}(l)}{l}{\text{B}}_{\text{b}}\left(\text{ABS}(l)-{\displaystyle \sum _{k=2}^h\left(\text{ABS}({\text{F}}_k)\cdot 3^{k-1}\right)}\right)\end{array}$

(9.6)

where ABS is the function of absolute value and the bipolar binary function, B_b, is defined as

${\text{B}}_b(\tau )=\{\begin{array}{cc}1& \tau >0\\ 0& \tau =0\\ -1& \tau <0\end{array}$

(9.7)

TABLE 9.2
Relationship of Output Voltage of the Inverter and the Values of Switching Functions in a Single-Phase Two-HB THMI

From Equation (9.5), we can get the relationship between the output voltage of the inverter, v_an, and the values of switching functions in the THMI with different numbers of HBs. In the case of a two-HB THMI, Table 9.2 shows the relationship between the output voltage of the inverter and the values of switching functions. The waveforms of a single-phase two-HB THMI are shown in Figure 9.2.

The output voltage of a single-phase three-HB has 27 levels. v_H1, v_H2 and v_H3 can be negative when v_an is positive. Table 9.3 shows relationship between the output voltage of the inverter and the values of switching functions in a single-phase three-HB THMI. From Equation (9.6), we can get

${\upsilon }_{an}=-{{\upsilon }^{\prime }}_{an}\iff F_i={F^{\prime }}_{i}i=\mathrm{1\dots }h$

(9.8)

The cases with negative values of v_an can be deduced from Table 9.3.

FIGURE 9.2
Waveforms of a single-phase two-HB THMI.

TABLE 9.3
Relationship of Output Voltage of the Inverter and the Values of Switching Functions in a Single-phase three-HB THMI

9.2    Proof of Greatest Number of Output Voltage Levels

Among existing multilevel levels, the THMI has the greatest levels of output voltage using the same number of components. In this section, first this assertion is theoretically proved, and then various kinds of multilevel inverters are compared.

9.2.1    Theoretical Proof

This section proves that the THMI has greatest levels of output voltage using the same number of HBs among the multilevel inverters using HBs connected. A phase voltage waveform is obtained by summing the output voltages of h HBs as shown in Equation (9.2). If the DC link sources of all HB cells are equal, the multilevel inverter is called the cascaded multilevel inverter and the maximum number of levels of phase voltage is given by

$m=1+2h$

(9.9)

On the other hand, if at least one of the DC link sources is different from the other ones, the multilevel inverter is called the hybrid multilevel inverter. Thus, considering that the lowest DC link source E is chosen as the base value for the p.u. notation, the normalized values of all DC link voltages must be natural numbers to obtain a uniform step multilevel inverter, that is,

$V_{dc{i}^{*}}\in E,i=1,2,\dots ,h$

(9.10)

Moreover, to obtain a uniform step multilevel inverter, the DC link voltage of the HB cells must also respect the following relation:

$V_{dc{i}^{*}}\le 1+2{\displaystyle \sum }_{k=1}^{i=1}{V}_{dc{k}^{*}},i=2,3,\dots ,h$

(9.11)

where it is also considered that the DC link voltages are arranged in ascending order, that is,

$V_{dc{1}^{*}}\le V_{dc{2}^{*}}\le V_{dc{3}^{*}}\le \cdots \le V_{dc{h}^{*}}$

(9.12)

Therefore, the maximum number of levels of output phase voltage waveform can be given as

$m=1+2{\sigma }_{\max }$

(9.13)

where σ_max is the maximum number of positive and negative voltage levels and can be expressed as

${\sigma }_{\max }={\displaystyle \sum }_{i=1}^h{V}_{dc{i}^{*}}$

(9.14)

From Equations (9.9), (9.13), and (9.14), it is possible to verify that hybrid multilevel inverters can generate a large number of levels with the same number of cells. Moreover, in the THMI, the DC link voltages obey the relation

$V_{dc{i}^{*}}=1+2{\displaystyle \sum }_{k=1}^{i-1}{V}_{dc{k}^{*}},i=2,3,\dots ,h$

(9.15)

Therefore, the THMI has the greatest levels of output voltages using the same number of HBs among multilevel inverters with HBs connected.

9.2.2    Comparison of Various Kinds of Multilevel Inverters

Two kinds of comparisons are presented in this section. In the first comparison, the components are considered to have same voltage rating, E. This comparison is for high-power and high-voltage applications, in which devices connected in series are used to satisfy the requirement of high voltage ratings. Table 9.4 shows the comparison of multilevel inverters: diode-clamped multilevel inverter (DCMI), capacitor-clamped multilevel inverter (CCMI), cascaded multilevel inverter (CMI), generalized multilevel inverter (GMI), BHMI, and THMI. m is the number of steps of phase voltage. From Table 9.4, we can see that CMI, BHMI, and THMI use fewer components. CMI, BHMI, and THMI use the same number of components. However, in practical systems, the redundancy requirement must be satisfied. THMI uses fewer components than BHMI and CMI in practical systems since THMI uses fewer redundant components. Moreover, THMI uses fewer DC sources than CMI and BHMI.

TABLE 9.4
First Comparison of Multilevel Inverters

TABLE 9.5
Second Comparison of Multilevel Inverters

The second comparison is for medium- and low-power applications, in which the voltage rating of main switching components, diodes, and capacitors can be researched easily. Therefore, the numbers of main switching components, diodes, and capacitors are the minimal required values. Table 9.5 shows the comparison results among DCMI, CCMI, CMI, GMI, BHMI, and THMI. From Table 9.5, we can see that THMI uses the fewest components among these multilevel inverters.

9.2.3    Modulation Strategies for THMI

Five modulation strategies for THMI are investigated. They are the step modulation strategy, the virtual stage modulation strategy, the hybrid modulation strategy, the sub-harmonics pulse width modulation (PWM) strategy, and the simple modulation strategy. Since multilevel inverters are typically used in three-phase systems, generally only modulation strategies for three-phase systems will be investigated here. In three-phase systems, triple-order harmonic components of voltages need not be eliminated by the modulation strategies since they can be eliminated by proper connection of three-phase voltage sources and loads. In other words, only the 5th, 7th, 11th, 13th, 17th, 19th, …, harmonic components should be eliminated by the modulation strategies. In addition, the amplitude of the fundamental component should be controlled. The list can be expressed by

${\text{η}}_i=\{\begin{array}{cc}3i-2& \forall i=\text{odd}\\ 3i-1& \forall i=\text{even}\end{array}i>0$

(9.16)

The step modulation strategy, the virtual stage modulation strategy, and the simple modulation strategy are low-frequency modulation strategies. The high-frequency modulation strategies used in hybrid multilevel inverters include the hybrid modulation strategy and the subharmonic PWM strategy.

FIGURE 9.3
Step modulation strategy of THMI.

9.2.3.1    Step Modulation Strategy

Figure 9.3 shows a general quarter-wave symmetric stepped voltage waveform synthesized by a THMI where E indicates the unit voltage of DC source. Consider that ς is the number of switching angles in a quarter wave of v_an and σ is the number of positive and negative levels of v_an. In the step modulation strategy,

$\varsigma =\sigma$

(9.17)

By applying Fourier series analysis, the amplitude of any odd jth harmonic of v_an can be expressed as

$|{\upsilon }_{an}{|}_j=\frac{4}{j\text{π}}{\displaystyle \sum _{i=1}^{\varsigma }[E\cos (j{\text{θ}}_i)]}$

(9.18)

where j is an odd harmonic order and θ_i is the ith switching angle. The amplitudes of all even harmonics are zero. According to Figure 9.3, θ₁ to θ_ς must satisfy

$0<{\text{θ}}_1<{\text{θ}}_2<\mathrm{\dots }<{\text{θ}}_{\text{ς}}<\text{π/2}$

(9.19)

$\{\begin{array}{c}{\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_1{\text{θ}}_i)=\sigma \cdot MR}\\ {\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_2{\text{θ}}_i)=0}\\ ⋮\\ {\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_{\text{ς}}{\text{θ}}_i)=0}\end{array}$

(9.20)

where MR is the relative modulation index and is expressed as

$MR=\frac{\pi |{\upsilon }_{an}{|}_1}{4\sigma E}$

(9.21)

where |v_an|₁ is the amplitude of fundamental component of the output voltage of the inverter.

The switching angles controlled by step modulation technique are derived from Equation (9.20). Up to (ς − 1) harmonic contents can be removed from the voltage waveform and the amplitude of fundamental component can be controlled.

$\begin{array}{l}\cos ({\text{θ}}_1)+\cos ({\text{θ}}_2)+\cos ({\text{θ}}_3)+\cos ({\text{θ}}_4)=0.83\times 4\\ \cos (5{\text{θ}}_1)+\cos (5{\text{θ}}_2)+\cos (5{\text{θ}}_3)+\cos (5{\text{θ}}_4)=0\\ \cos (7{\text{θ}}_1)+\cos (7{\text{θ}}_2)+\cos (7{\text{θ}}_3)+\cos (7{\text{θ}}_4)=0\\ \cos (11{\text{θ}}_1)+\cos (11{\text{θ}}_2)+\cos (11{\text{θ}}_3)+\cos (11{\text{θ}}_4)=0\end{array}$

(9.22)

The equation sets (Equation 9.20) from which the switching angles can be derived are nonlinear and transcendental. For example, in a two-HB THMI, with the step modulation technique, the equations set is expressed as Equation (9.22) when the relative modulation index is 0.83. The correct solution must satisfy the inequality shown in Equation (9.19).

The constrained optimization approach can be used to solve the nonlinear and transcendental equations sets. Each equation is regarded as an equational constraint. However, the computational problems of constrained optimization do not converge easily. Since in the actual electric system there are always mismatches and parameter tolerances, lower-order harmonics will be small but not exactly zero. This gives rise to the idea of transforming the constraint optimization model to a nonconstraint one. The nonconstraint optimization is expected to have a better convergence property.

The target function of the new scheme of optimization without equational constraints can be written as

$FT=p_1{\left[{\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_1{\text{θ}}_i)-\sigma .M}\right]}^2+p_2{\left[{\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_1{\text{θ}}_i)}\right]}^2+\cdots +p_{\text{ς}}{\left[{\displaystyle \sum _{i=1}^{\text{ς}}\cos ({\text{η}}_{\text{ς}}{\text{θ}}_i)}\right]}^2$

(9.23)

p₁ ∼ p_ς are penalty factors. The penalty factors were selected as

$p_i=\frac{4}{2i-1}$

(9.24)

FIGURE 9.4
Synthesized phase leg voltage waveform and frequency spectrum of a two-HB THMI with step modulation technique.

Thus, the penalty factors put more weight on elimination of lower-order harmonics. Function f_mincon in the MATLAB^® optimization toolbox was used to solve this minimization problem.

The two-HB THMI can synthesize a nine-level output voltage. Figures 9.4 and 9.5 show the typical synthesized waveform of the phase leg voltage, line-to-line voltage waveform and their frequency spectrums, as MR is equal to 0.83. The switching angles are 0.1478, 0.3232, 0.5738, and 0.9970. According to Equation (9.20), the fifth, seventh, and eleventh harmonics of the phase leg voltage can be eliminated in the two-HB THMI as shown in Figure 9.4. The THD of phase leg voltage is 9.66%. The triple-order harmonic components do not exist in the line-to-line voltage as shown in Figure 9.5. The THD of line-to-line voltage is 5.91%.

According to Equation (9.20), all switching angles must satisfy the constraint (Equation 9.19). If switching angles do not satisfy the constraint, this scheme no longer exists. The theoretical maximum amplitude of the fundamental component is 4ςE/π, which occurs as θ₁–θ_h equal zero. Because of the internal restriction of switching angles, the relative modulation index has upper and lower limitations. The limitation of the relative modulation index can be explained using Figures 9.6 and 9.7.

As shown in Figure 9.6, as the relative modulation index is less than a certain value, denoted by MR (min), θ_ς approaches π/2 and the limitation of minimum modulation index occurs. Similarly, when the relative modulation index is greater than MR (max), θ₁ approaches zero and the limitation of the maximum modulation index occurs as shown in Figure 9.7.

FIGURE 9.5
Synthesized line-to-line voltage waveform and frequency spectrum of a two-HB THMI with step modulation technique.

For a THMI with h HBs, the maximum number of levels of the phase leg voltage is m, which equals 3^h. The maximum number of the positive/negative phase leg voltage levels is σ_max, which equals (m-1)/2. As mentioned above, the relative modulation index MR has limitations. To extend it to the smaller ranges of the modulation index, the inverter will output fewer voltage levels. Consequently, the number of positive/negative voltage levels that the inverter outputs, σ, is smaller than the maximum number of the positive/negative levels, σ_max. In the step modulation strategy, the number of switching angles in the quarter wave of v_an, ς, equals σ. The definition of the relative modulation index, MR, is based on σ as shown in Equation (9.21). This definition is easily included in Equation (9.20) to express the nonlinear transcendental equation sets that are used to calculate the switching angles. In practice, the modulation index, M, is used. M is based on the σ_max and can be expressed as

FIGURE 9.6
Limitation to the minimum MR in the step modulation.

FIGURE 9.7
Limitation to the maximum MR in the step modulation

$M=\frac{\text{π|}{\upsilon }_{an}{|}_{{}^1}}{4{\sigma }_{\max }E}$

(9.25)

The relationship between MR and M can be expressed as

$\frac{M}{MR}=\frac{\sigma }{{\sigma }_{\max }}$

(9.26)

In the two-HB THMI, according to Equation (9.20), the maximum MR is calculated as 0.86 and the minimum MR is 0.55 as the levels of output voltage are nine in number. The range of M is also from 0.55 to 0.86 with the nine-level output voltage. To extend the lower modulation index, fewer output voltage levels are synthesized. The range of MR is 0.46–0.83 when the number of output voltage levels is seven. According to Equation (9.26), the range of M is 0.34–0.62 when there are seven output voltage levels. Thus, the modulation range is extended to 0.34 by decreasing levels of output voltage.

Table 9.6 shows the relative modulation index and the modulation index with different output voltage levels in the two-HB THMI. First, the minimum and maximum MR is calculated by the optimization method. Second, the minimum and maximum M is calculated by Equation (9.26). It is preferable to use more output voltage levels. The last column of Table 9.6 shows the arrangement of M with different output voltage levels. In addition, the upper limit of M can reach 0.94 independent of the elimination of the 11th harmonic as shown in the last row of Table 9.6.

TABLE 9.6
Range of Modulation Index under Different Output Voltage Levels with Step Modulation in a Two-HB THMI

^*  Upper limit of M without elimination of 11th harmonie.

The scheme of switching angles of the two-HB THMI is shown in Figure 9.8. When the modulation index reaches the lower limit, such as 0.34, the third switching angle is close to π/2, which corroborates Figure 9.6. When the modulation index reaches the maximum value 0.86 or 0.94, the first angle is close to zero, which corroborates Figure 9.7.

9.2.3.2    Virtual Stage Modulation Strategy

In the step modulation strategy, the output voltage levels of the multilevel inverter limit the number of eliminated lower-order harmonics. Only three lower-order harmonics can be eliminated by the step modulation in a two-HB THMI. It is not generally satisfied in the applications that require a high-quality sinusoid voltage output. The virtual stage modulation strategy is a new technique that increases the amount of eliminated lower-order harmonics without increasing the number of output voltage levels. The switching angles can be derived as

FIGURE 9.8
Scheme of switching angles with the step modulation as a function of modulation index in a two-HB THMI.

$\{\begin{array}{c}{\displaystyle \sum _{i=1}^{\alpha }\cos ({\text{η}}_1{\text{θ}}_{pi})}-{\displaystyle \sum _{i=1}^{\text{β}}\cos ({\text{η}}_1{\text{θ}}_{ni})=\text{σ}\cdot MR}\\ {\displaystyle \sum _{i=1}^{\alpha }\cos ({\text{η}}_2{\text{θ}}_{pi})}-{\displaystyle \sum _{i=1}^{\text{β}}\cos ({\text{η}}_2{\text{θ}}_{ni})=0}\\ ⋮\\ {\displaystyle \sum _{i=1}^{\alpha }\cos ({\text{η}}_{\text{ς}}{\text{θ}}_{pi})}-{\displaystyle \sum _{i=1}^{\text{β}}\cos ({\text{η}}_{\text{ς}}{\text{θ}}_{ni})=0}\end{array}$

(9.27)

where σ is the number of positive/negative levels of v_an and can be expressed as

$\sigma \text{=\hspace{0.17em}α\hspace{0.17em}-\hspace{0.17em}β}$

(9.28)

where ς is the number of switching angles in a quarter waveform of v_an and can be expressed as

$\text{ς}\text{=\hspace{0.17em}α}\text{+}\text{β}$

(9.29)

MR is shown in Equation (9.21). Equation (9.27) is subject to

$\{\begin{array}{l}0<{\text{θ}}_{p1}<{\text{θ}}_{p2}<\mathrm{\dots }<{\text{θ}}_{p\alpha }<\text{π/2}\\ 0<{\text{θ}}_{n1}<{\text{θ}}_{n2}<\mathrm{\dots }<{\text{θ}}_{n\beta }<\text{π/2}\\ {\text{θ}}_{nj}<{\text{θ}}_{p(j+\sigma )}j=1,2,\mathrm{\dots },\text{β}\end{array}$

(9.30)

In the two-HB THMI, when the output voltage changes between E and 2E or −E and −2E, the switching components of the higher voltage HB will switch on and off as shown in Figure 9.2. To keep high-voltage switching components at a lower frequency in the THMI, the limitation in Equation (9.31) is added into Equation (9.27) to ensure that higher-voltage switching components switch at the fundamental frequency.

${\text{θ}}_{p2}<{\text{θ}}_{n1}$

(9.31)

FIGURE 9.9
Waveform using the virtual stage modulation two-HB, nine-level, α = 6, β = 2.

Figure 9.9 illustrates the waveform using the virtual stage modulation for the two-HB THMI with nine output voltage levels. The number of virtual stages, β, is two.

Figures 9.10 and 9.11 show the typical synthesized waveform of the phase leg voltage, line-to-line voltage waveform and their frequency spectrum in the virtual stage modulation strategy. The MR is 0.83, and the number of virtual stages is two. θ_p1 to θ_p6 are 0.1321, 0.3320, 0.5307, 0.6226, 0.9133, and 1.0419. θ_n1 is 0.5750, and θ_n2 is 0.9652. Because of two additional virtual stages, four more degrees of freedom of switching angles are created such that the 13th, 17th, 19th, and 23rd harmonics can be eliminated from the phase leg voltage as shown in Figure 9.10. The THD of the phase leg voltage is 10.67%. The triple-order harmonic components of line-to-line voltage do not exist, and the harmonics are pushed to 1250 Hz as shown in Figure 9.11. The THD of the line-to-line voltage is 7.3%.

In virtual stage modulation strategy, the relative modulation index also has upper and lower limits. Compared with the step modulation strategy, the optimal computation of the virtual stage modulation strategy tolerates more unequal restriction, as shown in Equations (9.30) and (9.31). When the switching angles do not satisfy these restrictions, the themes of switching angles no longer exist.

The concept of the relative modulation index can be used in the step modulation strategy by a similar method. Table 9.7 shows two cases. One is the nine-level output voltage with two virtual stages, and the other is the seven-level output voltage with one virtual stage. With the nine-level output voltage and two virtual stages, the 5th, 7th, 11th, 13th, 17th, 19th, and 23rd harmonics can be eliminated. With the seven-level output voltage and one virtual stage, the 5th, 7th, 11th, and 13th harmonics can be eliminated. When there are five or three output voltage levels, the virtual stage modulation strategy is not applicable in the two-HB THMI since the restriction in Equation (9.31) must be violated. Therefore, when M is less than 0.38 in this case, the step modulation strategy will be used. With the virtual stage modulation strategy, the scheme of switching angles is shown in Figure 9.12.

FIGURE 9.10
Synthesized phase leg voltage waveform and frequency spectrum of a two-HB THMI with virtual stage modulation.

FIGURE 9.11
Synthesized line-to-line voltage waveform and frequency spectrum of a two-HB THMI with virtual stage modulation.

TABLE 9.7
Range of Modulation Indexes with Virtual Stage Modulation in a Two-HB THMI

Note: Indices in a two-HB THMI: p1 to p6 = θ_p1 to θ_p6, n1 to n2 = θ_n1 to θ_n2.

FIGURE 9.12
Scheme of switching angles for virtual stage modulation as a function of modulation.

9.2.3.3    Hybrid Modulation Strategy

The hybrid modulation strategy for the hybrid multilevel inverters has been presented, which incorporates stepped voltage waveform synthesis in higher-power HB cells in conjunction with high-frequency variable PWM in the lowest-power HB cell. Figure 9.13 presents a block diagram of the command circuit utilized to determine the command signals of the power devices of all HBs. As shown in Figure 9.13, the reference signal of the hybrid multilevel inverter, v_ref is the command signal of the HB with the highest DC voltage source (V_dc,h). This signal is compared with a voltage level corresponding to the sum of all smaller DC voltage sources of the hybrid multilevel inverter, σ _max,h−. If the command signal is greater than this level, the output of the inverter with the highest DC voltage source must be equal to V_dc,h. In addition, if the command signal is less than the negative value of σ_{max h}−₁, the output of this cell must be equal to −V_dc,h, otherwise the output of this cell must be zero.

FIGURE 9.13
Hybrid modulation for hybrid multilevel inverters.

The command signal of the ith HB cell is the difference between the command signal of the HB_i+1 and the output voltage of the HB_i+1. In this way, the command signal of the ith cell contains information about the harmonic content of the output voltage of all higher-voltage cells. This command signal is compared with a voltage level corresponding to the sum of all voltage sources up to the HB_i−1 (σ_max i−₁). In the same way as for HBh, the output voltage of this cell is synthesized from a comparison of these two signals.

Finally, the command signal of HB₁ (lowest power inverter) is compared with a high-frequency triangle carrier signal, resulting in a high-frequency output voltage. Therefore, the output voltage harmonics will be concentrated around the frequencies that are multiples of the switching frequency of the inverter with the lowest DC voltage source. Consequently, the spectral response of the output voltage depends on the switching frequency of the lowest power inverter, while the power processing depends on the inverter with the highest DC voltage source.

However, with the hybrid modulation strategy, a voltage waveform must be synthesized to modulate at high frequency among all adjacent voltage steps. Only the lower-voltage HB can switch at high frequency, so the DC voltages must satisfy the following equation:

$V_{dc{i}^{*}}\le 2{\displaystyle \sum }_{k=1}^{i-1}{V}_{dc{k}^{*}},j=2,3,\dots ,h$

(9.32)

where * indicates the normalized value. Therefore, the hybrid modulation strategy can be applied in binary hybrid multilevel inverters and quasi-linear multilevel inverters. The relationship of DC voltages of the THMI is shown in Equation (9.15), so the THMI cannot use the hybrid modulation strategy.

9.2.3.4    Subharmonic PWM Strategies

Subharmonic PWM strategies for multilevel inverters employ extensions of carrier-based techniques used for conventional inverters. It has been reported that the spectral performance of a five-level waveform can be significantly improved by employing alternative dispositions and phase shifts in the carrier signals. This concept can be extended to a nine-level case with the available options for polarity and phase variation. A representative subharmonic PWM waveform with the nine-level phase leg voltage is shown in Figure 9.14.

If a two-HB THMI is used to synthesize the nine-level phase leg voltage as shown in Figure 9.14b, the higher-voltage HBs will switch at high frequencies, since the output voltage varies between E and 2E or −E and −2E continually at a certain interval. In THMI, it is not appropriate for the higher-voltage HBs to switch at high frequency. Therefore, subharmonic PWM is not applicable in THMI.

9.2.3.5    Simple Modulation Strategy

In the simple modulation strategy, the switching pattern is determined by comparing a reference signal with stages and then choosing the stages closest to the reference signal. Figure 9.15 shows the simple modulation strategy with the nine-level output voltage.

FIGURE 9.14
Representative waveforms for subharmonic PWM waveform with carrier polarity variation.

FIGURE 9.15
Illustration of the simple modulation strategy.

The advantages of this strategy are a simple control algorithm, high flexibility, and dynamic response. The disadvantage is that the amplitudes of lower-order harmonic components are relatively higher. The THMI can generate the greatest voltage levels among all multilevel inverters using the same number of components. If the number of voltage levels is high enough, the lower-order harmonic components of output voltages will be very small with the simple modulation strategy. For example, in the case of a four-HB THMI that can generate an 81-level voltage, with the simple modulation strategy, the amplitude of each lower-order harmonic component of the output voltage is less than 0.9% of the amplitude of the fundamental component and THD of output voltage is less than 2%.

Several modulation strategies have been investigated. With the hybrid modulation strategy and modulation strategies working with high switching frequencies, such as the subharmonic PWM strategy, a voltage waveform must be synthesized to modulate at high frequency among all adjacent voltage steps. However, in THMI, it cannot be achieved when only the lowest-voltage HBs switch at high frequency, which can be derived from Equations (9.15) and (9.32). In other words, if a voltage can be synthesized to modulate at high frequency in THMI, the higher-voltage HBs must switch at high frequency.

One of the most important advantages of THMI is that higher-voltage HBs can switch at lower frequency. Therefore, higher-frequency switching of higher-voltage HBs not only is unacceptable in high-power applications but also violates the main advantage of THMI. Therefore, the hybrid modulation strategy and other modulation strategies working with high switching frequencies are not applicable in THMI.

The low-frequency modulation strategies such as step modulation strategy and virtual stage modulation strategy are suitable in THMI. In virtual stage modulation, an additional constraint, such as Equation (9.31) for two-HB THMI, must be added to ensure the higher HBs switch at a lower frequency. Additionally, the simple modulation strategy can be used in the THMIs that can generate many voltage levels.

At the same time, for the THMIs that can generate many voltage levels, the space vector modulation can achieve a very good linearity between the modulation index and the fundamental component of load voltage and eliminate common-mode voltages.

9.2.4    Regenerative Power

The DC sources of the THMI can be batteries or bridge rectifiers. Large reverse current for a long time will damage batteries. Diode bridge rectifiers cannot permit reverse power. Controlled bridge rectifiers can transmit energy to supplies. However, compared to simple diode bridge rectifiers, controlled bridge rectifiers are much more complex and costly because of complex control circuits and the higher price of controlled semiconductors.

9.2.4.1    Analysis of DC Bus Power Injection

The switching function is involved in the analysis of DC bus power injection. The switching function, F, is shown in Table 9.1. The relationship between output voltage of a HB, v_H, and the DC link voltage of the HB, V_dc, can be written as Equation (9.33). The relationship between i_dc (current flowing through the DC bus) and i_an (output current of the THMI) can be also derived as Equation (9.34).

${\upsilon }_H=\text{F}\cdot {\text{V}}_{dc}$

(9.33)

$i_{dc}=\text{F}\cdot i_{an}$

(9.34)

Only the fundamental component of output current of the THMI is considered since high-frequency harmonic components do not generate average power. So i_an can be expressed as

$i_{an}=I_{an}\cdot \sin (\text{ω}t+\text{φ)}$

(9.35)

FIGURE 9.16
General waveform of DC bus voltage and THMI output current.

where I_an is the amplitude of i_an and φ is the angle of power factor. General waveforms of v_H and i_an are shown in Figure 9.16. The average DC power that supplies the HB over a period can be calculated as

$P_{dc}=\frac{1}{T}{\displaystyle {\int }_0^T{V}_{dc}\cdot i_{dc}dt}$

(9.36)

where T is the period of i_an. From Equations (9.34) and (9.36), we can get

$P_{dc}=\frac{1}{T}{\displaystyle {\int }_0^T{V}_{dc}\cdot F\cdot i_{an}dt=\frac{1}{T}}{\displaystyle {\int }_0^T{\upsilon }_H\cdot i_{an}dt}$

(9.37)

The relationship between switching angles in Figure 9.16 can be expressed as

${\text{θ}}_i=\{\begin{array}{cc}\text{π}+{\text{θ}}_{i-2\text{ς}}& i=(2\text{ς+1)}\cdots \text{4ς}\\ \text{π}-{\text{θ}}_{2\text{ς+1-i}}& i=(\text{ς+1)}\cdots \text{4ς}\end{array}$

(9.38)

From Equation (9.38), v_H has following characteristic:

${\upsilon }_H(\text{π}\text{-\hspace{0.17em}ω}t\text{)=}{\upsilon }_H(\text{ω}t\text{)}$

(9.39)

${\upsilon }_H(\text{ω}t+\text{π)=}-{\upsilon }_H(\text{ω}t\text{)}$

(9.40)

From Equation (9.35), we obtain

$i_{an}(\omega t+\pi )=-i_{an}(\omega t)$

(9.41)

From Equations (9.40) and (9.41), the average DC power can be calculated over a half period as

$P_{dc}=\frac{2}{T}{\displaystyle {\int }_0^{\frac{T}{2}}{\upsilon }_H\cdot i_{an}dt}$

(9.42)

Suppose P_i is the power generated by the voltage pulse from θ_i/ω to θ_i+1/ω and the corresponding voltage pulse ranges from θ_2ç__i/ω to θ_{2ç+1_i}/ω. P_i can be expressed as:

$P_i=\frac{{(-1)}^n\text{ω}}{\text{π}}\left({\displaystyle {\int }_{{\text{θ}}_i/\omega }^{{\text{θ}}_{i+1}/\omega }{V}_{dc}\cdot I_{an}\cdot \sin (\text{ω}t+\phi )dt+}{\displaystyle {\int }_{{\text{θ}}_{2\text{ς-i}}/\omega }^{{\text{θ}}_{2\text{ς}+1-i}/\omega }{V}_{dc}\cdot I_{an}\cdot \sin (\text{ω}t+\phi )dt}\right)$

(9.43)

where i = 2n – 1 and n is a natural number. From Equations (9.38) and (9.43), Pi is expressed as

$P_i=\frac{{(-1)}^n}{\text{π}}{V}_{dc}\cdot I_{an}\cdot 2\cdot \cos (\text{φ})\cdot \cos ({\text{θ}}_i)-\cos ({\text{θ}}_{i+1}))$

(9.44)

Thus, the average DC power of the HB can be expressed as

$P_{dc}=\frac{2}{\text{π}}{V}_{dc}\cdot I_{an}\cdot \cos (\text{φ})\cdot {\displaystyle \sum (\cos ({\text{θ}}_{4n-3})-\cos ({\text{θ}}_{4n-2})}-\cos ({\text{θ}}_{4n-1})+\cos ({\text{θ}}_{4n}))$

(9.45)

In Equation (9.45), if θ_j is greater than π/2, θ_j will be set as π/2.

In general, the power factor angle φ is from −π/2 to π/2, so cos(φ) is greater than zero. V_dc and I_an are positive. Thus, we can conclude from Equation (9.46) that the power of the DC bus is negative if

${\displaystyle \sum (\cos ({\text{θ}}_{4n+1})-\cos ({\text{θ}}_{4n+2})}-\cos ({\text{θ}}_{4n+3})+\cos ({\text{θ}}_{4n-4}))<0$

(9.46)

Negative power of the DC bus means regenerative power.

9.2.4.2    Regenerative Power in THMI

Regenerative power may occur in lower-voltage HBs of THMI. Take the example of a two-HB THMI. If the step modulation strategy is applied, the restrictions that are added to Equation (9.30) to ensure that the power of DC buses is always positive are shown in Table 9.8. With these restrictions, ranges of relative modulation index are calculated as shown in Equation (9.9). The range of the relative modulation index decreases greatly when σ is two or three compared with Table 9.9. The range of the modulation index is not continuous, as shown in the last column of Table 9.9. The regenerative power will occur in the lower-voltage HB when M varies from 0.51 to 0.55 or from 0.33 to 0.44.

TABLE 9.8
Additional Restriction to Avoid Regenerative Power of DC Buses in Step Modulation

σ	Restriction
1	cos(θ 1) > 0
2	cos(θ 1) - 2cos(θ2) > 0
3	cos(θ 1) - 2cos(θ2) + cos(θ3) > 0
4	cos(θ 1) - 2cos(θ2) + cos(θ3) + cos(θ4) > 0

Consider the virtual stage modulation strategy is used in a two-HB THMI. In Table 9.9, two cases are analyzed. One is the four-level positive/negative output voltage with two virtual stages, and the other is the five-level positive/negative output voltage with one virtual stage. Only the DC bus of the lower-voltage HB can have regenerative power. For the first case, the restriction that ensures positive power can be written as

$\cos ({\text{θ}}_{p1})-2\cos ({\text{θ}}_{p2})+\cos ({\text{θ}}_{p3})+\cos ({\text{θ}}_{p4})+\cos ({\text{θ}}_{p5})+\cos ({\text{θ}}_{p6})-\cos ({\text{θ}}_{n1})-\cos ({\text{θ}}_{n2})>0$

(9.47)

In the second case, the restriction can be expressed as

$\cos ({\text{θ}}_{p1})-2\cos ({\text{θ}}_{p2})+\cos ({\text{θ}}_{p3})+\cos ({\text{θ}}_{p4})+\cos ({\text{θ}}_{p5})-\cos ({\text{θ}}_{n1})>0$

(9.48)

With these restrictions, the range of the relative modulation index decreases as shown in Table 9.10. The regenerative power will occur in the lower-voltage HB when M varies from 0.53 to 0.62.

TABLE 9.9
Range of Modulation Index with the Step Modulation in a two-HB THMI (Avoid Regenerative Power of DC Buses)

TABLE 9.10
Range of Modulation Index Range with the Virtual Stage Modulation Strategy in a Two-HB THMI (Avoiding Regenerative Power of DC Bus)

9.2.4.3    Method to Avoid Regenerative Power

In the last section, the regenerative power that lower-voltage HBs can generate is discussed. In this section, the methods that are used to solve this problem will be introduced. A method is proposed in which the DC links of lower-voltage HBs are supplied by the low-power, isolated power sources fed by a common power supply from the highest-voltage HB. These power sources are bidirectional, and a bidirectional DC-DC power supply is used for this purpose. It is also possible to use independent output transformers with a common DC supply, as shown in Figure 9.17. A variation of this configuration was used in a 16 2/3 Hz substation for railroads in Bremen (Germany). In the system described here, the transforms are smaller for lower-voltage HBs because the voltages are scaled in powers of three. Besides, the switching frequencies of transformers connected with lower-voltage HBs are lower. Then the transforms connected with lower-voltage HBs become smaller for two reasons: voltage and switching frequency.

The foregoing two methods of solving the problem of regenerative power use additional equipment such as bidirectional DC/DC converters or output transformers, which increase the cost of the inverter system and power losses. A new method is presented to avoid regenerative power that does not use additional devices. Regenerative power is eliminated by avoiding outputting several null voltage levels, which will be explained by an example of a four-HB THMI in the following.

The average power of the DC bus of an HB can be expressed as Equation (9.45). In general, the power factor angle φ varies from −π/2 to π/2, so cos(φ) is greater than zero. V_dc and I_an are positive. Therefore, from Equation (9.45) and Figure 9.15, we can conclude that the reason for the regenerative power is the negative segments of v_H when the fundamental components of v_an are positive or the positive segments of v_H when the fundamental components of v_an are negative. The segments of v_H resulting in the regenerative power of the HB are called regenerative segments. The basic idea of eliminating regenerative power is to avoid output several levels of v_an, which will cause regenerative segments in HBs. Table 9.11 shows the voltage levels of v_an that cause regenerative segments of HBs in the case of a four-HB THMI. The voltage levels of v_an that are not selected for output are called null voltage levels. Table 9.11 also shows the priority of null voltage levels. For example, if the regenerative power occurs in the DC link of the HB₁, the voltage levels (14) and (-14) are selected as null voltage levels first. If the regenerative power still occurs, levels (17) and (-17) are also selected as null voltage levels. With the priority shown in Table 9.11, the null voltage levels distribute as evenly as possible, which results in better power quality.

FIGURE 9.17
THMI with output transformers.

Figure 9.18 shows the flowchart of the algorithm that stabilizes the DC link voltage of an HB. V_dc is the DC link voltage of an HB. V_dc,normal is the normal DC link voltage. V_dc,last is the DC link voltage in the previous sampling. N_null is the number of null voltage levels. In the switch table, the voltage levels are set as null or not based on N_null and Table 9.11.

TABLE 9.11
Voltage Levels of v_an that Cause Regenerative Segments of HBs

HB1	±14, ±17, ±32, ±23, ±5, ±20, ±38, ±29, ±26, ±11, ±2, ±8, ±35
HB2	±14, ±32, ±23, ±5, ±15, ±34, ±25, ±7, ±16, ±6, ±24, ±33
HB3	±14, ±17, ±15, ±20, ±19, ±16, ±21, ±18, ±22

FIGURE 9.18
Flowchart of the algorithm to stabilize DC link voltages.

With a lower modulation index, the power quality that the THMI outputs is a bit poorer with the proposed control scheme because more null voltage levels are not dedicated to the output voltage of the THMI. In the case of the four-HB THMI, with up to 81-level output voltage of the THMI, the simple modulation strategy is suitable for the THMI. If the simple modulation strategy is used and the new method is applied to eliminate the effect of regenerative power, the relationship between the modulation index and the THD is shown in Figure 9.19.

9.2.4.4    Summary of Regenerative Power in THMI

The topology of THMI has the distinct advantage of fewer components used compared with other topologies of multilevel inverters, but the THMI also has the notable disadvantage that the power of the lower-voltage HBs can be regenerative with a lower modulation index. If the THMI feeds an RL or RC load and simple diode bridge rectifiers are used as DC sources, the regenerative power will cause an increase of the DC capacitor voltages, which will damage the devices.

FIGURE 9.19
Relationship between the modulation index and THD.

Therefore, basically, the THMI is suitable for two applications. The first one is the application of reactive power compensation. The average power of the DC link of an HB is zero when the power factor angle is zero as shown in Equation (9.45), so the problem of regenerative power is avoided. The second one is the application in which the inverter always runs with a higher modulation index. From Table 9.9, we can see that the two-HB THMI runs with step modulation without the problem of regenerative power when M varies from 0.56 to 0.94. From Table 9.10, we can see that the two-HB THMI runs with virtual stage modulation without the problem of regenerative power when M varies from 0.62 to 0.92.

However, the inverter is required to work at any modulation index for active load in most cases. Two methods have been presented to solve the regenerative power problem. The first one uses bidirectional DC/DC converters, and the second one uses additional output transformers. A new method to solve the regenerative power is presented as a cost-effective solution because it does not use additional equipment. The DC capacitor voltages of lower-voltage HBs are kept stable by the new method. The trade-off is that power quality will decrease a bit with the lower modulation index.

9.3    Experimental Results

Some experimental results are shown here to help readers gain a deeper understanding.

9.3.1    Experiment to Verify Step Modulation and Virtual Stage Modulation

The performance of the step modulation strategy and virtual stage modulation strategy has been verified by the experiment of a single two-HB THMI. In the control circuit, a TMS320F240 DSP is used as the main processor, which provides the gate logic signals. In an HB, four MOSFETs, IRF540, are used as the main switches, which are connected in a full-bridge configuration. The load is a 23.2 Ω resistor. The total ratio of voltage measure is 1:2. The frequency spectrums are analyzed by the FFT (fast Fourier transform) function of the oscilloscope. The scale of the Y-axis of the frequency spectrum is 5dBV/div, and the reference level is 5 dBV.

The switching pattern of the step modulation technique is programmed and is loaded into the DSP. In the step modulation strategy, when there are nine output voltage levels and M is 0.83, the switching angles are 0.14778, 0.32325, 0.57376, and 0.99696. The THMI output voltage is shown in Figure 9.20. The frequency is 50 Hz, and the step voltage is about 5 V. The frequency spectrum is shown in Figure 9.21. The 5th, 7th,and 11th harmonics are less than 0.028 V (–37dB × 2 V), which means they are nearly eliminated.

FIGURE 9.20
Output voltage of the THMI with the step modulation M = 0.83 (10 V/div).

FIGURE 9.21
Frequency spectrum with the step modulation M = 0.83.

When there are seven output voltage levels and M is 0.49, the switching angles are 0.44717, 0.9097, and 1.1215. The output voltage of the THMI is shown in Figure 9.22, and the frequency spectrum is shown in Figure 9.23. The 5th and 7th harmonics are less than 0.02 V (–40dB × 2 V), which means they are nearly eliminated.

When there are five output voltage levels and M is 0.32, the switching angles are 0.51847 and 1.1468. The output voltage of the THMI is shown in Figure 9.24, and the frequency spectrum is shown in Figure 9.25. The 5th harmonics are less than 0.02 V (–40dB × 2 V), which means they are nearly eliminated.

FIGURE 9.22
Output voltage of the THMI with the step modulation M = 0.49 (10 V/div).

FIGURE 9.23
Frequency spectrum with the step modulation M = 0.49.

The switching pattern of the modified virtual stage modulation technique is programmed and is loaded to the DSP. In virtual stage modulation, when there are nine output voltage levels and M is 0.83, the switching angles are 0.13177, 0.33186, 0.52855, 0.6202, 0.91294, 1.0423, 0.57124, and 0.96573. The output voltage of the THMI is shown in Figure 9.26, and the frequency spectrum is shown in Figure 9.27. The 5th, 7th, 11th, 13th, 17th, 19th, and 23rd harmonics are less than 0.035 V (–35dB × 2V), which means they are nearly eliminated.

FIGURE 9.24
Output voltage of the THMI with the step modulation M = 0.32 (10 V/div).

FIGURE 9.25
Frequency spectrum with the step modulation M = 0.32.

When there are seven output voltage levels and M is 0.49, the switching angles are 0.40549, 0.88038, 1.1497, 1.5318, and 1.5082. The output voltage of the THMI is shown in Figure 9.28, and the frequency spectrum is shown in Figure 9.29. The 5th, 7th, 11th, and 13th harmonics are less than 0.02 V (–40 dB × 2V), which means they are nearly eliminated.

9.3.2    Experiment to Verify New Method to Eliminate Regenerative Power

The performance of the methods to eliminate the effect of regenerative power by avoiding outputting the null voltage levels is verified by the experiment of a 4-HB THMI, in which diode bridge rectifiers are used as the DC sources of HBs. The step voltage is 5.9 V. The frequency of output voltage is set at 50 Hz, and the sampling frequency is set at 10 kHz. The output voltage of the inverter has up to 81 levels, so the simple modulation strategy as shown in section 9.2. The control algorithm to stabilize the DC link voltages is shown in Figure 9.26. A TMS320F240 DSP-controlled card is used to control the inverter. The configuration of the experimental system is shown in Figure 9.30.

FIGURE 9.26
Output voltage of the THMI with the virtual stage modulation M = 0.83 (10 V/div).

FIGURE 9.27
Frequency spectrum with the virtual stage modulation M = 0.83.

Figure 9.31 shows the waveform of the output voltage of the 4-HB THMI with simple modulation strategy when the modulation index is 0.79. The power quality is good due to of the large number of voltage levels.

FIGURE 9.28
Output voltage of the THMI with the virtual stage modulation M = 0.49 (10 V/div).

FIGURE 9.29
Frequency spectrum with the virtual stage modulation M = 0.49.

Figure 9.32 shows the output voltage waveform with some null voltage levels when the modulation index is 0.7. From the enlarged figure, we can observe that some voltage levels are not generated. Moreover, the step voltages are kept nearly the same, which means that the voltages of DC capacitors are kept stable. Figure 9.33 shows the worst case when the modulation index is 0.53. In this case, null voltage levels include ±5, ±14, ±15, ±16, ±17, ±19, ±20, ±21, ±23, ±32, and ±34.

FIGURE 9.30
General representation of experimental test system.

FIGURE 9.31
Waveform of output voltage of the inverter with the simple modulation strategy M = 0.79 (100 V/div), frequency = 50 Hz, THD = 1.94%.

FIGURE 9.32
Waveform of output voltage of the inverter M = 0.7 (100 V/div).

FIGURE 9.33
Waveform of output voltage of the inverter M = 0.42 (100 V/div).

9.4    Trinary Hybrid 81-Level Multilevel Inverter

A trinary hybrid 81-level multilevel inverter for motor drive with zero common-mode voltage was designed. Figure 9.34 shows the power circuit topology of the trinary hybrid multilevel inverter for a motor drive. Bidirectional DC/DC converters connected to the DC link of H-bridges feed HBs. To get the maximum output voltage levels of the inverter, the ratio of DC link voltages is arranged as 1:3:9:27, so the inverter can output 81 voltage levels in each phase. With four HBs per phase, however, a cascade multilevel inverter [2,3,4] can output only 9 voltage levels each phase, and a binary hybrid multilevel inverter [5] can output only 31 voltage levels each phase. The more output voltage levels a multilevel inverter has, the more nearly sinusoidal the synthesized waveform. Thus, with the trinary hybrid topology, total harmonic distortion (THD) can be greatly reduced.

Three phases of the inverter are controlled separately, and the operating principle of each phase is identical. In the following, the A-phase of the inverter is analyzed. HB_ak represents the kth HB in the A-phase leg of the inverter, as shown in Figure 9.35. v_H,ak and v_C,ak represent the output voltage and the DC link voltage of the HB_ak, respectively. A switching function, F_ak, is used to relate v_H,ak and v_C,ak as

${\upsilon }_{H,ak}=F_{ak}\cdot {\upsilon }_{C,ak}(k=\mathrm{1..4})$

(9.49)

The value of F_ak can be 1, -1, or 0. For the value 1, the upper switch of the left leg and the lower switch of the right leg in an HB need to be turned on. For the value -1, the lower switch of the left leg and the upper switch of the right leg in an HB need to be turned on. For the value 0, upper switches of both legs or lower switches of both legs need to be turned on. The A-phase voltage of the inverter, v_G,a, is represented as

FIGURE 9.34
Power circuit topology of the trinary hybrid 81-level inverter for motor drives.

FIGURE 9.35
An H-bridge.

${\upsilon }_{G,a}={\displaystyle \sum _1^4(F_{ak}\cdot {\upsilon }_{C,ak})}$

(9.50)

Suppose l is the ordinal of expected voltage level that the inverter outputs. If l is positive or zero, the inverter outputs the positive lth voltage level. If l is negative, the inverter outputs the negative (-l)th voltage level. The value of F_ak can be determined by

$\begin{array}{l}{F}_{a4}={\text{B}}_u(\text{ABS(}\ell \text{)}-\text{13)}\cdot \text{ABS(}\ell \text{)/}\ell {\ell }_3=\ell -{\text{F}}_{a4}\cdot 27\hfill \\ F_{a3}={\text{B}}_u(\text{ABS(}{\ell }_3\text{)}-\text{4)}\cdot \text{ABS(}{\ell }_3\text{)/}{\ell }_3{\ell }_2={\ell }_3-{\text{F}}_{a3}\cdot 9\hfill \\ F_{a2}={\text{B}}_u(\text{ABS(}{\ell }_2\text{)}-\text{1)}\cdot \text{ABS(}{\ell }_2\text{)/}{\ell }_2{\ell }_1={\ell }_2-{\text{F}}_{a2}\cdot 3\hfill \\ F_{a1}={\text{B}}_u(\text{ABS(}{\ell }_1\text{))}\cdot \text{ABS(}{\ell }_1\text{)/}{\ell }_1\hfill \end{array}$

(9.51)

where ABS is the function of absolute value and B_u is defined as

$B_u(\tau )=\{\begin{array}{cc}1& \tau >0\\ 0& \tau \le 0\end{array}$

(9.52)

From Equation (9.51), we can get the relationship between the output voltage of a phase leg and the values of switching functions of HBs in a phase leg.

9.4.1    Space Vector Modulation

v_G,a, v_G,b, and v_G,c are the voltages of terminals a, b, and c of the inverter with respect to the neutral n [9]. Three-phase inverter output voltages can be represented by a space vector in the x-y plane using the following transformation:

$\upsilon ={\upsilon }_x+j{\upsilon }_y=\frac{2}{3}({\upsilon }_{G,a}+\alpha {\upsilon }_{G,b}+{\alpha }^2{\upsilon }_{G,c})$

(9.53)

where

$\alpha =-\frac{1}{2}+j\frac{\sqrt{3}}{2}$

(9.54)

Equation (9.53) can be expressed as a function of their real and imaginary components:

${\upsilon }_x=\frac{1}{3}(2{\upsilon }_{G,a}-{\upsilon }_{G,b}-{\upsilon }_{G,c})$

(9.55)

${\upsilon }_y=\frac{1}{\sqrt{3}}({\upsilon }_{G,b}-{\upsilon }_{G,c})$

(9.56)

The number of different voltage vectors is represented as

$N_{\upsilon }=2N_l-1+{\displaystyle \sum _{i=1}^{2(N_l-1)}2i}$

(9.57)

where N_l is the number of voltage levels. Each phase can generate 81 different voltages, so totally 19,411 different voltage vectors can be generated as shown in Figure 9.36.

The common mode voltage is defined as

${\upsilon }_{cm}=\frac{1}{3}({\upsilon }_{G,a}+{\upsilon }_{G,b}+{\upsilon }_{G,c})$

(9.58)

Considering this definition, we can find vectors generated by three phase voltages that produce zero common mode voltage as shown in Figure 9.37. The use of only vectors that generate zero common mode voltages to the load reduces the density of vectors available to be applied. The number of different authorized licensed voltage vectors with zero common mode voltage is represented as

$N_{\upsilon z}=\frac{3N_l^2+1}{4}$

(9.59)

Therefore, there are still 4,921 different voltage vectors available.

In Figure 9.38, the nearest voltage vector with respect to the reference vector v_ref is delivered. The following algorithm is used to select the appropriate vector based on the information of the reference vector.

FIGURE 9.36
Voltage vectors of a three-phase 81-level inverter.

FIGURE 9.37
Voltage vectors of a three-phase 81-level inverter with zero common mode voltage.

FIGURE 9.38
Normalized voltage vectors of a three-phase 81-level inverter with zero common mode voltage.

Step 1. Normalize the reference vector v_ref = v_xref + jv_yref

${{\upsilon }^{\prime }}_{ref}=\frac{1}{E}{\upsilon }_{xref}+j\frac{\sqrt{3}}{E}{\upsilon }_{yref}=x+jy$

(9.60)

Step 2. Normalize the candidate space vector with the transformation in Equation (9.60), converting them into integer values. After conversion, the space vectors with zero common mode voltage are shown in Figure 9.37. The addition of the x-axis value and y-axis value of each space vector with zero common mode voltage is an even number.

Step 3. v′_ref will lie in one of the rectangles defined by two normalized candidate space vectors as shown in the right part of Figure 9.38. The rectangle is identified by the values of left bottom point of the rectangle. v′_ref (x, y) lies in the rectangle (floor(x), floor(y)), where floor(α) is the function that rounds the elements of α to the nearest integer that is less than or equal to α. In the rectangle (floor(x), floor(y)), there are two normalized voltage vectors, (floor(x), floor(y)) and (floor(x)+1, floor(y)+1), if the addition of floor(x) and floor(y) is even. Two vectors are (floor(x)+1, y) and (x, floor(y)+1) if the addition of floor(x) and floor(y) is odd. Suppose the reference vector, v′_ref (x, y) lies in the rectangle with two normalized voltage vectors, v₁ and v₂. The nearest vector is selected by comparing the distances of each candidate vector, v₁ and v₂, with respect to v′_ref, using the following equations:

$d_1=\sqrt{(3{(x-\mathrm{Re}({\upsilon }_1))}^2-(y-\mathrm{Im}{(({\upsilon }_1))}^2}$

(9.61)

$d_2=\sqrt{(3{(x-\mathrm{Re}({\upsilon }_2))}^2-(y-\mathrm{Im}{(({\upsilon }_2))}^2}$

(9.62)

The selection is done by

$\begin{array}{c}if{d}_1<d_{2}then{\upsilon }_{sel}={\upsilon }_1\\ else{\upsilon }_{sel}={\upsilon }_2\end{array}$

(9.63)

Step 4. Three-phase output voltages with zero common mode voltage are generated by an inverse transformation for v_sel as

$\begin{array}{c}{\upsilon }_{G,a}=round(\mathrm{Re}({\upsilon }_{sel}))\\ {\upsilon }_{G,b}={\upsilon }_{G,a}+\frac{Im({\upsilon }_{sel})-3\mathrm{Re}({\upsilon }_{sel})}{2}\\ {\upsilon }_{G,c}={\upsilon }_{G,a}-\frac{Im({\upsilon }_{sel})+3\mathrm{Re}({\upsilon }_{sel})}{2}\end{array}$

(9.64)

9.4.2    DC Sources of H-Bridges

There are three reasons to set DC sources of HBs as bidirectional DC/DC converters in the proposed topology. The first reason is that the bidirectional DC/DC converter can transfer the regenerative power from the HB to the rectifier. In an HB, the output voltage is v_H, and the current flowing through the HB is i_H, as shown in Figure 9.39.

Only the fundamental component of output current of the inverter is considered since high-frequency harmonic components do not generate average power. Thus, the average power flowing through the DC link of the HB, P_H,dc, can be expressed as

$P_{H,dc}=\frac{2}{\text{π}}{\upsilon }_C{I}_H\cos \text{φ}{\displaystyle \sum (\cos ({\text{θ}}_{4n-3})-(\cos ({\text{θ}}_{4n-2})-(\cos ({\text{θ}}_{4n-1})-(\cos ({\text{θ}}_{4n}))n=1,2,\mathrm{..}}$

(9.65)

FIGURE 9.39
General waveform of output voltage and current of an HB.

where v_C is the DC link voltage of the HB and I_H is the amplitude of i_H. φ is the power factor angle for fundamental components of v_H and i_H. In Equation (9.65), if θ_j is greater than π/2,θ_j it will be set as −π/2. In general, the power factor angle φ varies from −π/2 to π/2, so cos(φ) is greater than zero. v_C and I_H are positive. Thus, we can conclude from Equation (9.65) that the power of DC link is negative if

${{\displaystyle \sum }}^{\text{}}(\cos ({\text{θ}}_{4n-3})-\cos ({\text{θ}}_{4n-2})-\cos ({\text{θ}}_{4n-1})-\cos ({\text{θ}}_{4n}))<0n=1,2.$

(9.66)

When the inverter feeds the motor, the power of the DC link of the HB with the highest DC voltages is always positive. However, the power of the DC link of other HBs may be negative with a lower modulation index. Therefore, the bidirectional DC/DC converter is necessary here to transfer regenerative power of the DC link back to the rectifier to avoid the increase of the DC link voltage.

The second reason is that variation of the DC link voltage of an HB is required to be very small. For example, the variation of the DC link voltage of the HB with a DC link voltage of 27 E must be less than 0.5/27 = 0.019. Otherwise, the contribution of the HB with DC link voltage of E for the power quality will be negligible. DC/DC converters with high bandwidth close loop control can stabilize the DC link voltages of HBs.

The third reason is that transformers used in bidirectional converters are small, cost-effective, and high efficient. In other topologies of hybrid multilevel inverters for motor drives, the output ports of HBs are connected together by transformers. However, these low-frequency transformers are bulky and inefficient. Compared with configurations with low-frequency transformers, the efficiency of the DC/DC converter is higher. The efficiency of the DC/DC converter measured in the low power experiments is around 90%. In practical high-power application, that can reach 97% [6], which is much higher than that of the traditional configuration of low-frequency transformers and rectifiers.

Several topologies of bidirectional DC/DC converters were proposed [7,8]. The topology of the bidirectional DC/DC converter [8] is used in the proposed system shown in Figure 9.40. The transformer provides galvanic isolation between the input and output. The primary side of the converter is a half-bridge and is connected to the DC link of rectifier. All DC/DC converters share a diode rectifier as shown in Figure 9.40. The secondary side, connected to the DC link of the HB, forms a current-fed push–pull. The converter has two modes of operation. In the forward mode, the DC link of an HB is powered by the DC link of the rectifier. In the backward mode, the DC link of an HB provides the energy to the DC link of the rectifier.

The left part of Figure 9.41 shows the idealized waveforms in the forward mode: Interval t₀–t₁: Switch S₂ is off, and S₁ is on at time t₀. A voltage across the primary winding is v_Cr/2. The body diode of switch S₄, D_S4, is forward biased. The current flow through S₁, i_S1, contributes to the linearly increasing inductor current and the transformer primary magnetizing current. Interval t₁–t₂: Switch S1 is turned off at time t₁, and S₂ remains on. No power is transferred to the secondary side during this dead time interval since there is zero voltage across the primary. The energy stored in L_o results in the freewheeling of the current i_Lo equally through the body diodes D_S3 and D_S4. Interval t₂–t₃: Switch S₂ is turned on at time t₂, and S₁ remains off. The operation is similar to that during interval t₀–t₁, but now D_S3 conducts and provides secondary-side rectification. Inductor current rises linearly again. Interval t₃–t₄: Switch S₂ is turned off at time t₂, and S₁ remains off. The operation is similar to that in the interval t₁–t₂. Figure 9.40 shows a balancing winding N_p1 and two diodes D1 and D₂ on the primary side of the half-bridge. They maintain the voltage at the junction of C₁ and C₂ to be equal to one half of the input voltage, and prevent a voltage shift to the transformer core. N_p1 has the same number of turns as the winding N_p and is phased in series with it through the on time of S₁ and S₂.

FIGURE 9.40
Bidirectional DC/DC converter.

FIGURE 9.41
Waveforms of bidirectional DC/DC converter during the forward and backward modes.

In the backward mode, the switches S₃ and S₄ of the current-fed push-pull topology are driven at duty ratios greater than 0.5. The converter operation during this mode is shown in the right part of Figure 9.41. Interval t₀–t₁: Switch S₃ is turned on, and S₄ remains on at time t₀. N_S is subject to a short circuit, which causes the inductor L_o to store energy as the DC link voltage of the HB appears across it. i_Lo ramps up linearly and is shared equally by both S₃ and S₄. During this interval, C₁ and C₂ provide the output power. Interval t₁–t₂: Switch S₄ is turned off, and S₃ remains on at time t₁. The energy stored in the inductor during the previous interval is now transferred to the load through D_S2 and D₁. Voltages across N_p1 and N_p are identical due to their series phasing and equal number of turns. This allows simultaneous and equal charging of both C1 and C₂ through D₁ and D_S2, respectively. Interval t₂-t₃: Switch S₄is turned on, and S₃ remains on at time t₂. This interval is similar to the interval t₀–t ₁. The duty ratio for S₃ is therefore greater than 0.5. Interval t₃–t₄: Switch S₃ is turned off, and S₄ remains on at time t₃. The stored energy of L_o is transferred to the primary side of the converter through S₄, D_S1, and D₂. The conduction of D_S1 and D₂ results in equal charging of C ₁ and C₂, respectively. Current mode control is used for both modes of converter operations. Small signal analysis for both modes under mode control is performed to generate the transfer functions to design and evaluate the control loop [8].

9.4.3    Motor Controller

The proposed multilevel inverter is used to feed an induction motor. Vector control technique is applied in the motor controller. Vector control implies independent control of flux current and torque current components of stator current through a coordinated change in the supply voltage amplitude, phase, and frequency. As the flux variation tends to be slow, constancy of flux should produce a fast torque current response and finally a fast speed (position) response. The controller is shown in Figure 9.42, and the current decoupling network in the controller is shown in Figure 9.43. To simplify the current decoupling network, the rotor flux orientation is used in the current decoupling network. Once the reference d–q current i_da*, i_qa *, and flux orientation angle θ_er + γ_a^* are known, the DC current controllers are used to translate these commands to v_da* and v_qa*, and use Park transformation to translate v_da* and v_qa* to v_α* and v_β*. The output signal of the motor controller, v_α* and v_β*, will be sent to the inverter controller to control the multilevel inverter to provide the appropriate voltages to feed the motor.

FIGURE 9.42
Motor controller.

9.4.4    Simulation and Experimental Results

The performance of the 81-level trinary hybrid multilevel inverter for motor drives presented earlier has been verified by simulation. The simulation investigations were performed with MATLAB Simulink. The unit voltage of the multilevel inverter, E, is set as 10 V. The modulation index is defined as where |v_an|₁ is the fundamental amplitude of output voltage. Based on the simulation results, the relationship between |v_an|₁ and the modulation index is shown in Figure 9.44. When the modulation index is very low, it does not have a very good linear relationship. However, due to the large number of voltage steps, the relationship becomes satisfied linearly with higher modulation indexes.

$m=\frac{\text{π}|{\upsilon }_{an}{|}_{{}^{{}^{{}_1}}}}{4\times 40E}$

(9.67)

FIGURE 9.43
Current decoupling network.

FIGURE 9.44
Amplitude of phase voltage versus modulation index.

When the inverter drives an induction motor, a command of speed step change from 1430 to 715 rpm in 1ms. Figure 9.45 shows simulation results of speed, output voltage of the inverter, output current of the inverter, DC link voltages of HBs in the A-phase, and common-mode voltages. The speed has a rapid response. The common mode voltage is always zero except during the short transition time. Total harmonic distortion (THD) of output voltage is as low as 1%. Figure 9.46 shows the detailed waveforms of the output voltage of inverters. Figure 9.47 shows the simulation results of torque, output voltages, and output currents of the inverter when the reference torque step-changes from 1.29 to 7.74 Nm. The motor drive system also has a good dynamic response for the step change of torque.

To verify the performance of the proposed inverter experimentally, a hardware prototype has been built in the laboratory. The experimental setup of the proposed control system consists of a three-phase, 380 V, 50 Hz, 4 pole, 3-kW induction motor and power circuit using trinary hybrid multilevel inverter. The inverter and motor are controlled using TMS320F240 controller cards. The current mode controller of the DC/DC converters is implemented by UC 3846 and UCC 3804 for the forward mode and backward mode, respectively. Figures 9.48 and 9.49 show the waveforms of speed, phase current, phase voltage, and line-to-line voltage when the reference speed of the motor has a step change, which verifies the simulation results as shown in Figure 9.58. Figure 9.50 shows the detailed waveforms of phase voltage and common mode voltage. As shown in Figure 9.63, the phase voltage is synthesized by lots of stable step voltages, and the common mode voltage is almost zero.

FIGURE 9.45
Simulation waveforms for a step change of speed.

FIGURE 9.46
Simulation waveforms of output voltages of the inverter.

FIGURE 9.47
Simulation waveforms for a step change of torque (T from 1.29 Nm to 7.74 Nm).

FIGURE 9.48
Experiment waveforms for a step change of speed. CH1: speed (750 rad/s/div); CH2: phase current (2 A/div).

FIGURE 9.49
Experiment waveforms for a step change of speed. CH1: phase voltage (200 V/div); CH2: line-to-line voltage (400 V/div).

FIGURE 9.50
Experiment detailed waveforms. CH1: phase voltage (100 V/div); CH2: common mode voltage (20 V/div).

References

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