#define VMP_LITTLE_ENDIAN

This is oversimplifying it and there are better methods such as the BSWAP instruction on the 80×86, but this is a generic method for cross-platform portability.

  int32 VMP_ENDIAN32(int32 val)
  {
    uint8 buf[4];
    
    buf[ 0 ]=*(((uint8*)&val)+3);    // = [3]
    buf[ 1 ]=*(((uint8*)&val)+2);    // = [2]
    buf[ 2 ]=*(((uint8*)&val)+1);    // = [1]
    buf[ 3 ]=*(((uint8*)&val)+0);    // = [0]
    return *(int32*)buf;
  }

  int16 VMP_ENDIAN16(int16 val)
  {
    uint8 buf[2];
    
    buf[ 0 ]=*(((uint8*)&val)+1);   // = [1]
    buf[ 1 ]=*(((uint8*)&val)+0);   // = [0]
    return *(int16*)buf;
  } 

The typecasting camouflages it a bit, but it is merely a byte read-write with inverse offsets. I will leave the actual endian implementation up to you! Just remember that it is preferable to have the tools handle your endian conversion so that a game application does not have to. And since tools exercise the same data over and over for the length of a project, you might as well make them as efficient as possible.

For cross-platform compatibility I refer to the following as a little pretzel logic. It looks a little twisted, but if you dig a little deeper it becomes what it is — slicker 'n snail snot!

  #ifdef VMP_LITTLE_ENDIAN   // Little-endian processor

           // Big-endian data on little-endian processor
       #define VMP_BIG_ENDIAN32      VMP_ENDIAN32
       #define VMP_BIG_ENDIAN16      VMP_ENDIAN16

          //  Little-endian data on little-endian processor
       #define VMP_LITTLE_ENDIAN32                    // stub
       #define VMP_LITTLE_ENDIAN16                    // stub

  #endif

Note that same endian to same endian assignment merely stubs out the macro, so no conversion is needed or implemented. One only needs to know what byte order the data is in and what order is needed, and use the appropriate macro. It will then be cross-platform compatible to all other platforms as long as the endian flag is set properly for that platform.

Neat, huh? No extra #ifdef cluttering up the code!

BSWAP destination

This general-purpose instruction does a big/little-endian conversion. It reverses the byte order of a 32-bit or 64-bit register.

    bswap eax

This is used in the conversion of communications messages from big-endian platforms such as Unix or Macintosh, or file formats such as TIFF, MIDI, etc.

The C code equivalent is slow, especially when compared to the speed of a BSWAP instruction. I normally do not believe in in-line assembly as it makes code less portable to other platforms, but here is one of my rare exceptions. Note that compiling C with optimization set for speed should truly embed the Endian32 function into your code like a macro.

  int32 VMP_ENDIAN32(int32 val)
  {
      _asm {
          mov     eax,val
          bswap   eax
          mov val,eax
        };

      return val;
  }

For those of you working with an embedded 8086...80386 processor, a 16-bit endian conversion can be accomplished with a ROR, which would have the same effect as an XCHG; however, it is more efficient depending on the processor manufacturer and model.

When using that same technique for 32-bit endian conversion, it should be noted that the ROR will cause a stall performing an operation with the EAX register after the write to the AX. So use the BSWAP on the Pentiums!

bswap

 ror  ax,8
ror eax,16
 ror  ax,8

mov     eax,[ebx+4]     ; Bits 32...63
mov     edx,[ebx+0]     ; Bits 0...31
bswap   eax             ; Upper bits
bswap   edx             ; Lower bits
ret                     ; edx:eax

bswap   rax             ; Convert all 8 bytes.

pswapd destination, source (2×32-bit) (2×SPFP)

    pswapd mm0,mm1

If this functionality is needed, it can be emulated with the following:

    movq        mm0,mm1      ; y x
    punpckldq   mm1,mm1      ; x x
    punpckhdq   mm0,mm1      ; x y

punpcklbw destination, source (8×8-bit) (16×8-bit)

   punpcklbw mm0,mm1
   punpcklbw xmm0,xmm1

This is one of the more popular instructions as it is extremely useful in the expansion of an unsigned data value. By interlacing a value of zero with an actual value, an 8-bit value is expanded to 16 bits.

  A = 0x00000000   B = 0x44332211

    D = 00 44  00  33 00  22 00  11
         0044   0033   0022   0011

  punpcklbw mm0,mm0 ;     {w w z z y y x x} ← {u t s r w z y x}

punpckhbw destination, source (8×8-bit) (16×8-bit)

  punpckhbw mm0,mm1
  punpckhbw xmm0,xmm1

fooa    qword 0ffffa5a55a5a0000h
foob    qword 08000003f007f00ffh

         movq      mm7,fooa
         movq      mm6,foob
         punpckhbw mm7,mm6

; 80 00 00 3f 00 7f 00 ff  ff ff a5 a5 5a 5a 00 00
;                  became
;  80 ff 00 ff 00 a5 3f a5

  punpckhbw  mm0,mm0 ;  {u u t t s s r r}   ←   {u t s r w z y x}

punpcklwd destination, source (4×16-bit) (8×16-bit)

  punpcklwd mm0,mm1
  punpcklwd xmm0,xmm1

fooa    qword 0ffffa5a55a5a0000h
foob    qword 08000003f007f00ffh

         movq      mm7,fooa
         movq      mm6,foob
         punpcklwd mm7,mm6

; 8000 003f 007f 00ff   ffff a5a5 5a5a 0000
;                  became
; 007f 5a5a 00ff 0000

 punpcklwd  xmm0,xmm0  ; {w w z z y y x x}   ←  {u t s r w z y x}

punpckhwd destination, source (4×16-bit) (8×16-bit)

   punpckhwd mm0,mm1
   punpckhwd xmm0,xmm1

   punpckhwd  xmm0,xmm0 ; {u u t t s s r r} ← {u t s r w z y x}

movss destination, source

This SSE instruction copies the least significant single-precision floating-point scalar value from 32-bit memory aSrc and copies it to destination Dst. Source and destination can be XMM register, XMM to 32-bit memory, or 32-bit memory to XMM scalar copy.

movq2dq destination, source

This SSE instruction copies the least significant 32-bit unsigned scalar value from MMX or 32-bit memory aSrc and copies it to XMM destination Dst. Other elements remain unchanged.

movdq2q destination, source

This SSE instruction copies the least significant 32-bit unsigned scalar value from XMM or 32-bit memory aSrc to the least significant 32-bit element of the MMX destination Dst. The other element of Dst remains unchanged.

movlps destination, source

This SSE instruction copies the two least significant single-precision floating-point values from XMM source register or 32-bit memory aSrc to the two least significant single-precision floating-point elements of the XMM destination Dst. The other elements of Dst remain unchanged.

movhps destination, source

When the source is memory, this SSE instruction copies the two single-precision floating-point values from 64-bit memory aSrc and copies them to the two most significant single-precision floating-point elements within an XMM register specified by Dst. When aSrc is an XMM register, the two most significant single-precision floating-point values are copied to 64-bit memory Dst.

movlhps destination, source

This SSE instruction copies the two least significant single-precision floating-point values from XMM source register aSrc to the two most significant single-precision floating-point elements of the XMM register destination Dst. The other elements of Dst remain unchanged.

   movlhps  xmm0,xmm0  ; {y x y x} ← {w z y x}

movhlps destination, source

This SSE instruction copies the two most significant single-precision floating-point values from the XMM register aSrc to the two least significant single-precision floating-point elements of destination XMM register Dst. The other elements of Dst remain unchanged.

   movhlps  xmm0,xmm0  ; {w z w z}  ←  {w z y x}

movsd destination, source

When the source is memory, this SSE2 instruction copies the double-precision floating-point value from 64-bit memory aSrc and copies it to the least significant double-precision floating-point element of the XMM destination register specified by Dst. The upper double-precision floating-point value is unchanged. When aSrc is an XMM register, the lower double-precision floating-point value is copied to 64-bit memory.

movlpd destination, source

The MOVLPD instruction copies the double-precision floating-point value from 64-bit memory aSrc to the lower 64 bits of the XMM register or from the lower 64 bits of the XMM register to 64-bit memory. The upper double-precision floating-point value in the XMM register is unchanged when the destination is the XMM register.

movhpd destination, source

The MOVHPD instruction copies the double-precision floating-point value from 64-bit memory aSrc to the upper 64 bits of the XMM register or from the upper 64 bits of the XMM register to 64-bit memory. The upper double-precision floating-point value in the XMM register is unchanged when the destination is the XMM register.

pinsrw destination, source, #

For 64-bit data there exist four output elements and so an immediate value of 0...3; thus two bits are needed to identify which element is the destination. The two least significant bits of the index are masked to only allow a selectable value of 0...3. With 128-bit data there exist eight output elements and therefore a value of 0...7; thus three bits are used to select the destination.

   pinsrw mm0,eax,01b ; 1 {3...0}

The lower 16 bits of the general-purpose register are assigned to one of the four destination 16-bit values selected by the index.

pshufw destination, source, #

The immediate value indicates which source index is mapped to each of the destination elements. The immediate value is a single 8-bit byte; with four possible source elements needing two bits each, that leaves a maximum of four remappable elements. There are 4×4×4×4 = 4⁴= 256 possible patterns.

   pshufw mm0,mm1,10000111b ; 2 0 1 3

pshuflw destination, source, #

The immediate value indicates which source index is mapped to each of the destination elements. The immediate value is a single 8-bit byte; with four possible source elements needing two bits each, that leaves a maximum of four remappable elements. This is similar in functionality to PSHUFW; the lower four 16-bit elements are remappable but the upper four elements are straight mappings and thus a direct copy.

   pshuflw xmm0,xmm1,01001110b ; 1 0 3 2

pshufhw destination, source, #

The immediate value indicates which source index is mapped to each of the destination elements. The immediate value is a single 8-bit byte, and with four possible source elements needing two bits each, that leaves a maximum of four remappable elements. This is similar in functionality to PSHUFW; the upper four 16-bit elements are remappable but the lower four elements are straight mappings and thus a direct copy.

   pshufhw xmm0,xmm1,11000110b ; 3 0 1 2

pshufd destination, source, #

   pshufd xmm0,xmm1,01001110b ; 1 0 3 2

The immediate value indicates which source index is mapped to each of the destination elements. The immediate value is a single 8-bit byte, and with four possible source elements needing two bits each, that leaves a maximum of four remappable elements.

shufps destination, source, #

The immediate value is split between where the two lowest elements are selectable from the destination and the two highest elements of the destination are selectable from the source. The immediate value is a single 8-bit byte; with four possible source elements needing two bits each, that leaves a maximum of four remappable elements.

   shufps xmm0,xmm1,11100100b ; 3 2 1 0    {3...0}

movsldup destination, source

The even single-precision floating-point elements from the source are replicated so element #0 is copied to the two lower destination elements and the source element #2 is copied to the upper two destination elements.

movshdup destination, source

The odd single-precision floating-point elements from the source are replicated so element #1 is copied to the two lower destination elements and the source element #3 is copied to the upper two destination elements.

movddup destination, source

The lower double-precision floating-point element from the source is replicated and copied to the lower and upper double-precision floating-point elements.

shufpd destination, source, #

  shufpd xmm0,xmm1,01b ; 0 1   {1...0}

Four possibilities: {x x} {x y} {y x} {y y} ← {y x}

The CBW general-purpose instruction converts the (7+1)-bit signed value in the AL register to a (15+1)-bit signed value in the AX register.

The CWDE general-purpose instruction converts the (15+1)-bit signed value in the AX register to the (31+1)-bit signed value in the EAX register.

The CDQE general-purpose instruction converts the (31+1)-bit signed value in the EAX register to the (63+1)-bit signed value in the RAX register.

Conversion of signed 8-bit to 16-bit

To convert a signed value of [-128...0...127] to a 16-bit value. This only works with the AL to AX register, and is most efficient if the data value originated in the AL; if not, then the MOVSX is best.

cbw

movsx
eax,al

movsx
ax,al

ror eax,8
sar eax,24

ror ax,8
sar ax,8

Conversion of signed 16-bit to 32-bit

To convert a signed value of [-32768...0...32767] to a 32-bit value.

 cwde

 movsx eax,ax

 shl eax,16
sar eax,16

 ror eax,16
sar eax,16

MOVSX destination, source

These general-purpose instructions are very similar to CBW and CWDE except that they are a lot more versatile in which other registers can be sign extended to the same or a different register instead of just the AL or AX. A (7+1)-bit signed value can be converted to a (15+1)-bit or (31+1)-bit signed value. A (15+1)-bit signed value is converted into a (31+1)-bit signed value.

Conversion of signed 8-bit to 16-bit

To convert a signed value of [-128...0...127] to a 16-bit value. If working with AX,AL then use the CBW instruction as it is more efficient. I recommend using 32-bit form, as it is the best.

movsx ax,bl

movsx eax,bl

mov eax,ebx
shl eax,24
sar eax,24

mov ax,bx
shl ax,8
sar ax,8

Conversion of signed 8-bit to 32-bit

movsx eax,bl

mov eax,ebx
shl eax,24
sar eax,24

mov al,bl
(stall)
shl eax,24
sar eax,24

Conversion of signed 16-bit to 32-bit

movsx eax,bx

mov eax,ebx
shl eax,16
sar eax,16

mov ax,bx
(stall)
shl eax,16
sar eax,16

MOVZX destination, source

This instruction converts an unsigned value into a larger unsigned value. An 8-bit unsigned value can be converted to a 16-bit or 32-bit unsigned value. A 16-bit unsigned value is converted into a 32-bit unsigned value.

Conversion of same unsigned 8- to 16-bit register (no move)

To convert an unsigned number (0...255) to a 16-bit.

 movzx ax,al

 movzx eax,al

 and ax,00ffh

 and eax,000ffh

Conversion of same unsigned 8- to 32-bit register (no move)

To convert an unsigned number (0...255) to a 32-bit.

 movzx eax,al

 and eax,000ffh

Conversion of unsigned 8-bit to 16-bit

To convert an unsigned value of (0...255) to a 16-bit value. I recommend using the 8- to 32-bit form.

 movzx ax,bl

 xor ax,ax
  mov al,bl

 sub ax,ax
  mov al,bl

 mov ax,bx
  and ax,0ffh

Conversion of unsigned 8-bit to 32-bit

 movzx eax,bl

xor eax,eax
 mov al,bl

sub eax,eax
 mov al,bl

 mov eax,ebx
  and eax,0ffh

Conversion of unsigned 16-bit to 32-bit

 movzx eax,bx

xor eax,eax
 mov ax,bx

 mov eax,ebx
  and eax,0ffffh

The general-purpose CWD, CDQ, and CQO instructions are typically used for preparation of a number before a division. The integer division requires:

AX or DX:AX or EDX:EAX or RDX:RAX

You would get the same result by multiplying two numbers together.

cwd

mov edx,eax
 sar dx,16

mov dx,ax
 sar dx,16

 cdq

 mov edx,eax
sar edx,31
  sar edx,1

pextrw destination, source, #

   pextrw eax,mm1,00b ; {3...0}

One of the four 16-bit values is assigned to the lower 16 bits of the general-purpose register and zero extended into the upper 16 bits for the 32-bit register, or 48 bits for the 64-bit register.

One of the eight 16-bit values is assigned to the lower 16 bits of the general-purpose register and zero extended into the upper 16 bits for the 32-bit register, or 48 bits for the 64-bit register.

packsswb destination, source

   packsswb mm0,mm1
   packsswb xmm0,xmm1

This instruction takes a word value in the range {-32768 ... 32767} and saturates it to a signed 8-bit range of {-128...127}.

 fooa   qword 0ffffa5a55a5a0000h
 foob   qword 08000003f007f00ffh

         movq       mm7,fooa
         movq       mm6,foob
         packsswb   mm7,mm6

 ; 8000 003f 007f 00ff    ffff a5a5 5a5a 0000
 ;                   became
 ;  80   3f   7f   7f      ff   80   7f   00

packuswb destination, source

   packuswb mm0,mm1

This instruction uses the same diagram as the 64-bit form of the PACKSSWB instruction but saturates an unsigned word with a range of {-32768...32767} to an unsigned 8-bit range of {0...255}.

   packuswb xmm0,xmm1

The following instruction uses the same diagram as the 128-bit form of the PACKSSWB instruction but saturates an unsigned word with a range of {-32768...32767} to an unsigned 8-bit range of {0...255}.

 fooa     qword 0ffffa5a55a5a0000h
 foob     qword 08000003f007f00ffh

           movq      mm7,fooa
           movq      mm6,foob
           packuswb  mm7,mm6

  ; 8000 003f 007f 00ff    ffff a5a5 5a5a 0000
  ;                  became
  ;  00   3f   7f   ff      00   00   ff   00

packssdw destination, source

   packssdw mm0,mm1
   packssdw xmm0,xmm1

This instruction takes a 32-bit signed value in the range {-2147483648 ... 2147483647} and saturates it to a signed 16-bit range of {-32768... 32767}.

 fooa    qword 0ffffa5a55a5a0000h
 foob    qword 08000003f007f00ffh

          movq     mm7,fooa
          movq     mm6,foob
          packssdw mm7,mm6

 ; 8000003f 007f00ff  ffffa5a5 5a5a0000
 ;               became
 ;   8000   7fff      a5a5       7fff

This instruction converts even packed signed 16-bit values into packed single-precision floating-point values and stores the result in the destination mmxDst.

This instruction converts a packed 32-bit signed integer from source xmm to xmm single-precision floating-point destination.

This converts a packed single-precision floating-point source xmm to xmm 32-bit signed destination.

This converts a packed single-precision floating-point with truncation source xmm to xmm 32-bit signed destination.

This instruction converts packed signed 32-bit values into packed single-precision floating-point values and stores the result in the destination MMX register mmxDst.