A
- Abacus
- Abrupt switching
- Activation barrier between stable states
- Actuation
- Adhesion force
- Alkanethiol
- All spin logic (ASL)
- cascadable circuit, layout for
- device
- graphene
- SET switching kinetics
- SET time
- switch, schematics of
- Alternative circuit design techniques
- and architectures
- cellular automata (CA)
- nonBoolean computing
- threshold logic
- ALU. See Arithmetic logic units (ALU)
- Ambipolar transport
- Amorphous carbon
- Amorphous phase
- AND/OR gate
- Applications
- Architectures, alternate
- Area efficiency
- Arithmetic logic units (ALU)
- Armchair
- ASL. See All spin logic (ASL)
- Associative memory
- definition
- hierarchical model
- unit
- Atomic switch
- electrochemical reaction
- gapless-type
- gap-type
- inert electrode
- learning ability
- memristor
- metal filament
- nonvolatile
- photo-sensing ability
- reversible electrode
- synapse
- Attractor
C
- CA. See Cellular automata (CA)
- Canonical model
- Capacity, minimum world capacity to process bitts
- Capacity problem
- Carbon allotropes
- Carbon-based memory
- Carbon nanotubes
- contacts to
- dielectric coating on
- electronic structure of
- electron transport in
- placement of
- purification of
- transistor
- ambipolar transport of
- dielectrics in
- gate structure of
- operation of
- passivation of
- scaling of
- CBRAM. See Conductive bridge random access memory (CBRAM)
- CDMA signals, mobile phones
- Cellular automata (CA)
- architectures
- fine-grained
- two-dimensional grid
- Cellular automata architectures
- Chalcogenides
- Charge-based memory, essential physics of
- Charge confinement
- Charge storage layer
- Charge trapping
- Clock-free
- CMIS. See Current-induced magnetization switching (CMIS)
- CMOS technologies. See Complementary metal oxide semiconductor (CMOS) technologies
- CoFeB free layer
- Cognition
- Complementary logic
- Complementary metal oxide semiconductor (CMOS) technologies
- architectural compatibility
- beyond
- CMOS chip, structural composition
- dmensional scaling, functional scaling,xx
- inverter
- input–output characteristics
- nanotransistors
- quantitative logic benchmarking
- architectural requirements
- observations/perspectives
- quantitative results
- survey-based critical assessment
- emerging research logic technologies
- emerging research memory technologies
- ERD survey, observations/perspectives based
- methodology
- overall technology requirements
- switches
- technological compatibility
- transistors
- Complementary resistive switch (CRS)
- Computational information variable
- Computer metaphor
- Concepts, Novel and speculative
- Conducting polymer
- Conductive bridge random access memory (CBRAM)
- Contact length
- Contact resistance
- Cost per transistor
- Coulomb blockade
- Crossbar array
- CrossNets
- CRS. See Complementary resistive switch (CRS)
- Crystalline phase
- Current-induced magnetization switching (CMIS)
- Cutoff frequency
D
- Damping
- Data representation layer
- Datta–Das spin transistor
- Degree of match
- Delay
- Diamond-like carbon
- Digital integrated circuits
- Diode
- Directionality
- Distance metric
- DNA
- Donor-acceptor polymer
- Double bond
- 3D PCM
- DRAM. See Dynamic random access memory (DRAM)
- Dresselhaus spin–orbit interaction
- D’yakonov–Perel’ mechanism
- Dynamic random access memory (DRAM)
- access time
- capacitor insulator
- energetics
- energy–space–time compromise
- limiting factor of
- memory cell, energy required to create/maintain
- resistances and capacitances
- scaling and performance projections
- schematic electrical diagram
- space–action function
E
- ECM cells. See Electrochemical metallization memory (ECM) cells
- Economies, global and U. S., impact of integrated circuit chip
- Elasto-static energies
- Electrical breakdown
- Electric field
- Electrochemical metallization bridge (EMB)
- Electrochemical metallization memory (ECM) cells
- AgI-based cells
- Cu/SiO2/Pt cells
- equivalent circuit model
- modeling
- physical switching mechanism
- electroforming/SET process
- RESET mechanism
- typical quasi-static I-V characteristic
- Electrochemistry
- Electroforming
- Electromigrated break junction
- Electron escape frequency
- Electronic devices
- Electronic synapse
- Electron transfer reaction
- Electron tunnel transport
- Electro-optical modulator
- semiconductor electron wave analog of
- Elliott–Yafet relaxation
- EMB. See Electrochemical metallization bridge (EMB)
- Emerging devices
- Emerging research device (ERD)
- editorial team–7
- group
- tracked technologies
- alternative information processing devices
- charge-based nonconventional beyond CMOS–nonFET devices
- memory devices
- nonclassical CMOS
- retrospective assessment
- Emerging research materials
- Endurance
- Energy
- angle of magnetization
- dissipation
- efficiency
- transfer interactions
- ERD. See Emerging research device (ERD)
- Extended CMOS
F
- Fan-out
- FD SOI transistor
- FeFET. See Ferroelectric field effect transistor (FeFET)
- Fe-NAND. See Ferroelectric NAND (Fe-NAND)
- FEP. See Front end processes (FEP)
- FeRAM. See Ferroelectric random access memory (FeRAM)
- Ferroelectric field effect transistor (FeFET)
- Ferroelectric memory
- Ferroelectric NAND (Fe-NAND)
- Ferroelectric polymers
- Ferroelectric random access memory (FeRAM)
- Ferroelectric size effect
- Ferroelectric tunnel junction (FTJ)
- FET. See Field effect transistor (FET)
- FIB irradiation
- Field effect transistor (FET)
- barrier
- carbon nanotube (CNT)
- FinFET
- Ge FET
- III-V FET
- molecular
- Mott transistor (Mott FET)
- negative capacitance FET
- spin-FETs
- spin transistor
- tri-gate
- tunnel
- Filamentary conduction
- Filamentation
- FinFET
- Finite element (FEM) simulations
- Flash memories
- cell
- energetics of
- energy barrier shapes
- floating gate memory
- Fowler–Nordheim tunneling mode
- insulator material parameters
- nonvolatile electron charge-based memory
- read operation
- scaling and performance projections
- store
- write operation
- Flexible electronics
- Floating gate memory
- Fourier transforms
- Fowler-Nordheim (F-N)
- tunneling mode
- tunneling regime
- Free volume
- Front end processes (FEP)
- FTJ. See Ferroelectric tunnel junction (FTJ)
- Fuchs–Sondheimer approximation
- Fuchs–Sondheimer theory
- Fullerenes
H
- Halg
- Hanle effect
- Hard disk drives (HDD)
- HDD. See Hard disk drives (HDD)
- Heat transfer resistance
- High resistive state (HRS)
- H2Pc molecules, topographic image
- HRS. See High resistive state (HRS)
- Hybridization of orbitals
- Hybrid spintronics
- Hysteresis
I
- IC. See Integrated circuit (IC)
- ICT. See Information and communication technologies (ICT)
- IETS. See Inelastic electron tunneling spectroscopy (IETS)
- III-V FET
- Image database
- I-MOS. See Impact-ionization MOS (I-MOS)
- Impact-ionization MOS (I-MOS)
- InAs heterostructure
- Inelastic electron tunneling spectroscopy (IETS)
- Information
- Information abstraction
- Information and communication technologies (ICT)
- Information processing,xx
- iNML AF-line, bit definition
- iNML-based design
- iNML devices
- clocking zones
- metastable (MS) state
- schematic
- size
- iNML ensemble, with multiple clock lines
- iNML realization
- Input-output isolation
- Insulator material parameters
- Integrated circuit (IC)
- Intelligent sensors
- Intel® CoreTM i3-530 Processor
- Interfacial oxide
- Interfacial PCM
- International Roadmap Committee
- International Technology Roadmap for Semiconductors (ITRS)
- International Technology Working Group (ITWG)
- Inverter, input-output characteristics of
- Ionic transport
J
- Joint Electron Device Engineering Council (JEDEC) standards
K
- Kapitza resistance
- K-means clustering
- Kondo
- Kroemer, Herbert
M
- Macromolecular memory
- Macromolecules
- Magnèli phase
- Magnetic anisotropy
- Magnetic coupling
- Magnetic logic circuits
- all spin logic (ASL)
- current status and perspectives
- hybrid spintronics/straintronics devices
- nanomagnet logic (NML)
- spin torque devices (STD)
- spin wave devices (SWD)
- Magnetic quantum-dot cellular automata (MQCA) devices
- Magnetic random access memory
- Magnetic tunneling junction (MTJ)
- energy barrier
- MgO tunnel barrier
- operation of
- orthogonal
- schematic of
- speed, switching
- stability, thermal
- switch based
- W–R unit
- with electrical isolation
- Magneto-electric cell (ME cell)
- Magnetoresistance
- Magnetostrictive material (Ni)
- MAJ gate
- Maximum frequency of oscillation
- ME cell. See Magneto-electric cell (ME cell)
- Mechanical computing
- Mechanical relays
- Memory architecture
- Memory array interconnects
- Fuchs–Sondheimer approximation
- parameters for scaling analysis
- resistances and capacitances
- Memory technologies. See also Dynamic random access memory (DRAM)
- Memristive effects in macromolecular materials
- MEMS switch. See Micro-electro-mechanical systems (MEMS) switch
- Merging memory architecture
- Metal ferroelectric insulator semiconductor (MFIS)
- Metal halide
- Metal-isolator-metal (MIM)
- stack
- structures, electronic conduction processes
- Metal oxide semiconductor field-effect transistor (MOSFET)
- metal-oxide-semiconductorfield-effect-transistor,- -
- switch
- MFIS. See Metal ferroelectric insulator semiconductor (MFIS)
- Micro and nano-electromechanical systems (M/NEMS)
- Micro-electro-mechanical systems (MEMS) switch
- MIEC. See Mixed ionic electronic conduction (MIEC)
- MIM. See Metal-isolator-metal (MIM)
- Mixed ionic electronic conduction (MIEC)
- M/NEMS. See Micro and nano-electromechanical systems (M/NEMS)
- Mobility
- Modulate
- Molecular FET
- Molecular memory
- Molecular transistor
- Molecular transport
- Moores law
- More Than Moore
- Morphic architectures
- MOSFET. See Metal oxide semiconductor field-effect transistor (MOSFET)
- Mott FET. See Mott field effect transistor (Mott FET)
- Mott field effect transistor (Mott FET)
- Mott–Gurney law
- Mott memory
- Mott RAM
- Mott transistor (Mott FET)
- MQCA devices. See Magnetic quantum-dot cellular automata (MQCA) devices
- MTJ. See Magnetic tunneling junction (MTJ)
- Multiferroic nanomagnet, magnetostrictive layer
- Multi-layer pNML circuits
- Multi-level cell
- Multi-state logic
- Mushroom cell
N
- NAND flash
- NAND gate
- NAND2 gate, area-energy-delay characteristics of
- Nano-electro-mechanical systems (NEMS)
- high cycle
- intermediate cycle
- low cycle
- Nanoelectronics
- Nanoelectronics Research Initiative (NRI)
- Nanomagnet logic (NML)
- challenge
- efficient interconnect
- error tolerance
- circuit design
- achieving bi-directional dataflow
- architecture overview
- Boolean logic
- data races
- less complex signal routing
- pipeline depth
- pNML implementation
- systolic architectures implementations
- systolic arrays
- circuit, logic functionality
- domain-wall logic hybrids
- hardware
- information processing architectures
- iNML device schematic
- in-plane device architecture
- MAJ gate
- out-of-plane device architecture
- paths forward
- retrospective, experimental progress to date
- Nanoscale thermal management
- Nanoswitch
- Nanowire
- National Science Foundation (NSF)
- National technology roadmap for semiconductors (NTRS)
- Negative capacitance FET
- NEMS. See Nano-electro-mechanical systems (NEMS)
- Neumann architectures
- Neural systems
- noise tolerance
- noise utilization
- Neuromorphic architectures
- applications and development
- chips
- ITRS 2007
- machine vs. environmental complexity
- noise-driven neural processing
- noise tolerance/noise utilization
- single electron transistor (SET) neurons
- VLSI systems
- Neuromorphic computing
- Neurons
- NML. See Nanomagnet logic (NML)
- NM logic circuits
- NMOS transistor
- Noise-filtering CA
- NonBoolean information processing
- NonCMOS technology
- Nonlinearity
- Nonvolatile (NV) latch
- Nonvolatile memory (NVM) technology
- nonVon Neumann architectures
- NOR flash memory
- NOR gate
- Nonthermal equilibrium systems
- N-Tree model
- performance
- recognition process
- structure
- training process
- NTRS. See National technology roadmap for semiconductors (NTRS)
- Nucleation process
- NV latch. See Nonvolatile (NV) latch
- NVM technology. See Nonvolatile memory (NVM) technology
O
- Oda
- Off-state current
- On/off ratio (memory devices)
- On-off ratio
- ON/OFF transitions
- ON resistances
- On-state current
- Operational reliability
- Operational temperature
- Orbital gating
- Organic semiconductor
- Oscillators
- Oscillatory neural networks
P
- Page buffer
- Palm model
- Pass-gate logic
- Passivation
- Pattern conflict
- Pattern retrieval tests
- improved hierarchical model
- N-Tree model
- simple hierarchical model
- π-conjugated polymer
- PEDOT:PSS
- PEO. See Polyethylene oxide (PEO)
- 16 Permalloy nanomagnets
- scanning electron microscope (SEM) image
- Perpendicular magnetic anisotropy (PMA)
- Persistent spin helix (PSH)
- Perspectives
- Phase change
- memory
- random access memory (PCRAM)
- Phase-locked loop
- Phase transformations
- Piezoelectric (PZT)
- Planck's constant
- PMA. See Perpendicular magnetic anisotropy (PMA)
- PMOS transistor
- pNML
- architectures
- based hardware
- chip-level implementations, structures
- design
- devices
- for edge detection
- graphical representation
- on-chip clocks
- time evolution of
- dots, noise-filtering CA
- implementation
- schematic of integrated adder cell
- Polyacetylene
- Polyelectrolytes
- Polyethylene oxide (PEO)
- Polymers
- Polystyrene sulfonate
- Poole-Frenkel
- Potential well
- Power consumption
- Printable electronics
- Process integration
- Program/erase energies
- Programmable metallization memory cell (PMC)
- Programmed input, MFM images
- Pseudo-spin-MOSFET (PS-MOSFET)
- circuit configuration of
- numerical simulations
- PSH. See Persistent spin helix (PSH)
- Pulse-density modulation
- PZT. See Piezoelectric (PZT)
Q
- QCA. See Quantum-dot cellular automata (QCA)
- Quantum-dot cellular automata (QCA)
- architecture
- devices
- metal-dot implementations of
- Quantum mechanical tunneling
- Quantum resistance
R
- Radiation resistance
- Radio-frequency MEMS (RF MEMS)
- RAM. See Random access memories (RAM)
- Raman spectrum
- Random access memories (RAM)
- Rashba effect
- Rashba spin-orbit
- coupling effect
- interaction
- for spin polarization control
- RC-bounded minimum access time
- Read
- Reconfigurability
- Rectification
- Redox-based resistive memories (ReRAM)
- Arrhenius plot
- classification scheme
- ECM cells (See Electrochemical metallization memory (ECM) cells)
- and external CMOS
- Landauer conductance
- multi-bit properties
- performance of
- minimum cell area
- minimum feature size
- minimum switching time
- multilevel
- retention time
- write cycles
- physical fundamentals of
- circuit simulations, modeling redox memories for
- electronic conduction mechanisms
- empirical dynamical models
- generic physics-based dynamical models
- generic switching properties
- initial dynamical models
- ionic conduction mechanism
- quasi-static models
- switching kinetics
- VCM cells (See Valence change memory (VCM) cells)
- Reliability
- ReRAM. See Redox-based resistive memories (ReRAM)
- RESET switching kinetics
- Resistance drift
- Resistance random access memory (RRAM)
- Resistive switching
- Retention
- Ripple carry adder
- RRAM. See Resistance random access memory (RRAM)
T
- Talk
- Taxonomy, nanoelectronic devices
- Technology entries
- Technology scaling: impact and issues
- Temperature, maximum operating
- TFET. See Tunnel FET (TFET)
- Thermal boundary resistance
- Thermal conductivity
- Threshold field
- Threshold switch
- Token
- Transduction
- Transistor-like spin–magnet devices
- Transistor-like switch
- Transition state theory
- Transition voltage spectroscopy
- Trans-spinor
- Tri-gate FET
- Tunnel FET (TFET)
- Tunneling
- equations
- escape frequency
- gap, Faradays law
- Tunnelling magnetoresistance (TMR)
U
- Ultra-low-power
- Unipolar switching
V
- Valence change memory (VCM) cells
- active electrode (AE)
- dynamical models
- Ohmic electrode (OE)
- oxygen vacancies
- physical switching mechanism
- electroforming process
- SET/RESET mechanism
- SrTiO3, cross-section of
- TaOx-VCM model
- typical I-V characteristic of
- WOx-based VCM cells
- Vanadium oxide
- van der Waals energies
- Variability
- VCMA. See Voltage-controlled magnetic anisotropy (VCMA)
- VCM cells. See Valence change memory (VCM) cells
- Very large scale integration (VLSI)
- chips, built-in self-test (BIST)
- Vibrational modes
- VLSI. See Very large scale integration (VLSI)
- Vision and mission
- Volatile switch
- Voltage-controlled magnetic anisotropy (VCMA)
- Voltage-controlled spin switch
- von Neumann machines
- Boolean-based processing of
- more/less/beyond Neumann
- taxonomy, of information processing
Z
- Zeeman splitting energies
- Zigzag
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