Frank Schwierz
Technical University of Ilmenau, Germany
Over decades, semiconductor electronics, in particular IC (integrated circuit) technology, has evolved at an enormous pace and its annual growth has significantly exceeded that of other industries. Two major domains in current IC technology are More Moore and More Than Moore. Important trends in these domains are shown in Figure 15.1.
More Moore relates to digital logic that enjoyed an exponential growth of the number of transistors per chip, a continuous reduction of transistor size, and a steady increase of transistor switching speed coupled with a decrease in switching energy. The Si MOSFET (metal oxide–semiconductor field effect transistor) is the backbone of the dominating CMOS (complementary MOS) logic. In 2013, processors containing five billion MOSFETs with a gate length around 20 nm were in mass production.
More Than Moore, on the other hand, is not primarily focused on increasing circuit complexity but rather on enhancing the functionality by integrating digital logic together with nonlogic components such as high voltage modules, analog/RF (radio frequency) circuitry, sensors, actuators, and so on, on a chip. Today RF electronics is of key importance in the More Than Moore domain since many electronic systems use RF circuits to receive and transmit data. In particular wireless data transfer at increasing bit rates is gaining importance. Thus, More Than Moore needs fast transistors with excellent RF performance. Commonly two characteristic frequencies are used to assess the performance of RF transistors: (i) the cutoff frequency fT (the frequency where the small-signal current gain has dropped to unity) and (ii) the maximum frequency of oscillation fmax, where the power gain has declined to unity. In RF electronics, different FET classes, most notably III-V HEMTs (high electron mobility transistor) and Si MOSFETs, are used. As shown in Figure 15.1, fT and fmax of RF transistors could be enhanced continuously over decades. Currently the fastest RF FETs are InP HEMTs and GaAs mHEMTs (metamorphic HEMT) that both benefit from the high mobility in their InGaAs channels.
The impressive trends shown in Figure 15.1 indicate that so far Si MOSFETs and III-V HEMTs have done an excellent job. Thus the question arises if research on new electronic materials and novel transistor concepts is needed at all. The answer is definitely yes. First, MOSFET scaling is becoming more and more challenging and will come to an end in the foreseeable future. Second, in spite of significant efforts, RF transistors are still not available for operation in the THz gap (the frequency range between 0.3 and 3.0 THz that could be used for many exceedingly attractive applications). Note that a transistor with 1 THz fT and/or fmax is not fast enough for operation at 1 THz since at the operating frequency the transistor should provide a gain sufficiently higher than unity. The scaling and frequency limitations just mentioned have motivated intensive research on new material and transistor concepts.
When in 2004 two pioneering papers on the preparation of the purely two-dimensional carbon-based material graphene have been published [1,2], aspirations awakened that now a successor for the conventional semiconductors had been found that could pave the way to transistors with unprecedented performance and scaling capabilities. In particular the high mobilities observed in graphene – 10 000 cm2/Vs demonstrated already in 2004 [1] and more than 100 000 cm2/Vs reported later [3] – raised expectations that replacing Si by graphene could solve many problems in semiconductor electronics [4]. The community responded enthusiastically and by 2007 graphene had already found its place in the Emerging Research Devices chapter of the ITRS (International Technology Roadmap for Semiconductors) [5]. In the same year the first graphene MOSFET was demonstrated [6] and ever since many groups have become active in research on graphene transistors.
Now, only a few years later, we witness a dramatic change of mind [7–9]. The replacement of Si in logic transistors is taken off the agenda, graphene high-performance RF transistors are viewed with skepticism, and only the application of graphene transistors in some specific areas is considered promising. What is the reason for this abrupt change of the assessment of the prospects of graphene?
The early discussions on the potential of graphene in electronics almost solely focused on its outstanding mobility. Certainly a high mobility is always desirable. To be successful, however, an electronic material has to meet more requirements. A logic transistor needs two clearly distinguishable states, a highly conductive on-state and an off-state where the transistor blocks the current. For the latter, a sizeable bandgap is needed – at least in CMOS logic. RF FETs, on the other hand, should be operated in the regime of current saturation to unfold their full speed potential. To achieve satisfying saturation, again a bandgap is required. Since heat is generated in a FET that has to be removed, the channel material should show a good thermal conductivity and a small heat transfer resistance to the underlying substrate. Finally, a low contact resistance between the transistor terminals and the channel is needed. As will be shown in the next section, graphene meets only part of these requirements.
Recently several review papers were published on graphene as an electronic material and on graphene transistors, for example [10–17]. In the remainder of this chapter we will not repeat all details from [10–17] but rather emphasize relevant issues related to the requirements mentioned above, highlight the main trends in graphene transistor research, and identify promising applications for graphene transistors.
The existence of a bandgap is essential for electronic materials. Transistors for CMOS logic need a high on–off ratio Ion/Ioff in the range 104 to 4 × 107 depending on the type of logic (high performance, low power). Ion is the on-state current and is not directly related to the bandgap energy EG. The off-state current Ioff, on the other hand, strongly depends on EG according to Ioff exp −EG/(2kBT) [15] where kB is the Boltzmann constant and T is the temperature. Thus, the on–off ratio follows the proportionality
The minimum bandgap energy required to achieve the on–off ratios for logic is estimated as 360 to 500 meV [13,15,16]. For RF FETs, on the other hand, the on–off ratio is of minor importance. Here, a bandgap is needed to achieve drain current saturation. In particular for high RF power gain and high fmax, current saturation is inevitable [17]. It is not exactly known how wide the bandgap for a good RF FET should be. Most likely, the requirements are less stringent than for logic transistors and a narrow bandgap could already help.
Large-area graphene is gapless and behaves like a semi-metal. Its bandstructure shows cone-shaped conduction and valence bands that touch each other at certain points of the Brillouin zone. Thus, large-area gapless graphene is not useful for CMOS logic and problematic for RF. This does not automatically mean that graphene is useless for electronics since a bandgap can be opened in several ways, for example by
Figure 15.2 shows the simulated and measured bandgap energies of GNRs as a function of ribbon width and indicates a pronounced dependence of the bandgap energy on the width. Interestingly the qualitative trends and the actual numbers of the experimental bandgaps differ significantly from the simulated ones. According to theory, the bandgap energy critically depends on the GNR edge configuration (armchair or zigzag). If armchair GNRs are separated into three groups according to the number of carbon atoms along their width (3p, 3p + 1, 3p + 2, where p is an integer), the bandgap energies follow the order and the bandgap energy of the GNRs of each of the three groups as well as that of zigzag GNRs increases with decreasing width due to quantum confinement.
The trend of the experimental bandgap energy is qualitatively different. Down to a width of about 15 nm, the upper limit of the measured bandgaps can be fitted by
where a = 1.78, b = −11.7, and c = 1.4 are fitting parameters, wGNR is the ribbon width in nm, and EG is the bandgap energy in eV. Below 15 nm, the experimental bandgaps scatter and do not show a clear trend. Thus, GNRs with widths below 15–20 nm fulfill the minimum bandgap requirement for logic transistors.
The reason for the difference between theory and experiment is that in reality patterned GNRs never possess well-defined edge geometries as assumed in the calculations. Instead, their edges are disordered and their width varies along their length. Moreover, it has been suggested that, in addition to pure lateral confinement [18], other effects (most notably Coulomb blockade [25]) contribute to the formation of a bandgap in GNRs.
By applying a perpendicular field to BLG, a bandgap can be opened as well. It has been shown that under high fields, bandgap energies of up to 250 meV can be achieved [10,21]. This would at least come close to the bandgap energy required for CMOS logic transistors. The bandgaps observed in experimental BLG MOSFETs, however, are limited to about 130 meV so far [26–28], which is too small for CMOS but may be sufficient for RF transistors.
Most frequently the mobility is used as a measure for carrier transport. It indicates how fast an average carrier moves under the influence of an electric field. Although it is argued occasionally that in nanometer FETs the mobility is no longer appropriate for assessing carrier transport, experiences show that it is very important even at the FET scaling limit. This is why significant efforts are spent on introducing high-mobility channel materials into nanometer CMOS technology. Strained Si with enhanced mobilities is already implemented into mass production [29] and research on high-mobility Ge and III-V channels for future MOSFET generations is pushed forward [30,31].
It is known that the electron mobility of semiconductors follows the general trend of decreasing mobilities for increasing bandgap energy, see, for example, Figure 8 in [17], and this is true for graphene as well. While the record mobilities of exfoliated gapless graphene clearly exceed those of the high-mobility III-V compounds InSb and InAs, opening a bandgap in GNRs and BLG modifies the bandstructure, increases the effective mass, and leads to a dramatic reduction of the mobility [32–34]. Figure 15.3 shows simulated and measured GNR mobilities as a function of ribbon width (note the good agreement between simulation and experiment). Currently the highest experimental GNR mobility is 2500 cm2/Vs, reported for a 20-nm wide ribbon [35]. This is much less compared to the mobilities of more than 10 000 cm2/Vs in the InGaAs channels of InP HEMTs and GaAs mHEMTs. However, regarding the mobility an additional aspect should be kept in mind. For CMOS both n- and p-channel MOSFETs are needed. Since GNRs and BLG possess symmetric conduction and valence bands, nearly identical effective masses and quite similar mobilities for electrons and holes can be expected. This is certainly desirable and much different from the conventional semiconductors, in particular the III-V materials, where the hole mobility is significantly smaller than the electron mobility.
Graphene is an excellent heat conductor with a room temperature thermal conductivity of 30–50 W/(cmK) which is much higher than that of conventional semiconductors, for example, 1.3 W/(cmK) for Si and 0.5 W/(cmK) for GaAs. A material's heat conductivity, however, does not tell the whole story of heat transport. If a transistor is located on a substrate different from the channel material, the heat generated in the transistor has to cross the channel–substrate interface that acts as a heat transfer resistance frequently called Kapitza resistance. The room-temperature Kapitza resistance of exfoliated graphene on a SiO2/Si substrate has been measured as (5.6–12) × 10−9 m2 K/W [39] and for epitaxial graphene on SiC a Kapitza resistance of 36 × 10−9 m2 K/W has been simulated [40]. This is more than ten times as large as the Kapitza resistance of Si-SiO2 interfaces of modern silicon on insulator structures (0.5 × 10−9 m2 K/W [41]).
Early graphene transistors suffered from extraordinary large contact resistances between the metallic source/drain contacts and the underlying graphene channel in the range of 250–1000 Ωμm. Meanwhile the metal–graphene contact resistance could be reduced significantly and the lowest reported values are now within the typical range of the contact resistances of state of the art Si MOSFETs and III-V HEMTs. The best graphene MOSFETs show contact resistances of 100–120 Ωμm [42,43] compared to 20–150 Ωμm for III-V HEMTs and 80–400 Ωμm for Si MOSFETs. However, further improvements of the graphene contact resistance highly desirable.
In its early days, the GNR MOSFET has been considered as a viable candidate for replacing the Si MOSFET in future digital logic. The device has been introduced to the Emerging Research Devices chapter of the ITRS in 2007 and at about that time the first theoretical studies on the performance of GNR MOSFETs have been published. While high on–off ratios of 107 have been predicted for ideal GNR MOSFETs assuming ballistic transport [44], it has also been shown that edge disorder seriously degrades the performance of GNR MOSFETs [45]. In contrast to the wide body of simulation studies published since 2007, the number of papers on experimental GNR MOSFETs is rather limited. Back-gate nanoribbon transistors with ribbon widths between 2 and 5 nm and on–off ratios exceeding 106 [23,46] as well as top-gate GNR MOSFETs with lower on–off ratios [47] have been reported. There has been some limited activity on BLG MOSFETs but the achieved on–off ratios of 100 [27,28] at maximum are not sufficient for logic. The lack of more extensive experimental work on GNR and BLG MOSFETs is likely to be related to the processing issues and the edge problems of narrow GNRs and the limited bandgap opening in BLG, which have discouraged researchers to enhance the efforts on GNR and BLG MOSFETs.
The problems of GNR and BLG MOSFETs and the fact that RF FETs do not need to switch off have led to the situation that recently graphene logic MOSFETs receded into the background and more attention has been paid to graphene RF MOSFETs with gapless channels. Many groups have successfully demonstrated gapless graphene MOSFETs with GHz capabilities. On the other hand, reports on experimental RF graphene MOSFETs with semiconducting channels, that is, RF GNR and BLG MOSFETs, are still missing. Figure 15.4 shows the fT and fmax performance of the best RF graphene MOSFETs, together with the corresponding data for three competing classes of RF FETs. The first class comprises InP HEMTs and GaAs mHEMTs having InxGa1–xAs channels with In contents x of 0.57–1.0, class two is constituted from GaAs pHEMTs (pseudomorphic HEMT) having InGaAs channels with a lower In content of 0.15–0.2, and the third class comprises RF Si MOSFETs. Obviously, in terms of fT graphene MOSFETs rival successfully with InP HEMTs and GaAs mHEMTs (which are the fastest RF FETs at all) down to about 100 nm gate length and are much faster than Si MOSFETs and GaAs pHEMTs with comparable gate length [48–55].
Unfortunately, the situation is much different for the maximum frequency of oscillation fmax. So far, the best fmax data for graphene MOSFETs is below 100 GHz compared to several hundreds of GHz for the competing RF FET classes. This represents a serious limitation since for most RF applications fmax is more important than fT and transistors with high fT but low fmax are only of limited use. It has been shown that the disappointing fmax performance of graphene MOSFETs is mainly caused by the poor drain current saturation in gapless graphene channels [17], most likely combined with too large series and gate resistances. The unsatisfying drain current saturation, in turn, has its origin in the missing bandgap of the channel. This brings us to the conclusion that a semiconducting channel is needed not only for logic MOSFETs but for RF MOSFETs as well. Table 15.1 summarizes the state of the art of RF graphene MOSFETs and of the competing RF FETs.
Table 15.1 Frequency performance of RF FETs. fT-500 and fmax-500 are the cutoff frequency and the maximum frequency of oscillation (in GHz) of the different FET classes according to their fT and fmax trend curves for a gate length of 500 nm. Record fT and record fmax are the highest reported fT and fmax values for each transistor class in GHz and L is the gate length of the record transistors in nm
Transistor class | fT-500 | Record fT | L | Ref. | fmax-500 | Record | L | Ref. |
Graphene MOSFET | ≈100 | 427 | 67 | 48 | ≈40 | 70 | 100 | 49 |
GaAs pHEMT | 65 | 152 | 100 | 50 | 153 | 290 | 100 | 51 |
InP HEMT and GaAs mHEMT | 106 | 688 | 40 | 52 | 216 | 1200 | 35 | 53 |
Si MOSFET | 43.5 | 485 | 29 | 54 | 70 | 420 | 29 | 55 |
While experimental RF data for GNR MOSFETs are still missing, the fT performance of GNR MOSFETs has been studied by simulations. Early simulations assuming ballistic transport predicted unrealistically high cutoff frequencies in the 20–70 THz range for 10-nm gate GNR MOSFETs [56]. Later, scattering has been included and cutoff frequencies of 5 THz have been calculated for 10-nm gate transistors with 10-nm wide GNR channels [57]. Figure 15.5 compares the simulated cutoff frequencies of GNR MOSFETs [56,57] and gapless graphene MOSFETs [58,59] with those of the best experimental gapless graphene MOSFETs. An analysis of this data reveals to two interesting observations. First, down to 70 nm gate length the experimental fT trend of gapless graphene MOSFETs is perfectly reproduced by simulations. Second, the simulated cutoff frequencies of GNR MOSFETs from [57] closely follow the simulated fT trend for gapless graphene MOSFETs [58,59]. Obviously the degraded mobility in narrow GNRs is not expected to significantly affect the RF performance of short-gate GNR MOSFETs. Unfortunately, fmax simulations for GNR MOSFETs are still missing.
To get a reasonable idea on the RF capabilities (including fmax) of GNR MOSFETs, in the following an empirical-inductive approach to estimate their fT − fmax performance is developed. It is based on general RF performance trends observed for Si MOSFETs and III-V HEMTs and takes advantage of the scale length λ. The scale length provides useful information on the electrostatic integrity of a FET and its ability to suppress undesirable short-channel effects. The scale length concept has originally been developed for Si MOSFETs but can be applied to other FET classes as well provided the FET channel is semiconducting. A certain FET design with a small scale length can be considered to be sufficiently immune against short-channel effects down to short gate length levels. The short-channel effect relevant for RF FETs is the degradation of the drain current saturation leading to an enhanced drain conductance gds (gds is the slope of the output characteristics) that deteriorates power gain and fmax. Our empirical-inductive approach essentially consists of four steps.
where εch and εbar are the dielectric constants of the channel and the barrier, tch is the channel thickness (the thickness of the Si body in fully depleted silicon on insulator MOSFETs and the thickness of the InGaAs quantum well channel in III-V HEMTs), and tbar is the thickness of the barrier between gate and channel (the gate oxide in MOSFETs, the AlGaAs barrier in GaAs pHEMTs, and the InAlAs barrier in InP HEMTs and GaAs mHEMTs). Table 15.2 shows typical values for εch, εbar, tch, and tbar for the three RF FET classes from Figure 15.4 and for GNR MOSFETs, together with the scale lengths obtained from Equation 15.3. The results show a clear trend and indicate that in GNR MOSFETs short-channel effects should be much better suppressed than in the competing FET classes. Therefore, for GNR MOSFETs the linear part of the log(fT, fmax) versus log(L) should extend down to shorter gate length levels.
Table 15.2 Typical design parameters and scale lengths of different classes of RF FETs. The much shorter scale length of GNR MOSFETs suggests that the linear shape of the log(fT, fmax) versus log(L) curves can be maintained down to shorter gate lengths compared to the competing RF FETs
Transistor class | ch | bar | tch (nm) | tbar (nm) | λ (nm) |
Si MOSFET | 11.9 | 3.9 | 5 | 0.6 | 3 |
GaAs pHEMT | 13.3 | 12 | 15 | 35 | 24 |
InP HEMT and GaAs mHEMT | 14.1 | 12.7 | 15 | 15 | 15.8 |
GNR MOSFET | 3 | 3.9 | 0.35 | 2 | <1 |
We note that the fabrication issues and edge problems of GNRs mentioned earlier are relevant for RF GNR MOSFETs as well. However, RF ICs contain only a limited number of transistors (orders of magnitude less compared to complex logic ICs). Therefore it should be less cumbersome to develop a viable fabrication process for RF GNR MOSFETs. To conclude, it is not likely that the fmax problem of gapless graphene MOSFETs can be solved since it is related to the missing gap of gapless graphene. GNR MOSFETs, on the other hand, have the potential for significantly enhanced fmax and at ultra-short gate lengths level they possibly may outperform the conventional RF FETs. The potential of RF BLG MOSFETs is not clear at the moment. First simulations predict fT and fmax in excess of 1 THz for a 40-nm gate BLG MOSFETs but experimental RF results for BLG MOSFETs are still missing [61]. More research is definitely needed to explore the RF potential of GNR and BLG MOSFETs.
A promising direction currently pursued is directed toward complementing the conventional semiconductors by graphene instead of trying to replace them and to use graphene in applications where other materials fail or perform poor. Intensive work is underway on graphene transistors for flexible and printable electronics.
Traditional mono-crystalline semiconductors such as Si and III-V compounds are rigid and cannot be used for flexible and printable electronics. Instead, organic semiconductors are favored in this field. Organic materials are bendable and printable, but this comes at the expense of a very low mobility. Typical mobilities of organic materials are in the 0.01–1.0 cm2/Vs range only, which makes fast devices and low operating voltages a problem. Here, graphene definitely has an edge.
Large-area graphene is bendable and recently the deposition of graphene on flexible substrates and the use of graphene ink for printed electronics have become fields of intensive research. Impressively high mobilities of 1000–4930 cm2/Vs for graphene on flexible substrates and printed graphene structures with mobilities of 100–365 cm2/Vs have been reported [62,63]. Moreover, formidable results have been achieved with graphene transistors on flexible substrates [64–66]. A recent highlight is a 500-nm gate graphene MOSFET on polyethylene naphthalate substrate showing a fT of 10.7 GHz and a fmax of 3.7 GHz [66]. This transistor is orders of magnitude faster than competing organic transistors on flexible substrates and shows that graphene-based GHz circuits on plastic have become a viable option. Moreover, printed graphene transistors have been reported [67] that could pave the way for graphene to the emerging field of low-cost printed circuits that can be fabricated without lithography. It should be kept in mind, however, that the flexible and printed graphene MOSFETs mentioned possess gapless large-area channels and do not switch off.
All graphene transistors discussed in the preceding sections are based on the classical MOSFET concept and suffer either from the gapless nature of large-area graphene or from the degraded mobility caused by a bandgap opening in BLG and GNRs. To exploit the full potential of graphene, however, devices taking advantage of the missing bandgap are desirable. Actually, several such transistor concepts, all based on tunneling in one way or another, have been conceived.
In 2009, the BiSFET (Bilayer Pseudospin Field Effect Transistor) has been proposed [68]. It is a vertical tunnel device concept based on the prediction that under appropriate conditions a superfluid electron-hole pair condensate forms in two graphene layers of opposite conduction type (i.e., one n-type and the other p-type conducting) that are separated by a thin dielectric [69]. Graphene is attractive for the formation of such a condensate since: (i) it is atomically thin and the missing bandgap is not a problem for proper BiSFET operation and (ii) it has a low density of states and symmetric conduction and valence bands. The active region of a BiSFET consists of the following vertical layer structure: top-gate / top-gate oxide / top graphene layer / interlayer tunnel oxide / bottom graphene layer / bottom-gate oxide / bottom-gate. Outside the active region, the two graphene layers have contacts acting like the source and drain contacts in a FET. Under certain bias conditions (top-gate voltage, bottom-gate voltage, interlayer voltage applied across the two graphene layers), an electron-hole pair condensate forms, the resistance of the tunnel oxide dramatically reduces, and a pronounced tunnel current can flow. Beyond a certain interlayer voltage that can be small compared to the thermal voltage kBT/q at room temperature, the condensate collapses and the current drops to zero. Thus, in spite of the missing bandgap of the graphene layers, the BiSFET switches off since, in contrast to MOSFETs, not the conductivity of a graphene channel but the tunnel resistance of the interlayer tunnel oxide is controlled by the gate applied voltage.
The small interlayer voltage range within which the current reaches its maximum and then drops to zero results in extremely small switching energies. Theoretical considerations have shown that ultra-fast (100 GHz clock frequency) and ultra-low power (a few to a few tens of zeptojoules per switching event of a logic gate) logic circuits should be possible with BiSFETs [70]. While the BiSFET is an intriguing conceptual device, its experimental manifestation is still missing. One problem is certainly the proper stacking of the two graphene layers [71]. Nevertheless, in 2009 the BiSFET has been added as an emerging research device to the ITRS.
Apart from the BiSFET, several other vertical graphene-based tunnel transistor concepts are under investigation, for example [72,73]. All transistor concepts mentioned in this section have in common that at the moment their potential cannot be assessed reliably and that more work is needed to evaluate their merits and drawbacks.
It is always difficult to make a serious prediction on the future progress in dynamic fields such as semiconductor electronics in general and graphene electronics in particular. Thus, the following discussion should not be considered as a reliable prediction but rather as a personal view on the perspectives of graphene electronics.
Graphene is a fascinating material with outstanding properties and will undoubtedly find applications in different fields. Its prospects in electronics, in particular in digital logic and RF electronics, are vague, however. The early expectations that graphene could replace the conventional semiconductors in the foreseeable future have turned out to be wishful thinking. One should bear in mind, however, that this is not a fault of graphene – it is just a material. Instead, this is related to unrealistic performance projections based on a single property, the mobility, of graphene. One lesson we can learn from 10 years of graphene research is: Never expect too much too soon from a new material!
A second issue one should consider is the following. As mentioned above, to a large extend the discussions on future applications of graphene have been focused on high-performance transistors, in particular on the replacement of the conventional channel materials by graphene. In this regard it is helpful to recall Herbert Kroemer's Lemma of New Technology [74]: The principal applications of any sufficiently new and innovative technology always have been – and will continue to be – applications created by that technology. This means, in other words, that graphene may find/create applications in areas that have not been considered in the early days of graphene research.
Finally, graphene is by far not the only two-dimensional material. Instead, the work on graphene during the early 2000s paved the way for a wide variety of other two-dimensional materials that are currently under intensive investigation [75], and partly these new materials are very interesting for electronic applications.
Table 15.3 summarizes our current view on the potential applications of graphene MOSFETs. The suitability of graphene in high-performance FETs for the More Moore (logic) and More Than Moore (RF) domains is considered rather critical since the conventional transistors (Si MOSFETs and III-V HEMTs) are simply too strong. While we do not see much a future for gapless graphene MOSFETs in high-performance logic and RF circuits, their application in flexible and printable electronics looks promising. The prospects of BLG MOSFETs are entirely unclear at the moment since it is much too less known on these transistors to make an even remotely reliable assessment. GNR MOSFETs provide the high on–off ratios needed for logic and excellent electrostatics due to the ultimately thin channel but are plagued by fabrication issues and degraded mobilities. In the RF field, GNR MOSFETs with ultra-short gates may be able to outperform the competing RF FETs – but this is not certain.
Table 15.3 Possible applications of graphene MOSFETs
Graphene MOSFET | |||
Channel | Gapless graphene | BLG | GNRs |
Bandgap (eV) | 0 | 0.040–0.13 | 0.3–0.5 |
Channel mobility | Very high | Degraded | Degraded |
On–off ratio | 2–10 | 100 | 106 |
Application in logic | No | No | In principle yes |
fT (GHz) | >400 | No experimental data; potentially high | No experimental data; potentially very high |
fmax (GHz) | <100 | Experimental data not available; potentially high | Experimental data not available; potentially very high |
Application in RF | Limited | In principle yes | In principle yes |
Further applications | Flexible and printable electronics | Unknown | Unknown |
The BiSFET, after all, is a really intriguing device concept. Unfortunately, operating devices are still missing. Thus, an experimental confirmation that this concept really works is urgently needed. Even if operating BiSFET can be realized, there will be long road ahead until scaled BiSFETs that can compete with Si CMOS and can be applied in commercial circuits will become reality.
A view into the 2011 edition of the ITRS (the edition that was current at the time of completing this chapter) reveals that, although graphene transistors are mentioned in the Emerging Research Devices chapter, no production-stage carbon-based transistors are expected in the ITRS time frame, that is, until 2026. Instead, work on alternative channel materials with enhanced mobilities such as III-V semiconductors for n-channel MOSFETs and Ge for the p-channel counterpart is considered to be a major issue and production-stage MOSFETs with these alternative channel materials are expected before the year 2020.
Things may change, however, beyond the time frame of current ITRS when MOSFET gate lengths of 5 nm and below are expected. At such short gate length levels, direct source–drain tunneling may become a limiter for further MOSFET scaling. Recent work has shown that to suppress source-drain tunneling, channel materials having a heavier carrier effective mass (and thus by trend a lower mobility) and a wider bandgap are preferable [76–78]. This, together with the ultra-short scale length, may give two-dimensional materials such as graphene nanoribbons and transition metal chalcogenides (e.g., MoS2, MoSe2, WS2, etc.) an edge over conventional semiconductors in MOSFETs at ≤5-nm gate length levels.
The author acknowledges financial supported from the Excellence Research Grant and the Intra-Faculty Research Grant of Technische Universität Ilmenau.