This chapter discusses test-bed design for energy processing and the smart grid. The energy-processing concepts are developed based on the knowledge of classical energy-conversion machines such as generators, induction machines, and transformers. The integration of renewable-energy resources (RER) as a stand-alone and grid-connected system is also studied with simple experiments to determine performance measures and characteristics. Energy-processing components based on power electronics devices for inverters and converters are introduced. Hands-on experiments to validate real-time measurements such as smart meter PMUs are determined. Application of real-time data simulations, as hardware-in-the-loop, is included. The integration of these devices is used to develop two working test beds, one as a smart-grid platform for system design, simulation, and optimization, and control, and the second as a classical machine test bed, which includes power electronics and real-time measurements tools. The application of the smart grid needs to be scaled down to the university-laboratory level to test possible improvements on a small scale; results should be evaluated through simulations and random tests. This chapter aims to provide guidelines for the structure of a smart-grid test bed and the requirements at each level, e.g., generation, transmission, distribution, and user. It also discusses features, components, and architectures for a smart-grid test bed and details various simulation software, hardware, and other equipment essential for the test bed. The smart-grid concept is an evolutionary technology of interest, so it has attracted the focus of many researchers, utilities, power industries, and others. It is discussed by researchers working in power arenas. Many universities throughout the world are working on smart-grid technologies, with many definitions and attributes and a variety of names: intelligent grid, modernized grid, and smart grid, based on the selected functions and applications within the bulk electric grid. By any name, it includes the latest devices—from advanced controls and sensors to advanced communication. So the smart-grid concept includes electrical, electronics, and communications knowledge. Moreover, full-fledged working smart grids will involve customers as well so they even catch the attention of individual human beings. In this chapter, we discuss some worldwide activities that pertain to design and development of a smart-grid test bed and improvements needed in current research. Features and Architecture The smart grid has special features that are lacking in the traditional grid, such as two-way communication, advanced sensors, advanced power electronics, and renewable-energy penetration as a distribution source or as centrally connected. These features require the latest devices and components to be added into the system whose performance still needs to be evaluated under different contingencies and improvements. These components should be tested in a laboratory environment and before being considered for practical use. Moreover, their interoperability in new grid environment should also be verified and required changes should be made. Different components and architectures are discussed below. Wide-area measurement systems (WAMS) are required to be studied in following areas: Plug-in hybrid electric vehicles (PHEVs) are an essential part of the future smart grid. To optimize these assets, their interoperability with the smart grid should be studied in detail for: Advanced power electronics will be implemented at each stage of the smart grid and their interoperability in the new grid needs to be examined considering the complexity and disturbance they add into the system. Such studies should include: Wide-area monitoring, control, and protection (WAMPAC) includes the use of systemwide information and communication infrastructure to send local information to a control center in order to counteract the propagation of large disturbances. New synchronized measurement technology (SMT), which enables WAMPAC, is being developed by researchers. Synchrophasors have a wide area of applications and some of the possible benefits have not been evaluated, particularly their benefits for protection in practical systems. Synchrophasors should be given emphasis for study and verified under different applicable areas such as wide-area control system and wide-area protection systems. They should be evaluated for: Inclusive of all these components and devices, smart-grid test-bed architecture should be similar to that provided on Chapter 15 in Figure 15.1. Smart grid testbed includes hardware and software subsystems. The Hardware consists of Distributed Generation (DGs) and a Central Generator (CG) to implement grid connected operations as a power supply to the microgrid which is basic block of smart grid. The microgrid operates either as standalone or grid connected mode. These operations are performed by power electronic devices serving in transfer switches and as inverter/converter. Storage devices such as batteries, super capacitors and flywheels are used in the system to stabilize the supply by storing surplus power generation. The RERs and storage devices are connected to the system through power electronics interface devices. The hardware subsystem also includes control system for different parts of the system. Introducing communication technologies between components and between controls allows the system to operate in a smart way by adding smart automation functions. Automation functions are applied from grid side or distribution side depending on the connection of the smart grid to the main system. Distribution automation, when connected from distribution side, works with a goal of real time adjustment to changing loads, generation, and failure conditions of distribution system usually without an operator intervention. For example, it consists of power quality controls, protocols and application programs to check stability and vulnerability of entire system. The software subsystem of smart grid testbed includes advanced real time simulator such as Real Time Digital simulator (RTDS) and OPAL RT. The software subsystem requires communication subsystem and optimization subsystem for automation functions such as Optimal Power Flow (OPF), loss management, fault analysis and others. Various experiments can be performed on smart grid testbeds to maintain sustainable operation of the power system. These studies include: evaluation of RERs as distributed sources under different load conditions and contingencies, operation of power system by optimizing generations, locational marginal pricing (LMP) and related topics. With increasing proponents for more sustainable power systems, i.e., smart grid, numerous efforts have been embarked on by several institutions, bodies, and organizations to address the overall goals of the smart grid. To ensure that all features of the smart grid are rightly implemented, smart-grid proponents have come up with several test beds to address features and architecture and ensure that smart grids do not fall short when in operation in the real world of power systems. Smart-grid test beds hope to achieve the following: The smart-grid test bed development in Ireland is based on architecture that employs open-source and widely available software and hardware tools. The developers of Ireland's smart-grid test bed aimed to encourage free and open use of the smart-grid test bed for development of a live project. The scope of the test bed has not been feasible to perform a comprehensive analysis of the technology, nor to implement a complete test bed to support all high-level requirements. The project instead is intended as a starting point for a test bed that will be extended further in subsequent work with a more comprehensive solution. Currently, the test bed focuses on the emulation of the TCP/P stack using open-source tools that communicates with SCADA protocols. As a result of a diverse range of SCADA protocols in use, a Modbus protocol was selected for use due to its simplicity and ease of implementation. The smart-grid test-bed implementation therefore attempted to produce a Modbus with RTU that communicates over a network to produce actual SCADA network traffic, which may be captured for analysis using common networking tools. This SCADA traffic can be used for security analysis and evaluation of power flows. The current test bed for the smart grid in South Korea is well implemented in Design of the Smart Power Grid Management System [19]. The architecture highlighted for the smart-grid test bed comprises: The smart-grid lab at Georgia State University consists of four main components: Features of a Smart-Grid Components Design of embedded systems for the smart grid containing both hardware and software requires solving several unique and difficult problems. One of the interesting problems is that of debugging the embedded software in conjunction with the hardware. The traditional co-design process, where the software is debugged after hardware is fabricated, produces large design delays due to late discovery of errors in the hardware and in the interface between hardware and software. Integration on a chip could make this problem worse because currently used tools cannot be used and signals on a chip cannot be easily observed. There is an obvious need for a change in the co-design methodology whereby software and hardware can be jointly debugged earlier in the design cycle. However, this change in methodology can only happen when appropriate design tools are available. There are two approaches to debugging hardware and software for better simulation in smart grids [9] without building the actual hardware. The first one is based on emulation of hardware using, for example, field-programmable gate arrays (FPGA) and using a separate board for the processor and memory. A designer can generate a prototype relatively quickly and debug the smart-grid software and interfaces on the prototype. After these bugs are detected, the entire system can be recompiled within a relatively short time. In most cases, hardware emulators run only an order of magnitude slower than the actual system, allowing the designer to test the system with a large number of test cases. However, due to its high cost, this technique is economically feasible only in certain cases. It also cannot be used to model timing constraints accurately and in many cases designs must be modified to suit emulation. Recompilation of hardware takes more time than compiling software or a hardware description language (HDL) model for simulation. Finally, it is not always possible to observe the internal state of the circuit, both in the HDL and processor, making debugging complicated and slow. A complementary approach is to build software models for all the components of the system and use simulation to analyze behavior. There are many advantages to this approach. First, software can be combined with behavioral-level hardware descriptions to detect bugs as early as possible in the design phase. Hardware, software, and interface routines can be designed and debugged in parallel. Second, timing constraints can be accurately modeled. Third, recompilation of either hardware or software is quick. Detailed debugging, where internal states of all components can be accessed and altered at all time points, can be easily supported. Finally, this approach is not as expensive as emulation. Simulators have been mostly used for the design of hardware and there are few tools for co-simulation. We describe a hardware-software co-simulator that can be used in the design, debugging, and verification of embedded systems. This tool contains a simulation backplane that can be used to integrate processor, hardware (HDL), and dedicated simulators for peripherals, forming a co-simulator capable of efficiently simulating hardware, software, and their interaction. Each simulator implements debugging functions like setting break points, examining and altering internal states, and single stepping. To feed stimulus to the system and to observe its response, a set of virtual instruments have been created. The co-simulator and the virtual instruments can be used to create a virtual laboratory that will provide users with a platform for rapid virtual prototyping. Performance metrics (like clock cycles needed to execute software) can be easily evaluated, allowing the user to explore different algorithms, hardware and software implementations, and hardware-software trade-offs. The main drawback of simulation is its speed. In many cases, simulation runs orders of magnitude slower than the actual system. Simulation time depends on the (timing) accuracy of the models, with time increasing with increased accuracy. Therefore, reducing simulation time without sacrificing timing accuracy becomes a very important problem. Our main contribution is a set of techniques to speed up simulation of processors and peripherals without significant loss in timing accuracy. Processor simulation speed is improved by accurately (in terms of timing) simulating only those cycles where there is interaction with peripherals and by caching results of instruction decoding. Suppression of periodic signals and other techniques speed up simulation of peripherals. Simulation overhead is kept low by managing time more efficiently. This tool is expected to be used at any point after the initial architecture is determined. Software designers may use behavioral hardware models for initial debugging, evaluation, and exploration of algorithms and implementations. System architects may use the tool to determine hardware-software trade-offs to be implemented in smart grids. Hardware designers can use prototype software to evaluate, test, and debug hardware. When hardware and software are ready, designers can work on testing and debugging the entire smart-grid system. Custom smart-grid prototype hardware represented using software is simulated using a commercial simulator. Since a commercial simulator is designed to be a stand-alone tool and does not implement the interface functions required by the smart grid, its integration poses certain problems. The interface functions can only be implemented using different programming languages for the simulator. This approach may only allow user-defined functions during hardware simulations such as with Real-Time Digital Simulator (RTDS) and Opal-RT. It also allows these functions to call certain functions for simulation control in RTDSs. In hardware implementation, the user is required to call some functions using custom circuit descriptions. There are some requirements on the manner of input, output, and bidirectional lines. GridLink and GridIQ are under-development hardware for the smart grid that can be represented at any level of the power system—generation, transmission, or distribution. These are currently the only accurate timing hardware simulators for the smart grid. Simulators like GridSim are only phase accurate and their interface functions may introduce errors during rounding of event times if proper care is not exerted in describing the hardware. To properly verify the features of the smart grid, hardware-software co-simulators for embedded system design and debugging are necessary. This would provide a natural environment for joint debugging of software and hardware. They will also be useful for evaluating system performance, selection of algorithms, implementations, and exploring hardware-software for smart-grid architectures. The improved speed of the co-simulator comes from various sources. First, the co-simulator is targeted toward phase-accurate simulation. Switching between transmission and distribution during simulation, caching of decoded instructions, and not simulating instruction fetch cycles all contribute to the increased speed of simulation processes. Speed is increased through the use of: Making time discrete and using a statically allocated timing wheel helps keep coordination overhead low. We have demonstrated the use of the tool in three design examples and have shown that the simulation speed is adequate. The expected result from a co-simulator for the smart grid is first to cut down cost, which may be wasted for a smart grid that lacks basic features. Hence, co-simulators when properly implemented is aimed at promoting: Real Time Digital Simulator (RTDS) RTDS is a real time simulator used for studying power system operation and perform testing control and protection equipment. It is a super computer constructed from workstation interface cards, input/output cards, processors, synchronization cards and others. it comes with a software package called RSCAD on which most modeling and sizing of the system is performed. In RSCAD, various libraries of power system, control and interface libraries are included for modeling and setting up requirements. The compiled model is then run on main simulator (RTDS) interfaced through runtime window of the software. Component models run on the simulator will be used to study automation functions such as frequency load control and V/Var optimization. Hence, the simulator is used as a good add on for the design of future deployment of microgrid operation in grid connected and standalone mode. OPAL RT Simulator The OPAL RT simulator is also another family of real time simulator. It consists of analog and digital I/O signal modules and power electronic circuits. The Simulator works on computational software called eMEGAsim which is fully integrated with MATLAB. MathWorks enable the use of a wide variety of software toolsets including Control System Design and Analysis toolboxes, Code Generation toolboxes, and Physical Modeling toolboxes. Power System models are built on MATAB platform before being loaded to the simulator. It is also use as hard-ware in the loop (HIL) to solve various control option for performance analysis of micro grids and smart grids. In any smart-grid test bed, the main components are IPS (for power routing), different sources of power supply, energy demanders, and power meters. IPS enables the power grid to be configured as any kind of topology for power distribution, and power meters sense the energy on each line and report the data. The information network is co-designed with the power network. Therefore, this approach can significantly help researchers analyze and compare various algorithms and protocols. Several experiments are performed to show the applicability of this test bed for the smart-grid research community. However, currently the IPS has to be plugged into another power supply [91]. Even though this could be replaced with a rechargeable battery, the power meter cannot measure active and reactive energy consumption. This limits the scope of application of the smart-grid test bed until further research approaches are proposed to add this feature. The test-bed designs and implementations only partially fulfill the requirements outlined in the IEC and NIST guidelines for general test-bed design. A major concern is that there are no single test-bed designs that address both the traditional SCADA system as well as the modern smart-grid approach to electrical infrastructure management. In this chapter, we presented discussions on test-bed design and motivation for it, test-bed components, architecture, and functions. Case studies of test beds around the world were presented for the benefit of the student. Though it may be accepted that smart-grid infrastructure will eventually replace traditional SCADA technology, it would be unreasonable to assume that this would occur at a rate such that traditional SCADA systems would be rendered obsolete overnight. As such, it is important to test smart-grid designs and implementation to accommodate different architectures and allow for a transition from the traditional SCADA approach to the modern smart-grid approach of management. Work being done in the research community in the design of the micro/smart grid was cited. This chapter provided technology, concepts, and schematics for future development of smart-grid systems using the knowledge and concepts from an energy-processing scheme.17.1 INTRODUCTION
17.2 STUDY OF AVAILABLE TEST BEDS FOR THE SMART GRID
17.3 SMART MICROGRID TEST-BED DESIGN
17.4 SMART-GRID TEST BEDS
17.5 SMART-GRID CASE STUDIES
17.5.1 Ireland
17.5.2 South Korea
17.5.3 United States
17.6 SIMULATION TOOLS, HARDWARE, AND EMBEDDED SYSTEMS
17.6.1 Simulation of Smart-Grid Hardware
17.6.2 Smart Grid Simulators in the Marketplace
17.7 LIMITATIONS OF EXISTING SMART-GRID TEST BEDS
17.8 CHAPTER SUMMARY
BIBLIOGRAPHY