9.2.1 Current–Voltage Relationship

The current–voltage characteristics of the IGBT are illustrated in Figure 9.12. These characteristics resemble those of a power MOSFET except for the offset voltage near the origin, caused by the potential drop across the forward-biased substrate junction. Another difference that is not apparent from this figure is the steeper slope of the characteristics in the linear region. This is due to the lower on-resistance of the drift region caused by conductivity modulation, as will be discussed below.

To derive the operating equations of the IGBT, we will first consider conduction in the thick drift region. Since this region is lightly doped, we can assume high-level injection conditions prevail in the on state. The approach we use is similar to that employed in the pin diode discussion in Section 7.3, and we will emphasize comparisons with the pin diode as we go forward. Consider first a one-dimensional vertical slice through the drift region, as shown in Figure 9.11. We redraw this region in Figure 9.13, along with a coordinate system for analysis. In this representation we have neglected the buffer layer, since it has negligible effect on the on-state operation.

In the conducting state, the internal BJT is operating in the forward-active region, with the substrate acting as emitter and the drift region acting as the base. Base current is supplied through the p-channel MOSFET, which is not shown in Figure 9.13, but we can assume that holes will be made available as needed to satisfy recombination in the base.

Our first objective is to obtain an expression for the potential drop across the base under high-level injection. The approach is the same as employed for the pin diode in Section 7.3, where we assumed and applied the ambipolar diffusion equation, Equation 7.39, subject to the boundary conditions at and . The general solution to the ambipolar diffusion equation is given by Equation 7.40, which is repeated here for convenience:

7.40

where is the ambipolar diffusion length. All electrons that reach the reverse-biased CB junction are immediately swept across by the electric field, so the boundary condition here is . For now, we will denote the boundary condition at the EB junction as . Inserting these boundary conditions into Equation 7.40 leads to two equations that can be solved for the constants and . Performing the solution, we find

9.80

Inserting and into the general solution Equation 7.40 yields

9.81

To obtain the boundary condition , we proceed as we did with the pin diode and assume unity injection efficiency at the EB junction, that is, we assume hole injection into the emitter is negligible compared to the total current. Writing the expressions for hole and electron current at , we obtain results analogous to Equation 7.42, namely

9.82

where the minus sign in front of arises because we define positive current to be in the negative direction, as shown in Figure 9.13. We now set in the base to insure charge neutrality (since the doping is small compared to the injection level), and solve the second equation to obtain the electric field at ,

9.83

Substituting Equation 9.83 into the first Equation 9.82 and solving for at yields the desired boundary condition at ,

9.84

Inserting Equation 9.81 into Equation 9.84 and noting that in high-level injection , we find that

9.85

Inserting this into Equation 9.81 leads to the desired equation for carrier density,

9.86

This result may be compared with Equation 7.46 for the pin diode. The differences arise from the nature of the boundary condition at (or in the pin diode coordinate system). In the IGBT this boundary extracts electrons and injects no holes. In the pin diode this boundary extracts no electrons, and injects holes with unity injection efficiency. We should also point out that Equation 9.86 involves the electron diffusion coefficient, while Equation 7.46 involves only ambipolar factors. Figure 9.14 shows carrier densities in the pin diode and IGBT at the same total current, computed using Equations 7.46 and 9.86. Here we see the effect of the reverse-biased CB junction that quickly extracts all arriving electrons. As a result, the IGBT exhibits less conductivity modulation than the pin diode.

Continuing to work toward an expression for the total potential drop across the layer, we next wish to find an expression for the electric field as a function of position. We can write the total current as

9.87

where the minus sign in front of again enters because the terminal current is defined to be positive in the negative direction. We now set and , with for charge neutrality. Solving for yields

9.88

Inserting Equation 9.86 into Equation 9.88 yields, after some algebra,

9.89

where

9.90

The electric field within the drift layer is independent of current in the regions where high-level injection prevails, that is, where . In these regions, can be neglected compared to the sinh term in the denominator of Equation 9.89. The region very close to is not in high-level injection, since approaches zero near the collector, but the term in the denominator prevents the electric field from becoming infinite at .

The electric field calculated using Equation 9.89 is shown in Figure 9.15 for the same conditions as Figure 9.14. The electric field is negative, which drives holes to the left and electrons to the right. The diffusion process, on the other hand, carries holes and electrons in the same direction, since . From Figure 9.14 we see that diffusion moves both electrons and holes to the right throughout the IGBT whereas, in the pin diode, diffusion brings carriers into the drift region from both edges.

Having an expression for the electric field, we simply need to integrate Equation 9.89 with respect to to obtain the electrostatic potential as a function of position. We choose to write the potential in the form

9.91

Inserting Equation 9.89 and performing the integral, we obtain the rather intimidating expression

9.92

Figure 9.16 shows the electrostatic potential given by Equation 9.92, along with the potential in a comparable pin diode. The potential drop in the IGBT is much greater than in a pin diode because injection occurs at only one boundary of the drift region rather than two. Nevertheless, the potential drop is much less than would be expected in the unmodulated drift region of a power MOSFET.

The total electrostatic potential drop across the drift layer can be found by setting in Equation 9.92. However, this is not the voltage drop across the drift layer. The electrostatic potential drop in Equation 9.92 describes the band bending, or change in , across the drift layer, whereas the voltage drop is the change in the hole quasi-Fermi level . The difference can be understood from the band diagram in Figure 9.17. The splitting in across the junction, designated , will be calculated in a few moments. The additional change in across the drift region is labeled , and this is the voltage drop we desire.

To calculate , we need an expression for the hole quasi-Fermi level, or the electrochemical potential for holes in the drift region. We note that the hole density at any point is related to by

9.93

From this it follows that

9.94

Defining the hole quasi-Fermi potential and noting that the electrostatic potential , we can write

9.95

Fortunately we have already solved for and for . Inserting Equations 9.92 and 9.86 into Equation 9.95 and working through the algebra, we obtain

9.96

Equation 9.96 describes the variation in hole quasi-Fermi potential across the drift layer, where θ is given by Equation 9.90. The total voltage drop across the drift layer can be written

9.97

Before calculating other voltage drops in the structure, we pause for a moment to consider the common-emitter current gain, or , of the internal npn BJT. Since we now have expressions for the carrier densities and electric field as a function of in the base, we can evaluate these expressions at the collector edge to determine the collector and base currents in the internal BJT. We can then use the ratio to determine . The electron and hole currents at can be written

9.98

Inserting from Equation 9.89 and setting and , we can write

9.99

The hole current is negative, since the factor in square brackets is always positive. A negative hole current corresponds to holes moving into the drift region at . These holes are not flowing across the CB junction, since this junction is reverse biased. Rather, they are flowing into the drift region through the p-channel MOSFET, and this constitutes the base current of the BJT. The electron current is also negative, and corresponds to electrons flowing across the CB junction into the collector. This is the collector current of the BJT, so the current gain can be written

9.100

Figure 9.18 shows the current gain given by Equation 9.100 as a function of base width. For the parameters used in Figures 9.14–9.16, the current gain is 8.44. This may seem a low value, but a high is not necessary for a successful IGBT, since the base current is not supplied from an external circuit but rather is “borrowed” from the collector current through the integral MOSFET, as can be seen from the equivalent circuit in Figure 9.11. We note that Equation 9.100 becomes inaccurate at large values of , since the carrier densities at large are no longer high enough to constitute high-level injection.

As an aside, we also note that the base current in Equation 9.99 can also be calculated from the total hole charge stored in the drift region. The stored hole charge is found by integrating Equation 9.86 from to , resulting in

9.101

Setting equal to the total recombination current in the base, , we obtain the same result as in Equation 9.99.

We now return to the task of calculating the total voltage drop across the IGBT as a function of current. The next voltage drop to be determined is the drop across the forward-biased EB junction, . Employing the law of the junction, the electron density at the edge of the drift region at can be written

9.102

Solving Equation 9.102 for and inserting from Equation 9.86 leads to

9.103

The voltage drop across the reverse-biased CB junction does not need to be calculated, since this voltage is controlled by the voltage drops across the p-channel MOSFET and the vertical p-channel JFET, as will be discussed next.

Current flowing through the p-channel MOSFET produces two voltage drops: the drop across the MOSFET channel and the drop across the vertical p-channel JFET that is gated by the grounded collector regions. The MOSFET is operating in the linear region and the channel resistance is given by the p-channel analog to Equation 8.52, namely

9.104

where is the inversion layer hole mobility and is the channel length. The voltage drop is obtained by multiplying by the current density passing through the MOSFET, which is the base current given by the second equation in Equation 9.99. The result is

9.105

The first bracketed factor is negative, so the voltage at the drain end of the MOSFET channel will also be negative, as expected for a p-channel MOSFET.

The voltage drop across the vertical JFET region can be obtained by multiplying the base current by the linear region resistance of the JFET. Here we can use Equation 8.11, which gives the current–voltage relationship of a double-gated JFET, with the following modifications: Recalling that the JFET within the IGBT is oriented vertically, we replace in Equation 8.11 with the channel length and with the JFET width , where and are illustrated in Figure 9.11. The drain current in Equation 8.11 includes both halves of the channel, but we now wish to calculate the potential drop using only one half of the channel, so we replace in Equation 8.11 with . Since we now have a p-channel JFET, we replace by and by . Finally, we set , since the collector regions that serve as the gates of the JFET are grounded. We also need to account for the fact that the source of the JFET is not at ground, as assumed in Equation 8.11, but rather at a negative potential due to the potential drop across the MOSFET channel. Making the indicated modifications, we can write

9.106

where we have made use of the fact that . The specific resistance of the JFET is given by

9.107

Taking the derivative of with respect to using Equation 9.106 and evaluating at , then inserting into Equation 9.107 yields

9.108

Equation 9.108 may be compared with Equation 8.18, keeping in mind that Equation 9.108 refers to a vertical JFET with and , while Equation 8.18 refers to a lateral JFET with . Finally, the voltage drop across the JFET can be found by multiplying the on-resistance by the base current density from the second Equation 9.99,

9.109

where the source voltage is set equal to the voltage drop across the MOSFET channel given by Equation 9.105. To minimize the voltage drop across the JFET, the doping in the JFET region is often made higher than in the IGBT drift region, and it is important to keep in mind that in the drift region and in the JFET region may be different.

The total voltage drop across the IGBT, that is, the emitter-to-collector voltage, can be found as a function of current by adding the individual voltage drops already computed:

9.110

where Equations 9.97, and 9.103 are used in Equation 9.110, and V_SUB accounts for the voltage drop across the substrate. The negative sign for arises from the polarity assumed in the derivation of Equation 9.97.

It is important to point out the limitations of the above analysis. First, we have assumed linear-region operation of the MOSFET and JFET channels. This is acceptable since we are primarily interested in the on state, which implies a low and hence low across the channels. However, our equations will not describe the full characteristics. To do this we must replace Equations 9.105 and 9.109 with equations that are valid for large . Secondly, we have implicitly assumed one-dimensional current flow in each section of the device and have not considered the effects of current spreading as carriers flow from one region to another. This is a major shortcoming, and the current–voltage relation given by Equation 9.110 will not provide a quantitatively accurate description of conditions inside a real device; a quantitative description requires full two-dimensional computer simulations. Finally, it is important to consider the effects of operating temperature, particularly with respect to incomplete ionization of dopants, dependence of mobility on temperature, and the strong dependence of lifetime on temperature. Power switching devices operate from ambient temperature to the maximum temperature limit of the device and package, and their performance parameters vary significantly over this range. It is essential to evaluate operation at both the highest and lowest junction temperatures anticipated for the particular application.

9.2.2 Blocking Voltage

If the IGBT is in the conducting state and the gate of the IGBT is taken below threshold, current flow within the device ceases and the IGBT enters the forward blocking state. In the blocking state, the device is required to block a large (negative) with minimal leakage. This large is supported by the reverse-biased CB junction whose depletion region extends primarily into the lightly-doped base, as shown in Figure 9.19a. However, the depletion region in the base cannot be allowed to penetrate to the emitter, because this would constitute punch-through, and a large current would flow. The diagram on the left shows the electric field just at the onset of punch-through. The emitter-collector voltage is the area under the electric field profile, and this represents the maximum blocking voltage of the device. In the asymmetrical structure in Figure 9.19b, a thin buffer layer is inserted between the base and the emitter, making the electric field profile trapezoidal. Assuming the peak field is equal to the critical field in both cases, the asymmetrical IGBT has a larger area under the electric field profile than the symmetrical IGBT. This results in a higher forward blocking voltage for the same base thickness (of course, to achieve the trapezoidal profile, the base doping in the asymmetrical case will be lower than in the symmetrical structure for the same base thickness).

As is the case with the power MOSFET, the blocking voltage can also be limited by the field in the gate oxide. This can be seen by reference to the cross-section in Figure 9.11. If the gate is at ground potential and the emitter is at a large negative voltage, a depletion region will be present under the gate oxide over the JFET region (center of the drawing in Figure 9.11). As becomes more negative, the depletion region expands, and the electric field at the oxide/semiconductor interface approaches , the critical field for avalanche breakdown. By Gauss' law, the electric field in the oxide is related to the semiconductor surface field by the ratio of the dielectric constants, Equation 8.80. For on SiC, this ratio is approximately 2.6, meaning the oxide field is 2.6 times higher than the semiconductor field. In SiC, is in the range for dopings of , so the oxide field will be approximately . As discussed in Section 8.2.11, the field in must typically be kept below about to prevent gradual degradation of the oxide and premature device failure. Therefore, the blocking voltage of the IGBT is the largest value of that does not cause avalanche breakdown in the CB junction and maintains the oxide field below .

As with all power devices, the maximum blocking voltage of the IGBT is usually limited by field crowding at the edges of pn junctions. This can be mitigated by the use of edge terminations, as will be discussed in Section 10.1. The designer can also take advantage of two-dimensional effects to increase the blocking voltage, such as when pn junctions are used to shield the oxide from high electric fields. In the IGBT, this is accomplished by reducing the spacing between collector regions, that is, by reducing the JFET width in Figure 9.11. This allows field lines to terminate on the grounded collectors rather than penetrate the oxide to the grounded gate, thereby reducing the oxide field. However, this must be balanced against the increase in on-resistance of the narrower JFET channel. In all such cases, accurate analysis involves two-dimensional effects that require computer solutions.

9.2.3 Switching Characteristics

A major consideration with IGBTs is the transient power dissipated during the switching event or the switching loss. The problem is particularly acute during the turn-off transient, due to the large minority carrier charge that must be removed when the device is turned off.

The switching power is proportional to the frequency of switching events and the energy dissipated per event, as shown by Equation 7.15. Equation 7.16 expresses the switching energy as the sum of the energy dissipated during the turn-off transient and during the turn-on transient . In the IGBT the turn-on energy loss is small, and we will therefore concentrate on the turn-off loss.

During on-state operation, the thick base region of the BJT is flooded with holes and electrons, and operates in high-level injection. The total charge stored in the base is given by Equation 9.101. When the gate is taken below threshold, the MOSFET no longer supplies holes to the base of the BJT, but the holes already stored in the base continue to undergo recombination until they are all removed. Since the base current is equal to the total recombination current in the base, we can regard these stored holes as a source of base current. The turn-off transient is therefore intimately related to the time required for all the stored holes to recombine. Since for charge neutrality, and since by the law of the junction, the presence of holes will keep the EB junction forward biased, and current will continue to flow through the BJT portion of the IGBT until all the holes have been removed. We will now consider the transient removal of holes in more detail.

To illustrate the different phases of the turn-off transient, we consider an IGBT whose base width is large compared to the ambipolar diffusion length [3, 4]. Figure 9.20 shows the cross-section of the device to be examined, which is driving a clamped inductive load, represented here by a current source. The IGBT base is thick and doped , resulting in a theoretical plane-junction breakdown of 25 kV. The ambipolar diffusion length in the base is , so . The IGBT incorporates a p-type current spreading layer (CSL), similar to the advanced double-diffused metal-oxide-semiconductor field effect transistor (DMOSFET) of Section 8.2.7. The clamped inductive load circuit is modeled by a 50 A current source with a clamping voltage of 12 kV, and the device active area is assumed to be .

Figure 9.21 shows simulated current and voltage waveforms at 175 °C during the turn-off transient. At the gate voltage is switched from to 0 V. The turn-off transient begins at , and consists of four phases, labeled . We will discuss each phase in more detail below. We notice that the current remains constant at as the emitter voltage rises to . The instantaneous power dissipated in the device is the product of the current and voltage waveforms. The total switching energy is the integral of the instantaneous power, represented by the shaded region in the figure. The peak power dissipation is about occurring at , and the total switching energy is .

We will now discuss each phase of the transient. Figure 9.22 shows the electron density in the base and buffer layer as a function of time during the transient. In time period the emitter voltage rises rapidly. During this period the electron density in the portion of the base closest to the collector falls rapidly, and by the base is depleted to a distance of from the collector junction. The reverse voltage across the collector junction is the integral of the electric field, which is shown in Figure 9.24. The base-collector voltage at is approximately .

In time period the emitter voltage rises more slowly. This can be understood as follows. The emitter current is held constant at by the current source, and the base current is given by . During time period the neutral base becomes progressively narrower, and by the end of the neutral base width is approximately equal to the diffusion length . The dependence of on base width is given by Equation 9.100 and plotted in Figure 9.18. We see that when is large compared to the diffusion length, is constant, but as drops below the diffusion length, rises rapidly. If increases but remains constant, must decrease. Recall that represents the total recombination in the base. So during time period , is increasing and the recombination current is decreasing. As a result, the charge density in the base decreases more slowly and the depleted portion of the base expands more slowly. This results in a slower increase in (and ), as seen in Figure 9.21. By the end of at , the base is completely depleted (Figure 9.22b) and the electric field profile is shown in Figure 9.23. The BC voltage at is approximately .

During time period the emitter voltage rises rapidly as the depletion region penetrates the more heavily doped buffer layer. The electric field profile is now trapezoidal, as shown in Figure 9.23. Because the doping in the buffer layer is high, the electric field in the base increases rapidly as the depletion region spreads into the buffer layer, and and rise rapidly.

By , the integral of the electric field has reached and the clamping diode becomes forward biased. This is the beginning of time period . During this period the forward-biased diode clamps the emitter voltage at , and the emitter current falls as the remaining electrons and holes recombine. The emitter current is proportional to the slope of the electron density in the buffer layer, and Figure 9.22d shows this slope gradually decreasing as the last electrons and holes recombine. The 50 A current is increasingly carried by the clamping diode, and the IGBT eventually turns off.

We now consider how the stored charge, instantaneous power, and switching energy are affected by the lifetimes in the base and the buffer layer. Carrier lifetimes are a strong function of temperature, as will be discussed below. The lifetime values we will quote are room-temperature lifetimes, even though all simulations are conducted at 175 °C. The upper portion of Figure 9.24 shows that as the drift region (base) lifetime is increased from 1 to , the stored charge increases slightly and the turn-off time also increases slightly. However, the strongest effect comes from the lifetime in the buffer layer, as shown in the lower portion of Figure 9.24. As the buffer lifetime is decreased from 500 to 20 ns, the stored charge drops dramatically and the turn-off transient becomes much shorter. When the lifetime falls below about 100 ns, the ambipolar diffusion length in the buffer becomes shorter than the buffer layer thickness, and an increasing fraction of the injected electrons recombine in the buffer layer before reaching the drift layer. Consequently, the stored charge decreases, shortening the turn-off time. Of course, less stored charge means less conductivity modulation of the drift region, and the on-state power dissipation is higher.

How can we evaluate the trade-off between switching loss and on-state loss as we vary the lifetimes? This can be done using the procedure described in Section 7.1.3. The total power dissipation, including on-state loss and switching loss, depends on the on-state current density and switching frequency, and is given by Equation 7.17. The total power dissipation is set equal to the package power limit, say , and Equation 7.17 is solved by iteration at each frequency to determine the on-state current that produces a power dissipation equal to the package limit. This gives us a plot of maximum current density versus frequency. We then repeat this procedure for different assumed values of buffer layer and drift layer lifetimes, and the results for the example device at a junction temperature of 175 °C are shown in Figure 9.25 [4]. Here we see that increasing the base lifetime leads to a higher maximum current at low switching frequencies, where switching loss is less important, but the maximum current falls rapidly with frequency, since switching loss is proportional to frequency. The maximum current of an optimized DMOSFET with the same theoretical blocking voltage is shown for comparison. The MOSFET maximum current is almost independent of frequency, since the MOSFET switching energy is low. Figure 9.25 also shows that decreasing the buffer lifetime from 500 to 20 ns increases the maximum current. This is because of the drastically reduced switching loss associated with the reduced charge storage shown in Figure 9.24. Comparing the p-channel IGBT and the n-channel MOSFET at the specified blocking voltage and temperature, we conclude that the IGBT is superior at switching frequencies below 0.5–1 kHz, while the MOSFET is superior at frequencies above 0.5–1 kHz.

9.2.4 Temperature Dependence of Parameters

Almost all our critical device parameters are functions of temperature, and their variation has a strong influence on device performance. Table 9.1 gives equations for several important 4H-SiC parameters as functions of absolute temperature and doping density (where applicable).

Parameter	Equation	Units
Electron mobility
Hole mobility
Ambipolar lifetime
Ionized donor density
Ionized acceptor density
Bandgap energy		eV

Figure 9.26 shows the ambipolar diffusion coefficient, ambipolar lifetime, and ambipolar diffusion length in lightly-doped 4H-SiC as a function of temperature. For comparison, the electron mobility is also shown. The ambipolar diffusion coefficient decreases with temperature due to increased phonon scattering, but this is more than compensated by the increase in lifetime with temperature. As a result, the diffusion length increases slightly with temperature. This makes the on-state performance of the IGBT almost independent of temperature. By comparison, the power MOSFET on-resistance degrades significantly with temperature, since the decreasing electron mobility increases the resistance of the unmodulated drift region. This is the reason why the performance comparison in the last section was conducted at 175 °C.