Configuration management
In this chapter, we provide an overview of the configuration management requirements for Parallel Sysplex using InfiniBand (PSIFB) links.
We discuss the following topics:
•Configuration overview
•PSIFB link support
•Sample configuration with PSIFB links
•Defining your configuration to the software and hardware
•Cabling documentation considerations
•Dynamic reconfiguration considerations
•CHPID Mapping Tool support
6.1 Configuration overview
Figure 6-1 represents a basic roadmap to follow to help establish a typical PSIFB link configuration.
Figure 6-1 PSIFB configuration roadmap
Document your planned PSIFB link environment so that all physical and logical connections can be easily and concisely referenced. The resulting documentation will ensure a smooth setup of your configuration and will also be a beneficial reference for problem determination purposes, if needed. As we go through this chapter, you will see an example of our use of such documentation.
6.2 PSIFB link support
In this section, we describe the configuration support and options that are available for PSIFB links.
6.2.1 PSIFB connectivity options
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Note: The definition of PSIFB links in hardware configuration definition (HCD) and input/output configuration program (IOCP) does not differentiate between the various PSIFB link types. A CHPID that is assigned to any type of PSIFB link is defined simply as “CIB”.
Additionally, HCD does not differentiate between a z196 at Driver Level 86 and one at a later level.
It is important to remember this because different PSIFB features (HCA3 versus HCA2 and 1X versus 12X) have different characteristics as follows:
•The number of available ports
•The number of available link buffers
•Different performance characteristics
•Use different types of cables
Because HCD does not know the capability of the processor, it is unable to verify that the definitions that you provide are accurate. For further details, see 6.4.2, “Defining PSIFB links using HCD” on page 164.
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PSIFB link
A PSIFB link is a coupling link that connects a z/OS logical partition to a Coupling Facility (CF) logical partition through a port on a host channel adapter (HCA) using a physical cable to a compatible adapter on a different processor (see Figure 6-2).
Figure 6-2 PSIFB link between two System z processors
InfiniBand links can be used for coupling z/OS LPARs to CF LPARs, CF LPARs to other CF LPARs (coupling links), or for use solely by STP (timing-only links). In all cases, the links are defined as a channel path type of CIB. The specifics of defining both coupling and timing-only links are described in 6.4, “Defining your configuration to the software and hardware” on page 161.
6.3 Sample configuration with PSIFB links
In this section, we reference a sample Parallel SyspIex configuration that exploits PSIFB links, and describe the process to define it. Figure 6-3 shows the processors and PSIFB links in this configuration. The sections that follow describe the connectivity details and steps that are required to define the different types of PSIFB link.
Figure 6-3 Sample configuration with PSIFB links
The configuration shown in Figure 6-3 reflects the following information:
•Each PSIFB link is attached to a PORT on an HCA adapter (that is identified by an AID).
•Multiple CHPIDs can be assigned to each link.
•Multiple sysplexes can be using each link. The link can be shared across sysplexes by assigning multiple CHPIDs to the link and having the different sysplexes using different CHPIDs. Although the link can be shared by multiple sysplexes, CF link CHPIDs can only be shared by systems in the same sysplex1.
•There cannot be more than one Coupling Facility in the access list of a given CHPID.
•If an HCA3-O (12X) port is connected to another HCA3-O (12X) port, both IFB and IFB3 modes are possible. IFB3 mode is used when four or less CHPIDs are assigned to the port. IFB mode is used if more than four CHPIDs are assigned to the port.
•All PSIFB links shown are coupling links. No timing-only links exist in this configuration because all three processors contain a Coupling Facility and all processors are connected by coupling links with a CF connected to at least one end of each link. Timing-only links cannot be defined between a pair of processors if there are existing coupling links already defined between those processors.
AID and port assignments
AID information is found in the PCHID report for a processor. Example 6-1 contains the report for the processors in this configuration.
Example 6-1 PCHID reports for sample configuration
PCHID report for System IB012097
CHPIDSTART
16177822 PCHID REPORT Jun 10,2011
Machine: 2097-E12 SN1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Source Cage Slot F/C PCHID/Ports or AID Comment
06/D5 A25B D506 0163 AID=0A
06/D6 A25B D606 0163 AID=0B
06/D7 A25B D706 0168 AID=0C
06/D8 A25B D806 0168 AID=0D
PCHID report for System IB022817
CHPIDSTART
16177867 PCHID REPORT Jun 10,2011
Machine: 2817-M15 SN1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Source Cage Slot F/C PCHID/Ports or AID Comment
06/D5 A25B D506 0171 AID=0A
06/D6 A25B D606 0171 AID=0B
06/D7 A25B D706 0170 AID=0C
06/D8 A25B D806 0170 AID=0D
PCHID report for System IB032818
CHPIDSTART
16177909 PCHID REPORT Jun 10,2011
Machine: 2818-M10 SN1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Source Cage Slot F/C PCHID/Ports or AID Comment
A26/D1 A26B D1 0171 AID=00
A26/D8 A26B D8 0170 AID=03
A21/D1 A21B D1 0171 AID=08
A21/D8 A21B D8 0170 AID=0B
Mapping CIB CHPIDs for availability across the fanouts and ports
Map the CIB CHPIDs across the available books, fanouts, and ports for optimum availability at both ends of the PSIFB link.
This is a manual process, because the CHPID Mapping Tool does not perform this mapping for you. You must be careful to avoid any single points of failure within your configuration by ensuring that systems and sysplexes are mapped across multiple fanouts and ports. Table 6-1 reflects a sample configuration. It helps you see how many CHPIDs are assigned to each port, how many adapters are being used by each sysplex, and which sysplexes will be impacted if you were to make a change to any given port.
Table 6-1 System CHPID assignments across IFB fanouts and ports
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System
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Fanout type
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Adapter ID
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PORT
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PROD sysplex CHPIDs
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DEV sysplex CHPIDs
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IB022817
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HCA3-O LR
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0A
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1
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00
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|
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2
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20
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50
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|||
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3
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01
|
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|||
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4
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30
|
|
|||
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HCA3-O LR
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0B
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1
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02
|
|
|
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2
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21
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51
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|||
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3
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03
|
|
|||
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4
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31
|
|
|||
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HCA3-O
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0C
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1
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40
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60
|
|
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2
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70
|
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|||
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HCA3-O
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0D
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1
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41
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61
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|
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2
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71
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Although the CHPID Mapping Tool does not perform this mapping for you, it does provide a validation capability where single points of failure are highlighted in the form of intersects. For further details, see 6.8, “CHPID Mapping Tool support” on page 183.
Overdefining CIB links
Because stand-alone Coupling Facilities do not support dynamic configuration changes, adding PSIFB CHPIDs to a stand-alone CF requires one of the following:
•Installing and defining the adapters and CHPIDs in advance (when the processor is initially installed, for example).
•Shutting down all CF LPARs on the processor and performing a POR when the adapters or CHPIDs are added. This means an outage for those CFs.
If you have a business need to avoid any type of planned outage, you might decide to install the adapters and CHPIDs in advance. Prior to APAR OA29367, you had to install and define the adapter and CHPIDs on both the CF and the z/OS processors because it is not possible to build a production input/output definition file (IODF) that contains unconnected CIB CHPIDs.
However, APAR OA29367 delivered the ability to specify an AID of an asterisk (*). This means that you can:
•Install the adapter on the CF processor.
•Define the CIB CHPIDs on the CF processor, pointing to the actual AID and port.
•Define CIB CHPIDs on the z/OS processor, pointing to the placeholder AID of *.
•Connect the CHPID on the CF processor to the CHPID on the z/OS processor.
This allows you to build and activate a production IODF. Then, in the future when you need the additional capacity, you install the adapter on the z/OS processor, update HCD to replace the * with the actual AID, build the new production IODF, and activate that IODF. You can then immediately use the new links to communicate with the CF without having to take an outage on the CF.
For more information about this capability, see the APAR documentation or z/OS Hardware Configuration Definition User’s Guide, SC33-7988.
Documenting your target environment
At this point, you probably have a diagram that shows at a high level the InfiniBand connectivity that you plan to implement between your processors (including the number and type of physical links, the number of CHPIDs you want to assign to each AID and port, and which LPARs will be in the access lists for those CHPIDs).
Now translate that diagram into a table similar to that shown in Figure 6-4. Taking a few minutes to do this now will make it much easier to add the definitions in HCD or HCM, and reduce any errors or omissions that might arise during that process.
Figure 6-4 Sample configuration table
6.4 Defining your configuration to the software and hardware
You are now ready to define your target InfiniBand infrastructure in an IODF and an IOCDS. We first describe the input/output configuration program (IOCP) statements that are related to InfiniBand links, and then lead you through the process of using HCD to define your configuration.
6.4.1 Input/output configuration program support for PSIFB links
IOCP statements are typically built using HCD or the Hardware Configuration Manager (HCM).
For full details of the rules and limitations related to defining InfiniBand links using IOCP statements, refer to the Input/Output Configuration Program User’s Guide for your processor, available on the web at the following site:
CHPID type CIB (Coupling over InfiniBand)
The CHPID type CIB is used to identify a Coupling over InfiniBand channel path. CIB CHPIDs can be defined as dedicated (DED), reconfigurable (REC), shared (SHR), or spanned (SPAN). The high-level configuration guidelines for CIB CHPIDs are:
•You do not specify a Physical Channel ID (PCHID) for a CIB CHPID. For InfiniBand CHPIDs, instead of specifying a PCHID, the adapter ID (AID) and PORT are specified.
•A spanned CIB CHPID requires that you specify the same AID and PORT for all channel subsystems where it is defined.
•You can assign up to 16 CIB CHPIDs to the same AID. This configuration is verified at the adapter level, which means that you can potentially assign all 16 CIB CHPIDs to one port.
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Note: Even though HCD and IOCP allow this, it is best to assign no more than four CHPIDs per port for optimum throughput. Assigning more than four CHPIDs has further implications for HCA3-O (12X) fanouts, where the less efficient IFB mode will be used instead of IFB3 mode if more than four CHPIDs are assigned to that port.
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•You can combine CIB, CBP, CFP, and ICP CHPID types to the same control unit (CF image), up to the maximum of eight paths per CU.
•All CIB CHPIDs on a single control unit must have the same connecting system (CSYSTEM) specified (this is handled automatically by HCD or HCM).
•You can only connect a CIB CHPID to another CIB CHPID.
•All CIB CHPIDs defined in the IODF must be connected to another CIB CHPD before a production input/output definition file (IODF) can be built. Any attempt to build either a production or validated work IODF with unconnected CIB CHPIDs results in a message similar to that shown in Figure 6-5.
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Message List
Save Query Help
--------------------------------------------------------------------------
Row 1 of 8
Command ===> ___________________________________________ Scroll ===> CSR
Messages are sorted by severity. Select one or more, then press Enter.
/ Sev Msg. ID Message Text
_ E CBDG432I CIB channel path 0.88 of processor IB032818 is not
# connected. It must be connected to a channel path of
# type CIB.
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Figure 6-5 Error message for unconnected CIB CHPID when trying to build a validated work IODF
•Any processor with CIB channel path must have a local system name (LSYSTEM). This value is defined in the processor definition panel in HCD. For further details, see “LSYSTEM” on page 162.
Adapter ID (AID)
The adapter ID (AID) identifies the host channel adapter (HCA) that the CHPID is to be associated with. This value is in the range of 00 through 1F (for processor-specific details, see 2.4, “Adapter ID assignment and VCHIDs” on page 26). Adapter IDs are assigned when the processor is configured. AIDs are listed in the PCHID report that is provided by your IBM service support representative (IBM SSR) when the HCA is ordered. They are also available on the SE panels after the adapters have been installed.
PORT
This specifies the port number (1-4) on the HCA.
LSYSTEM
LSYSTEM specifies the system name of the processor. It is an alphanumeric value of 1-8 characters and can begin with either an alphabetic character or a numeric character.
All alphabetic characters are automatically folded to uppercase. If the processor definition in HCD does not contain a value for LSYSTEM, HCD will default to the CPC name that is specified for the Processor. The HCD panel where the LSYSTEM name is specified is shown in Figure 6-6. In this example, the LSYSTEM name is IB01CPC. If the LSYSTEM field is left blank, an LSYSTEM name of 2097E123 (from the CPC name field) will be assigned.
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Change Processor Definition
Specify or revise the following values.
Processor ID . . . . . . . . : IB012097
Support level:
XMP, 2097 support
Processor type . . . . . . . . 2097 +
Processor model . . . . . . . E12 +
Configuration mode . . . . . . LPAR +
Serial number . . . . . . . . __________ +
Description . . . . . . . . . ________________________________
Specify SNA address only if part of an S/390 microprocessor cluster:
Network name . . . . . . . . . ABCD1234 +
CPC name . . . . . . . . . . . 2097E123 +
Local system name . . . . . . IB01CPC
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Figure 6-6 Defining the local system name
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Note: Use a name for LSYSTEM that will carry over from one processor to its replacement, instead of accepting the default of the CPC name, for the following reason:
If the LSYSTEM parameter is changed (because of a CPC upgrade of z10 to z196, for example) the systems at the other end of the PSIFB connections might need a dynamic activate or a power-on reset (for a stand-alone CF) to pick up the new LSYSTEM name. If the LSYSTEM statement remains unchanged from its original value, then this is not necessary. The LSYSTEM name is only used in relation to CF link CHPIDs, so using an LSYSTEM name that is different from the CPC name should not cause any confusion.
For more details, see the latest version of the Solution Assurance Product Review (SAPR) guide. This is available to your IBM representative from Resource Link at:
The SAPR guides are listed under “Mainframes” on the Library page.
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CSYSTEM
CSYSTEM is used to identify the connected system. It is the LSYSTEM name of the processor at the other end of the InfiniBand link. HCD will automatically provide the CSYSTEM name, based on the specific CIB CHPIDs that are being connected.
CPATH
CPATH specifies the Channel SubSystem (CSS) ID and CHPID on the connected system. This is handled by HCD.
6.4.2 Defining PSIFB links using HCD
In this section, we describe the steps necessary to define PSIFB links between two processors called IB012097 (a z10) and IB022817 (a z196) using HCD. For the purpose of this illustration, we only show the process of defining the links on IB022817. The links have already been defined on IB012097.
Defining the CIB CHPIDs
To define the CIB CHPIDs:
1. From the HCD main menu, select option 1.3 and press Enter. This option takes you to the Processor List panel as shown in Figure 6-7.
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Processor List Row 1 of 3 More: >
Command ===> _______________________________________________ Scroll ===> PAGE
Select one or more processors, then press Enter. To add, use F11.
/ Proc. ID Type + Model + Mode+ Serial-# + Description
_ IB012097 2097 E12 LPAR __________ ________________________________
s IB022817 2817 M15 LPAR __________ ________________________________
_ IB032818 2818 M10 LPAR __________ ________________________________
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Figure 6-7 HCD Processor List panel
2. In the processor list, select the processor that you want to work with (in our case, IB022817) by entering s to the left of the Processor ID. Enter s to work with the channel subsystems for this processor, as shown in Figure 6-8.
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Channel Subsystem List Row 1 of 4 More: >
Command ===> _______________________________________________ Scroll ===> PAGE
Select one or more channel subsystems, then press Enter. To add, use F11.
Processor ID . . . : IB022817
CSS Devices in SS0 Devices in SS1 Devices in SS2
/ ID Maximum + Actual Maximum + Actual Maximum + Actual
s 0 65280 0 65535 0 65535 0
_ 1 65280 0 65535 0 65535 0
_ 2 65280 0 65535 0 65535 0
_ 3 65280 0 65535 0 65535 0
******************************* Bottom of data *******************************
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Figure 6-8 Channel Subsystem List
Specify s for the appropriate CSS ID (0 in our example in Figure 6-8) and press Enter to display the Channel Path List for this processor.
3. From the Channel Path List, press PF11 to add a CHPID, as shown in Figure 6-9.
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Add Channel Path
Specify or revise the following values.
Processor ID . . . . : IB022817
Configuration mode . : LPAR
Channel Subsystem ID : 0
Channel path ID . . . . 20 + PCHID . . . ___
Number of CHPIDs . . . . 1
Channel path type . . . cib +
Operation mode . . . . . shr +
Managed . . . . . . . . No (Yes or No) I/O Cluster ________ +
Description . . . . . . HCA3-1X IB02 PROD CHP20 TO IB01
Specify the following values only if connected to a switch:
Dynamic entry switch ID + (00 - FF)
Entry switch ID . . . . __ +
Entry port . . . . . . . __ +
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Figure 6-9 Adding a CIB channel path
On the Add Channel Path panel, enter the appropriate details:
•Channel path ID (20 in our configuration)
•Channel path type (CIB for a Coupling over InfiniBand CHPID)
•Operation mode (SHR in our configuration)
•Description (optional, but highly advisable)
Then, press Enter.
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Notes:
•The PCHID field is invalid for a CIB CHPID, so that field should be left blank.
•Because PSIFB links allow for multiple logical connections, configuration details can be complex and difficult to interpret. We strongly advise adding (and maintaining) useful details (such as the link type and the sysplex that will use that CHPID) in the description field.
•HCD does not distinguish between the different InfiniBand features. Additionally, if the processor you are working with is a z196 or a z114, HCD is unaware of the capability of that processor. A CHPID type of CIB can be an HCA2 or HCA3 fanout, which can be either 12X or 1X. This means that a PSIFB 12X fanout on a z196 or z114 can be incorrectly defined as having four ports (because four ports are supported for HCA3-O LR (1X) links) and HCD will not be aware that the definition is invalid.
Be careful to cross-reference your CHPID definitions against your PCHID report to ensure that your CHPID definitions correctly match the available AIDs and ports of your configured HCA fanouts. This is the process described in “Mapping CIB CHPIDs for availability across the fanouts and ports” on page 159.
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4. The next panel (Figure 6-10) requires the details of the HCA attributes for this CHPID. This detail was established in the mapping exercise that we performed earlier (see Table 6-1 on page 160).
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Specify HCA Attributes
Specify or revise the values below.
Adapter ID of the HCA . . 0A +
Port on the HCA . . . . . 2 +
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Figure 6-10 Defining Adapter ID and Port assignments
Type the Adapter ID and Port number and press Enter.
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Define Access List
Row 1 of 2
Command ===> _________________________________________ Scroll ===> PAGE
Select one or more partitions for inclusion in the access list.
Channel subsystem ID : 0
Channel path ID . . : 20 Channel path type . : CIB
Operation mode . . . : SHR Number of CHPIDs . . : 1
/ CSS ID Partition Name Number Usage Description
/ 0 IB02CF1 2 CF
/ 0 IB02OS1 1 OS
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Figure 6-11 Channel Path Access List
5. The Define Access List panel appears as shown in Figure 6-11. Specify the forward slash character (/) for each LPAR that is to be in the access list. In our configuration, both of the production LPARs in CSS0 are included.
6. Press Enter and add any additional LPARs to the Candidate List for this CIB channel (none in our case) until the Channel Path List for this CSS ID appears as shown in Figure 6-12, which shows the unconnected CIB CHPID on IB022817.
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Channel Path List Row 1 of 1 More: >
Command ===> _______________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter. To add use F11.
Processor ID . . . . : IB022817
Configuration mode . : LPAR
Channel Subsystem ID : 0
PCHID Dyn Entry +
/ CHPID AID/P Type+ Mode+ Sw+ Sw Port Con Mng Description
f 20 0A/2 CIB SHR __ __ __ N No HCA3-1X IB02 PROD CHP20 TO IB01
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Figure 6-12 Channel Path list with unconnected CIB CHPID 20
Connecting the CIB CHPIDs
In this section, the CIB CHPIDs are connected together.
At this stage, we have defined the CIB CHPIDs at either end of the PSIFB link. However, we cannot use the CIB CHPIDs until they have been connected and the subchannels have been generated. Furthermore, an attempt to build a production IODF will fail if there are unconnected CIB CHPIDs. To connect the CIB CHPIDs, do the following:
1. Return to the Channel Path List of either of the associated processors as shown in Figure 6-12 on page 166. Specify f next to the associated CHPID and press Enter to display the CF Channel Path Connectivity List as shown in Figure 6-13.
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CF Channel Path Connectivity List Row 1 of 1
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB022817
Source channel subsystem ID . : 0
Source partition name . . . . : *
--------Source-------- ---------Destination--------- -CU- -#-
/ CHPID CF Type Mode Occ Proc.CSSID CHPID CF Type Mode Type Dev
p 20 Y CIB SHR N
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Figure 6-13 CF Channel Path Connectivity List with unconnected CIB CHPID 20
2. Enter p next to the associated CHPID to display the Channel Path Connection panel shown in Figure 6-14.
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Connect to CF Channel Path
Specify the following values.
Source processor ID . . . . . : IB022817
Source channel subsystem ID . : 0
Source channel path ID . . . . : 20
Source channel path type . . . : CIB
Destination processor ID . . . . . . IB012097 +
Destination channel subsystem ID . . 0 +
Destination channel path ID . . . . 20 +
Timing-only link . . . . . . . . . . No
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Figure 6-14 Channel Path Connection panel
On the Connect to CF Channel Path panel, type in the following information:
– Destination processor ID (IB012097 in our configuration)
– Destination channel subsystem ID (0 in our configuration)
– Destination channel path ID (20 in our configuration)
Because this is not a timing-only link, accept the default “Timing-only link” value of No.
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Tip: The use of function key F4 is useful here to prompt for the input to these fields.
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3. Press Enter to display a confirmation panel that includes the Control Unit number and the number of devices that are to be generated as a result of the operation (see Figure 6-15).
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Add CF Control Unit and Devices
Confirm or revise the CF control unit number and device numbers
for the CF control unit and devices to be defined.
Processor ID . . . . . . . : IB012097
Channel subsystem ID . . . : 0
Channel path ID . . . . . : 20 Operation mode . . : SHR
Channel path type . . . . : CIB
Control unit number . . . . FFFE +
Device number . . . . . . . FFF9
Number of devices . . . . . 7
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Figure 6-15 Channel path connection confirmation panel
HCD selects the highest unused control unit and device number, although you can override these numbers if you prefer.
This panel also proposes a value for the number of “devices” to be generated, based on the processor types being connected. Note that this value determines the number of subchannels that will be generated in z/OS for this control unit. The number of link buffers in the hardware is controlled by the hardware Driver level, not by HCD.2
It might be necessary to change this value to accurately reflect your configuration. The correct number to specify for various combinations of processors is shown in Table 6-2. Note that 12X links should always be defined with 7 devices. It is only 1X links that support 32 devices in certain situations.
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Note: Even though 1X links now support 32 subchannels, you should only specify 32 subchannels for links that will span sites. If the connected systems are in the same site, specify 7 subchannels.
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Table 6-2 Number of subchannels for 1X links
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|
z10
|
z196 Driver 86
|
z196 Driver 93
|
z114
|
zEC12
|
zBC12
|
|
z10
|
7
|
7
|
7
|
7
|
7
|
7
|
|
z196 Driver 86
|
7
|
7
|
7
|
7
|
7
|
7
|
|
z196 Driver 93
|
7
|
7
|
7 or 32
|
7 or 32
|
7 or 32
|
7 or 32
|
|
z114
|
7
|
7
|
7 or 32
|
7 or 32
|
7 or 32
|
7 or 32
|
|
zEC12
|
7
|
7
|
7 or 32
|
7 or 32
|
7 or 32
|
7 or 32
|
|
zBC12
|
7
|
7
|
7 or 32
|
7 or 32
|
7 or 32
|
7 or 32
|
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Note: Our PSIFB link connects a z196 and a z10 EC. This combination of processors supports a maximum of seven devices (subchannels) because a z10 EC does not support more than seven subchannels for a PSIFB link. HCD will not allow any other value to be specified for this link definition.
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4. Press Enter to complete the operation, and the CF Channel Path Connectivity List is redisplayed (see Figure 6-16). The CF Channel Path Connectivity List panel now displays our new CHPIDs in connected status.
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CF Channel Path Connectivity List Row 1 of 1
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB022817
Source channel subsystem ID . : 0
Source partition name . . . . : *
--------Source-------- ---------Destination--------- -CU- -#-
/ CHPID CF Type Mode Occ Proc.CSSID CHPID CF Type Mode Type Dev
_ 20 Y CIB SHR N IB012097.0 20 N CIB SHR CFP 7
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Figure 6-16 CF Channel Path Connectivity List with connected CIB CHPIDs
The PSIFB link definition is now complete.
Connecting PSIFB links between z196 and later processors
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Important: Prior to APAR OA36617, the default number of subchannels provided by HCD for all PSIFB CHPIDs was 32; 32 subchannels should only be used for extended distance links, so APAR OA36617 changes the default back to 7 subchannels. The examples in this section assume that you have that APAR installed.
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The process to connect CIB CHPIDs between z196 and z10 processors is described in the preceding section. However, there are implications for interconnecting z196 and later processors because the CHPIDs can be defined in HCD with either 32 or 7 subchannels.
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Note: Only PSIFB 1X links (both HCA2-O LR and HCA3-O LR) fanouts have 32 link buffers on z196 and z114 processors when Driver 93 or later is installed. This is intended for extended distance links.
HCD is not aware of the difference between different types of PSIFB links and will allow you to specify either 7 or 32 subchannels for any PSIFB CHPID on these processor types.
PSIFB 12X links (HCA3-O and HCA2-O) have only seven link buffers available. Specifying 32 subchannels when connecting the CIB CHPIDs might have a detrimental effect for PSIFB 12X links because 32 z/OS subchannels will be competing for seven link buffers.
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With z196 and later processors at Driver level 93 or later, PSIFB 1X CHPIDs (either HCA3-O LR or HCA2-O LR fanout) have 32 link buffers. When defining these CHPIDs in HCD, specify 32 subchannels for optimal performance if the connected CPCs are in different sites. If the connected CPCs are in the same site, specify 7 subchannels.
When defining a PSIFB 12X link between IB022817 and IB032818, we are presented with the default of 7 subchannels as shown in Figure 6-17.
|
Add CF Control Unit and Devices
Confirm or revise the CF control unit number and device numbers
for the CF control unit and devices to be defined.
Processor ID . . . . . . . : IB022817
Channel subsystem ID . . . : 0
Channel path ID . . . . . : 70 Operation mode . . : SHR
Channel path type . . . . : CIB
Control unit number . . . . FFFD +
Device number . . . . . . . FFD9
Number of devices . . . . . 7
|
Figure 6-17 Connecting z196 and z114 processors: Defining the subchannels
For a PSIFB 12X link (HCA3-O or HCA2-O), accept the default of 7 subchannels to limit the number of subchannels to match the number of link buffers. The resulting definition is shown in Figure 6-18 on page 171.
Also shown is an HCA3-O LR to HCA3-O LR link on CHPID 30 where we have overridden the default of 7 subchannels to show how the CHPID would be defined if the connected CPCs were not in the same site.
|
CF Channel Path Connectivity List Row 1 of 3
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB022817
Source channel subsystem ID . : 0
Source partition name . . . . : *
--------Source-------- ---------Destination--------- -CU- -#-
/ CHPID CF Type Mode Occ Proc.CSSID CHPID CF Type Mode Type Dev
_ 20 Y CIB SHR N IB012097.0 20 N CIB SHR CFP 7
_ 30 Y CIB SHR N IB032818.0 30 Y CIB SHR CFP 32
_ 70 Y CIB SHR N IB032818.0 70 Y CIB SHR CFP 7
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Figure 6-18 PSIFB links and different subchannel definitions
Redefining PSIFB 1X links on z196 processors
An existing CHPID on a z196 processor that is assigned to an HCA2-O LR (PSIFB 1X) adapter will have been defined with seven subchannels prior to the HCD support added for Driver 93.
When a zEnterprise processor is upgraded to Driver 93, 32 link buffers immediately become available for PSIFB 1X links. The prerequisite HCD maintenance for Driver 93 complements this by giving you the ability to specify 32 subchannels when connecting two of these processors together. However, although you automatically get the additional link buffers, you will not automatically get the corresponding additional subchannels unless you update your configuration using HCD.
In the case of extended distance PSIFB 1X links, changing this CHPID definition to provide 32 subchannels is advised. To effect this change, the existing CHPIDs will need to be disconnected (using option n) then reconnected (using option p) from the CF Channel Path Connectivity List (see Figure 6-13 on page 167). Then activate the updated IODF to fully implement the change.
Adding more CHPIDs to an existing PSIFB link
You can configure up to 16 CHPIDs across the available ports on an HCA. However, for systems requiring optimal performance, no more than four CHPIDs per port are recommended.
In this section, we describe the steps to add CHPIDs to an existing PSIFB link. In “Defining the CIB CHPIDs” on page 164, we defined the following CHPIDs for the PROD sysplex:
•IB012097 CHPID 20 on AID 0C, PORT2
•IB022817 CHPID 20 on AID 0A, PORT2
We will now assign additional CHPIDs to those PSIFB links. This will provide connectivity for the DEV sysplex from IB012097 to IB022817.
The same AIDs and PORTs are used to add CHPIDs as follows:
•IB012097 CHPID 50 on AID 0C, PORT2
•IB022817 CHPID 50 on AID 0A, PORT2
The process is identical to the process that we followed for the definition of the original CHPIDs on these AIDs and PORTs:
1. Select the IB012097 processor from the HCD processor list. For reference, see Figure 6-7 on page 164.
3. Define the new CHPID (50 in our example) and add to it AID 0C, PORT2. For reference, see Figure 6-9 on page 165 and Figure 6-10 on page 166.
4. Add the appropriate LPARs to the Access list (as in Figure 6-11 on page 166) and press Enter to return to the CF Channel Path Connectivity List, which will show the new CHPID 50 as unconnected (see Figure 6-19).
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CF Channel Path Connectivity List Row 1 of 4
Command ===> ___________________________________________ Scroll ===> CSR
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB012097
Source channel subsystem ID . : 1
Source partition name . . . . : *
--------Source-------- ---------Destination--------- -CU- -#-
/ CHPID CF Type Mode Occ Proc.CSSID CHPID CF Type Mode Type Dev
_ 50 Y CIB SHR N
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Figure 6-19 CF Channel Path Connectivity List with unconnected CIB CHPID 50
5. Repeat the process to add CHPID 50 in CSS1 to the IB022817 processor.
6. Connect CHPID 50 on IB012097 to CHPID 50 on IB022817 as described in “Connecting the CIB CHPIDs” on page 167.
7. The connected CIB CHPIDs are then displayed on the CF Channel Path Connectivity List, as shown in Figure 6-20.
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CF Channel Path Connectivity List Row 1 of 1
Command ===> ___________________________________________ Scroll ===> CSR
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB022817
Source channel subsystem ID . : 1
Source partition name . . . . : *
--------Source-------- ---------Destination--------- -CU- -#-
/ CHPID CF Type Mode Occ Proc.CSSID CHPID CF Type Mode Type Dev
_ 50 Y CIB SHR N IB012097.1 50 Y CIB SHR CFP 7
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Figure 6-20 CF Channel Path Connectivity List with connected CIB CHPID50
6.4.3 Defining timing-only PSIFB links
In this section, we describe the necessary steps to define a timing-only PSIFB link. A timing-only PSIFB link is required for connectivity in a Coordinated Timing Network (CTN) when exploiting the Server Time Protocol (STP) capability. When there are no coupling links defined between the processors, a timing-only link must be defined to provide the required connectivity.
The process to define the timing-only links is similar to that described in “Defining the CIB CHPIDs” on page 164. The only difference is the specification of “Timing-only Link”, which we override to “Yes.”
Our configuration in Figure 6-3 on page 158 has a Coupling Facility partition in the access list in all examples. This means there is no requirement for timing-only links.
Consider a new scenario that connects two z10 EC processors with only z/OS LPARs: IB042097 CHPIDs 53 and 54 connect to CHPIDs 53 and 54 on IB022097 as timing-only links.
1. Define your new CIB CHPIDs using the process documented in “Defining the CIB CHPIDs” on page 164. When defined, the Channel Path list will reflect the CHPIDs as unconnected. This is shown in Figure 6-21 on page 174.
Note that there must be at least one z/OS LPAR in the access list for the timing-only CHPIDs. However, the CHPID will still be available for use by STP regardless of whether or not those LPARs have been activated.
2. Connect the CIB CHPIDs between processors IB022097 and IB042097 by specifying f next to one of the unconnected CHPIDs, as shown in Figure 6-21.
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Channel Path List Row 1 of 2 More: >
Command ===> _______________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter. To add use F11.
Processor ID . . . . : IB042097
Configuration mode . : LPAR
Channel Subsystem ID : 0
Dyn Entry +
/ CHPID AID/P Type+ Mode+ Sw+ Sw Port Con Mng Description
f 53 08/1 CIB SHR __ __ __ N No HCA2-12X IB04 T/O 53 TO IB02
_ 54 09/1 CIB SHR __ __ __ N No HCA2-12X IB04 T/O 54 TO IB02
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Figure 6-21 Channel Path List with unconnected CHPIDs 53 and 54
This displays the CF Channel Path Connectivity List panel (Figure 6-22).
|
CF Channel Path Connectivity List Row 1 of 2
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB042097
Source channel subsystem ID . : 0
Source partition name . . . . : *
-------Source-------- -----------Destination-------- -CU-
/ CHPID Type Mode Occ Proc.CSSID CHPID Type Mode Type
p 53 CIB SHR N
_ 54 CIB SHR N
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Figure 6-22 CF Channel Path Connectivity List panel
This displays the Connect to CF Channel Path panel (see Figure 6-23).
|
Connect to CF Channel Path
Specify the following values.
Source processor ID . . . . . : IB042097
Source channel subsystem ID . : 0
Source channel path ID . . . . : 53
Source channel path type . . . : CIB
Destination processor ID . . . . . . IB022097 +
Destination channel subsystem ID . . 0 +
Destination channel path ID . . . . 53 +
Timing-only link . . . . . . . . . . Yes
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Figure 6-23 Connect to CF Channel Path panel
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Note: No device numbers are generated or used by a timing-only link, so the Device number field is left blank.
Any attempt to add a value in this field will be rejected as invalid.
|
|
Add CF Control Unit and Devices
Confirm or revise the CF control unit number and device numbers
for the CF control unit and devices to be defined.
Processor ID . . . . . . . : IB042097
Channel subsystem ID . . . : 0
Channel path ID . . . . . : 53 Operation mode . . : SHR
Channel path type . . . . : CIB
Control unit number . . . . FFDA +
Device number . . . . . . . ____
Number of devices . . . . : 0
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Figure 6-24 Channel path connection confirmation panel for timing-only link
4. Pressing Enter completes the connection and returns you to the CF Channel Path Connectivity List. This list will now show the connected PSIFB timing-only link with a control unit (CU) type of STP, as shown in Figure 6-25.
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Goto Filter Backup Query Help
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CF Channel Path Connectivity List Row 1 of 2
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB042097
Source channel subsystem ID . : 0
Source partition name . . . . : *
-------Source-------- -----------Destination-------- -CU-
/ CHPID Type Mode Occ Proc.CSSID CHPID Type Mode Type
_ 53 CIB SHR N IB022097.0 53 CIB SHR STP
_ 54 CIB SHR N
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Figure 6-25 CF Channel Path Connectivity List with connected timing-only link
5. The PSIFB timing-only link definition is now complete for CHPID 53. The same process can now be followed for CHPID 54.
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Note: Ensure that there are two timing links and that they are connected to different HCAs, avoid single points of failure.
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6.4.4 IOCP sample statements for PSIFB links
This section provides a sample set of IOCP statements that define the configuration that is described in Example 6-2.
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Note: Various IOCP statements, such as RESOURCE, have been removed from these examples to improve readability of the PSIFB link detail.
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Sample IOCP for PSIFB links
This sample lists the IOCP statements for the following PSIFB link between processors IB012097 and IB022817:
•IB012097 CHPID 20 on AID 0C, PORT2
•IB022817 CHPID 20 on AID 0A, PORT2
Example 6-2 shows the IOCP statements for each of these processors.
Example 6-2 IOCP for PSIFB Link between IB012097 and IB022817
IOCP Statements from IB012097:
ID MSG1='IB012097', *
MSG2='TRAINER.IODF00.WORK - 2011-06-14 11:50', *
SYSTEM=(2097,1),LSYSTEM=IB01CPC, *
TOK=('IB012097',008002213BD52817115049230111165F00000000*
,00000000,'11-06-14','11:50:49','........','........')
CHPID PATH=(CSS(0),20),SHARED, *
PARTITION=((IB01CFA,IB01OS1),(=)),CPATH=(CSS(0),20), *
CSYSTEM=IB02CPC,AID=0C,PORT=2,TYPE=CIB
CNTLUNIT CUNUMBR=FFFE,PATH=((CSS(0),20,21,40,41)),UNIT=CFP
IODEVICE ADDRESS=(FE42,007),CUNUMBR=(FFFE),UNIT=CFP
IOCP Statements from IB022817:
ID MSG1='IB022817', *
MSG2='TRAINER.IODF00.WORK - 2011-06-14 11:50', *
SYSTEM=(2817,1),LSYSTEM=IB02CPC, *
TOK=('IB022817',008002213BD52817115049230111165F00000000*
,00000000,'11-06-14','11:50:49','........','........')
CHPID PATH=(CSS(0),20),SHARED, *
PARTITION=((IB02CF1,IB02OS1),(=)),CPATH=(CSS(0),20), *
CSYSTEM=IB01CPC,AID=0A,PORT=2,TYPE=CIB
CNTLUNIT CUNUMBR=FFF8,PATH=((CSS(0),20,21,40,41)),UNIT=CFP
IODEVICE ADDRESS=(FE49,007),CUNUMBR=(FFF8),UNIT=CFP
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Note: In Example 6-2, CHPID 20 is one of multiple paths on the generated CNTLUNIT.
Prior to the enhancements of Driver 93, HCD proposed the same CNTLUNIT for all connections from a processor to a target CF LPAR. This allowed a maximum of 224 devices (8 paths x 7 subchannels x 4 CSS).
The enhancements of Driver 93 allow 32 subchannels. This would limit the connections to as little as 2 for the whole processor (2 x 32 subchannels x 4 CSSs) because we are limited to 256 devices per CNTLUNIT.
To resolve this, HCD now proposes a different CNTLUNIT per CSS. This allows 8 connections for each CSS to the target CF LPAR, so you can potentially have more than 8 CHPIDs from one processor to a CF in another processor. However, each z/OS system is still limited to 8 CHPIDs to a given CF.
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Sample IOCP for timing-only PSIFB links
This sample shows the different CNTLUNIT type when defining Timing-only links.
Example 6-3 shows the IOCP statements. Note that the timing-only link is reflected by a CNTLUNIT type of STP for which no devices are generated.
Example 6-3 IOCP reference for a timing-only PSIFB link
CHPID PATH=(CSS(0),53),SHARED, *
PARTITION=((IB02PR03,IB02PR04),(=)),CPATH=(CSS(0),53), *
CSYSTEM=IB042097,AID=1E,PORT=1,TYPE=CIB
CNTLUNIT CUNUMBR=FFD9,PATH=((CSS(0),53,54)),UNIT=STP
6.4.5 Using I/O configuration data to document your coupling connections
Because InfiniBand provides the ability to have multiple logical CHPIDs per physical link, it enables quite complex configurations to be established. The use of I/O configuration data can help you document your InfiniBand infrastructure. The data is presented by CHPID and includes the target path along with control unit and device detail for both sides of the link.
To generate I/O Configuration data, use option 2.10 from the HCD menu as shown in Figure 6-26.
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Build I/O Configuration Data
Specify or revise the following values.
IODF name . . . . . : 'TRAINER.IODF00.WORK'
Configuration type . . 1 1. Processor
2. Operating System
3. Switch
4. FCP Device Data
Configuration ID . . . IB022817 +
Output data set . . . 'TRAINER.IODF00.CONFIG.DATA'________________
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Figure 6-26 Building I/O Configuration Data
The resulting output is placed in the target data set. Sample statements are shown in Figure 6-27.
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ID NAME=IB022817,UNIT=2817,MODEL=M15,MODE=LPAR,LEVEL=H100331, *
LSYSTEM=IB02CPC
CHPID PATH=(CSS(0),31),SHARED, *
PARTITION=((IB02CF1,IB02OS1),(=)), *
TPATH=((CSS(0),IB032818,31,FFFC,FE9E,32),(CSS(0),IB02281*
7,31,FFFD,FEBE,32)), *
DESC='HCA3-1X IB02 PROD CHP31 to IB03',AID=0B,PORT=4, *
TYPE=CIB
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Figure 6-27 Sample I/O Configuration Data
Figure 6-27 shows a sample CHPID connection from the source processor (IB022817) to the target processor (IB032818).
The first half of the TPATH statement contains information about the target processor and the second half provides the equivalent information for the source processor (IB022817 in our example).The parameters on each half of the TPATH statement are:
•The CSS ID (0)
•The processor LSYSTEM name (IB032818)
•The CHPID (31)
•The CNTLUNIT (FFFC)
•The device number of the first device associated with that control unit (FE9E)
•The number of devices (32) in the control unit
Although the statements in Figure 6-27 look similar to IOCP statements, they actually contain additional data that is only intended to be processed by the HCD migration function. For example, TPATH is not an IOCP statement. However, if you prefer, you can use this information to obtain an end-to-end picture of each InfiniBand CHPID. The example also illustrates the importance of documenting each CHPID using the description field; in this example, the description field tells us that CHPID 31 is assigned to a HCA3-O LR adapter and is in use by the PROD sysplex.
6.5 Determining which CHPIDs are using a port
There are two mechanisms to identify the CHPIDs that have been assigned to a given port.
The first one involves using the processor SE. You log on to the SE. Display the channel list for the processor, as shown in Figure 6-28.
As shown, the list displays the VCHID (in the Channel ID column) and the CSS and CHPID (in the CSS.CHPID column). It also shows the cage, slot, and jack and the channel type as defined in HCD. The cage, slot, and jack are the physical location of the AID and port.
Figure 6-28 SE processor channel list
To determine which CHPIDs are associated with a given port, note the cage, slot, and jack of one of the CHPIDs that you know is assigned to that port. Then click the up-arrow beside the Cage-Slot-Jack column heading. This results in the list shown in Figure 6-29.
Figure 6-29 Processor channel list sorted by cage-slot-jack
If we take CHPID 90 in CSS 2 as an example, we can see in Figure 6-28 on page 179 that CHPID is associated with the port that is at cage A25B, slot D706, jack J01. In the sorted version of the list in Figure 6-29, you can see that there are four CHPIDs associated with that cage-slot-jack: CHPIDs 90, 91, 92, and AC, which are all in CSS 2.
The other method for determining which CHPIDs are associated with a given port is to use HCD. In this case, go into HCD and enter the name of the currently-active IODF. Select option 1 (Define, modify, or view configuration data), and then option 3 (Processors).
In the resulting process list, place an s (to work with attached channel paths) beside the processor that you are interested in. In the list of channel subsystems that you are then presented with, place an s (to work with attached channel paths) beside the CSS that you are interested in. See Figure 6-30.
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Goto Filter Backup Query Help
------------------------------------------------------------------------------
Channel Path List Row 1 of 122 More: >
Command ===> _______________________________________________ Scroll ===> CSR
Select one or more channel paths, then press Enter. To add use F11.
Processor ID . . . . : SCZP301
Configuration mode . : LPAR
Channel Subsystem ID : 2
DynEntry Entry +
/ CHPID Type+ Mode+ Switch + Sw Port Con Mngd Description
_ 00 OSD SPAN __ __ __ No Exp3 1KBaseT All LPARs 9.12.4 #1
_ 01 OSC SPAN __ __ __ No Exp3 1KBaseT All LPARs OSC #1
_ 06 OSD SPAN __ __ __ No Exp3 1KBaseT
_ 08 OSD SPAN __ __ __ No Exp3 1KBaseT
_ 09 OSD SPAN __ __ __ No Exp3 1KBaseT Yellow zone
_ 0A OSM SPAN __ __ __ No Exp3 1KBaseT
_ 0B OSM SPAN __ __ __ No Exp3 1KBaseT
_ 0C OSD SPAN __ __ __ No Exp3 1KBaseT All LPARs 9.12.4 #2
_ 0D OSC SPAN __ __ __ No Exp3 1KBaseT All LPARs OSC #2
_ 0E OSD SPAN __ __ __ No Exp3 1KBaseT Yellow zone
_ 10 OSD SPAN __ __ __ No Exp3 GbE SX
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Figure 6-30 Channel list in HCD
In the resulting Channel list (Figure 6-30 on page 181), place the cursor on Filter on the top line and press Enter. Select option 1 to set a filter. The panel shown in Figure 6-31 is displayed.
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Goto Filter Backup Query Help
------------------------------------------------------------------------------
Channel Path List
Command ===> _______________________________________________ Scroll ===> CSR
Sel ------------------------ Filter Channel Path List -------------------------
| |
| |
Specify or revise the following filter criteria.
Channel path type . ___
Operation mode . . . ____ +
Managed . . . . . . _ (Y = Yes; N = No) I/O Cluster ________ +
Dynamic entry switch __ +
Entry switch . . . . __ +
CF connected . . . . _ (Y = Connected; N = Not connected)
PCHID or AID/P . . . 0C/1
Description . . . . ________________________________
Partition . . . . . ________ +
Connected to CUs . . _ (Y = Connected; N = Not connected)
|
Figure 6-31 Setting a channel list filter
In this case, we entered 0C/1, which is the AID and port that CHPID 90 in CSS 2 is assigned to. Pressing Enter displays the panel that is shown in Figure 6-32.
|
Goto Filter Backup Query Help
------------------------------------------------------------------------------
Channel Path List Filter Mode. More: < >
Command ===> _______________________________________________ Scroll ===> CSR
Select one or more channel paths, then press Enter. To add, use F11.
Processor ID : SCZP301 CSS ID : 2
1=A21 2=A22 3=A23 4=A24 5=A25
6=* 7=* 8=A28 9=* A=A2A
B=A2B C=* D=* E=A2E F=A2F
I/O Cluster --------- Partitions 2x ----- PCHID
/ CHPID Type+ Mode+ Mngd Name + 1 2 3 4 5 6 7 8 9 A B C D E F AID/P
_ 90 CIB SHR No ________ _ _ _ _ _ # # _ # _ _ # # a _ 0C/1
_ 91 CIB SHR No ________ _ _ _ _ _ # # _ # _ _ # # a _ 0C/1
_ 92 CIB SHR No ________ _ _ _ _ _ # # _ # _ _ # # a _ 0C/1
_ AC CIB SHR No ________ _ _ _ _ _ # # _ # _ _ # # a _ 0C/1
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Figure 6-32 List of CHPIDs assigned to a specific AID and port
The list shows all the CHPIDs in this CSS that are assigned to the AID and port that you selected. It also shows which partitions are in the access list for those CHPIDs (in this example, partition 2E is in the access list for all these CHPIDs).
Either of these methods can be used to obtain information about the current InfiniBand connectivity. Using the SE has the advantage that you know that the information you are seeing represents the current, active configuration. Also, the SE is likely to be accessible to the operators if they need this type of information, whereas operators typically do not have access to HCD.
6.6 Cabling documentation considerations
You can define multiple CHPIDs for multiple sysplexes across a single PSIFB link. When performing maintenance to the cabling environment, this makes the impact of pulling a cable potentially far more significant than the one-to-one CHPID to PCHID mapping of non-PSIFB links.
The cabling documentation might now also become more complex. In these circumstances, the use of the Hardware Configuration Manager (HCM) can prove useful. This tool provides a Cabling Assignment Dialog for this purpose. For further details, see z/OS Hardware Configuration Manager (HCM) User's Guide, SC33-7989.
6.7 Dynamic reconfiguration considerations
Using dynamic reconfiguration is highly advisable when you make changes to your I/O configuration. This makes changes concurrent, avoiding IPLs or power-on resets of your processor.
At this time, dynamic reconfiguration is not available for stand-alone Coupling Facilities. However, if the impact of emptying a CF LPAR to perform a POR is unacceptable, you can consider defining a small z/OS LPAR on the CF processor whose sole purpose is to drive dynamic reconfigurations on that processor. Note that this requires a CP on that processor (although it does not need to be a powerful one).
6.8 CHPID Mapping Tool support
When planning and configuring a System z processor, you must plan for maximum processor and device availability. The CHPID Mapping Tool (CMT) provides an availability mapping function to assign CHPIDs across control units and to avoid single points of failure. The CHPID mapping tool is available from the IBM Resource Link web site at:
Full documentation is available in the CHPID Mapping Tool, and full usage guidelines are available in IBM zEnterprise 196 Configuration Setup, SG24-7834.
Support for PSIFB links
The CMT provides the capability to identify potential availability exposures attributable to the mapping of CHPIDs across Adapter IDs and PORTs. The process to follow is shown in Figure 6-33.
Figure 6-33 CHPID Mapping Tool process for PSIFB links
The following stages are shown in Figure 6-33:
1. HCD or HCM is used to define and connect the CIB CHPIDs to create the PSIFB links.
2. Before a stand-alone IOCP file can be generated, a validated Work IODF must be generated using HCD option 2.12, as shown in Figure 6-34 on page 185.
|
Activate or Process Configuration Data
Select one of the following tasks.
12 1. Build production I/O definition file
2. Build IOCDS
3. Build IOCP input data set
4. Create JES3 initialization stream data
5. View active configuration
6. Activate or verify configuration
dynamically
7. Activate configuration sysplex-wide
8. Activate switch configuration
9. Save switch configuration
10. Build I/O configuration statements
11. Build and manage S/390 microprocessor
IOCDSs and IPL attributes
12. Build validated work I/O definition file
|
Figure 6-34 HCD: Building the Validated Work IODF
Then, download the IOCP file to the PC where the CHPID Mapping Tool will be run. Download the file as TEXT. Alternatively, if you are an HCM user and download the CMT to the same PC, you can create the IOCP input file directly from HCM.
3. Invoke the CHPID Mapping Tool, load the CFR, and import the IOCP file. Perform availability mapping. (Hardware Configuration Manager (HCM) can also be used for this process.)
4. Analyze the output for intersects across AIDs and PORTs. Intersects are displayed with the CHPID Mapping Tool as shown in the CMT panel sample in Figure 6-35, where C indicates that two channels use the same channel card.
Figure 6-35 Sample CMT Panel showing detected intersects
If no unacceptable intersects exist, go to step 5. Otherwise, you can either use the manual process in the CMT to associate the CIB CHPIDs to different AIDs/ports or follow steps 4a through 4c:
a. Disconnect CIB CHPIDs that are to be remapped. You perform this from the CF Channel Path Connectivity List shown in Figure 6-36 on page 187. Specify n next to each CHPID to be disconnected.
|
CF Channel Path Connectivity List Row 1 of 4
Command ===> ___________________________________________ Scroll ===> PAGE
Select one or more channel paths, then press Enter.
Source processor ID . . . . . : IB022097
Source channel subsystem ID . : 0
Source partition name . . . . : *
-------Source-------- -----------Destination-------- -CU-
/ CHPID Type Mode Occ Proc.CSSID CHPID Type Mode Type
n 01 CIB SHR N IB012097.0 01 CIB SHR CFP
_ 02 CIB SHR N IB012097.0 02 CIB SHR CFP
_ 53 CIB SHR N IB042097.0 53 CIB SHR STP
_ 54 CIB SHR N IB042097.0 54 CIB SHR STP
|
Figure 6-36 CF Channel Path Connectivity List
b. Redefine the CHPIDs to new AIDs and PORTs; see “Defining PSIFB links using HCD” on page 164.
c. Reconnect the CIB CHPIDs from the CF Channel Path Connectivity List; see “Connecting the CIB CHPIDs” on page 167. At this point, the configuration can be revalidated for intersects by returning to Step 2.
5. With all the necessary intersects removed, the production IODF can be built. Use HCD to perform a dynamic reconfiguration to write the IOCDS and activate the IODF.
For more information, see the following publications:
•I/O Configuration Using z/OS HCD and HCM, SG24-7804
•z/OS Hardware Configuration Definition Planning, GA22-7525
•z/OS Hardware Configuration User’s Guide, SC33-7988
•z/OS Hardware Configuration Manager (HCM) User's Guide, SC33-7989
1 HCD is unable to enforce this restriction, because it does not know which sysplex any LPAR will be a part of. Therefore, it is important that you have manual checks in place to ensure that this restriction is adhered to.
2 For more information about the relationship between subchannels and link buffers, see Appendix C, “Link buffers and subchannels” on page 247.
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