3.1 Sublimation Growth

3.1.1 Phase Diagram of Si-C

Figure 3.1 shows the phase diagram of the Si-C binary system [1, 2]. Because there exists no stoichiometric SiC liquid phase, it is impossible to employ congruent melt growth for SiC bulk growth at technically relevant system pressures. Instead, SiC sublimes at very high temperatures, above 1800–2000 °C. This is the key process of source supply in sublimation growth of SiC. The phase diagram indicates that up to 15% of carbon can be dissolved in a Si melt at about 2800 °C. Liquid phase (solution) growth, which exploits this phenomenon, is described in Section 3.6.

Sublimation growth of SiC consists of three steps: (i) sublimation of the SiC source, (ii) mass transport of sublimed species, and (iii) surface reaction and crystallization. Thus, this growth method is also called “physical vapor transport (PVT)” growth. Figure 3.2 shows the partial pressures of sublimed species in the (a) and (b) systems at high temperature [3–5]. In the gas phase, the dominant species are not stoichiometric SiC molecules but and molecules and atomic Si.

3.1.2 Basic Phenomena Occurring during the Sublimation (Physical Vapor Transport) Method

Growth of single crystalline SiC by sublimation was first achieved by Lely in 1955 [6]. Figure 3.3 shows a schematic illustration of a crucible used in the Lely method. The SiC source is placed along the inner walls of a cylindrical graphite crucible. The source material is usually SiC powder produced by the Acheson process [7]. By heating the crucible to the process temperature of about 2500 °C, the SiC source sublimes and is transported to the inner part of the crucible. Under this nearly isothermal condition, many SiC platelets nucleate randomly along the vapor transport paths in the growth cavity. The grown SiC platelets are of high quality, and the typical dislocation density of good platelets is only several . However, the platelets are very small and irregular in shape, with typical areas of and thickness of 0.3–0.5 mm. The polytype of the platelets is mainly 6H-SiC, but occasionally 4H- or 15R-SiC polytypes are mixed. Although these SiC platelets are not suitable for device development, in spite of their high quality, the platelets can be used as seed crystals for the early stage of the seeded sublimation growth, as described below.

Tairov and Tsvetkov developed the seeded sublimation (or modified Lely) method by placing a seed crystal at a slightly cooler place inside the crucible [8, 9]. Figure 3.4 shows a schematic illustration of a crucible used for seeded sublimation growth of SiC. The SiC source (SiC powder or sintered polycrystalline SiC) is placed at the bottom of a cylindrical dense graphite crucible, and a SiC seed crystal is placed near the lid of the crucible. The distance between the top of the SiC source and the seed crystal is typically 20–40 mm. The crucible is heated by radio frequency (rf) induction or resistive heating up to 2300–2400 °C. The crucible is thermally insulated by graphite felt or porous graphite; by choosing an appropriate frequency, direct heating of this insulation can be avoided. The seed temperature is fixed at about 100 °C lower than the source temperature, so that sublimed SiC species condense and crystallize on the seed. Growth is usually performed at low pressure to enhance the mass transport from the source to the seed. A high-purity Ar (or He) flow is employed for growth. Remarkable improvement in growth technology has been made in recent decades [10–24].

To grow high-quality SiC boule crystals, both thermodynamic and kinetic factors must be considered. The process control to maintain optimum thermal and chemical conditions is also very critical. Several aspects of each issue are described below.

3.1.2.1 Thermodynamic Considerations

As shown in Figure 3.2, the main species transported from the SiC source to the seed are Si, , and at a growth temperature of 2300–2400 °C. Thus, the gas phase in sublimation growth is usually Si-rich because of preferential evaporation of Si from the SiC source. This leaves the source more and more C-rich, and graphitization of the source occurs during the growth. To avoid carbon inclusions in the growing crystal, silicon is added to the source to maintain a stoichiometric or Si-rich source surface. This is important because sufficient overpressure of Si is also required to avoid graphitization of the growing surface on the seed. Carbon in the graphite crucible can evaporate and participate in the growth (this can be reduced by using a TaC-coated crucible [19]). Taking into account these phenomena, the main reactions during sublimation growth are summarized as follows [5]:

3.1

3.2

3.3

3.4

By using the thermodynamic properties of the relevant species, the equilibrium partial pressures of Si, , and can be calculated as a function of temperature. The calculated results agree well with the experimental results shown in Figure 3.2 [5].

Figure 3.5 shows a diagram of the secondary phase formation during the sublimation growth of SiC with a fixed carbon flux of (calculated by assuming thermodynamic equilibrium of the system) [5]. The area of stable growth appears in the region where a sufficient silicon flux is supplied. When the silicon flux is lower than a critical value, surface graphitization takes place; this critical value of silicon flux increases exponentially with temperature.

Glass et al. reported the temperature dependence of the partial pressure of the main components in the phase diagram (SiC-C and SiC-Si) using the latest thermodynamic data [17]. The obtained relationships between the partial pressure of Si and those of and (in Pa) are:

3.5

3.6

Based on these equations, one can estimate the temperature dependence of the ratio of Si to C atoms in the vapor phase. It should be noted that the condensation energy of SiC from the vapor phase is very large, about , almost 10 times larger than that in Si melt growth. This factor must also be considered in growth simulation and process design.

3.1.2.2 Kinetic Considerations

The growth rate in sublimation growth is mainly determined by the flux of the source supply (sublimation rate) and the transport efficiency from the source to the seed. The sublimation rate is a function of the source temperature, while the transport efficiency depends strongly on the growth pressure, the temperature gradient, and the distance between the source and the seed. Figure 3.6 shows the pressure dependence of the growth rate during sublimation growth of SiC at various source temperatures [25]. Because the mass transport is diffusion limited in sublimation growth, the growth rate is almost inversely proportional to the growth pressure. In other words, as the pressure is reduced, the vapor diffusion rates increase and constituents move rapidly along the concentration gradient from the source toward the seed. Here, the concentration gradient is basically determined by the source and seed temperatures (temperature gradient). As a result, the growth rate is approximately proportional to the supersaturation on the seed surface , which is given by:

3.7

where and are the vapor pressure on the seed and the equilibrium vapor pressure, respectively. In the case of SiC, of course, the vapor pressures for Si and Si-C compounds must be considered. For example, the seed temperature must be controlled to ensure that loss of Si from the surface is minimized by maintaining the overpressure of the Si vapor near the seed. The source temperature and pressure must be controlled to develop the appropriate temperature gradient and to ensure that the proper amounts of Si and Si-C compounds are transported from the source to the seed. Any fluctuations in the temperature profile and pressure can result in constitutional supercooling (e.g., Si droplet formation), surface graphitization, and C inclusions. All these phenomena lead to the formation of macro- and micro-defects in SiC boules. Defect formation in sublimation growth is described in Section 3.3.

In state-of-the-art growth technology, SiC boules are usually grown with a growth rate of at several hundred pascals or even lower. Although the growth rate can be increased to , this faster growth often results in significant generation of extended defects in the grown crystal. One obvious obstacle in sublimation growth is the limitation of growth time. The source material becomes C-rich as growth proceeds, for the reasons described above, and high-quality growth becomes impossible after several days. At present, this limits the length of SiC boule crystals to 30–50 mm. To overcome this problem, several modifications have been investigated. An additional gas pipe can be introduced into the crucible, and the C/Si ratio inside the crucible can be adjusted by supplying Si- or C-containing gas(es) [26]. Continuous feeding of polycrystalline SiC source during sublimation growth has also been investigated [27].

3.1.3 Modeling and Simulation

In seeded sublimation growth of SiC, the growth is carried out in a quasi-closed graphite crucible, and one can only control the process parameters such as the temperature and pressure from the outside, without monitoring the inside. Although careful in-situ X-ray imaging experiments have been conducted to visualize the phenomena inside the crucible [26], the insights obtained are still limited. Therefore, the experimental approach alone is not sufficient to develop a well-controlled sublimation growth process. To overcome this problem, modeling and simulation of SiC sublimation growth have been extensively investigated [21, 24, 28–33]. At present, calculation of heat and mass transport during sublimation growth of SiC is standard technology and provides us with very good insights into what is happening inside the crucible. These realistic simulations can be used to design crucible geometries and temperature profiles for the growth of high-quality SiC boules. The next step in the development of the simulations is to include chemistry inside the growth space. To treat chemical reactions in the gas phase and at the growing surface, a reliable database for a number of chemical reactions at very high temperatures is mandatory, but at present is a challenge. Nevertheless, a recent simulation package offers reasonably good agreement with experimental results such as the growth rate and shape of a grown boule, and has been employed as a powerful tool for crystal growers.

The temperature distribution is calculated, taking into account heat transfer by thermal conduction, gas phase convection, and radiation. In the heat transfer calculation, the large crystallization energy of SiC (that is, the latent heat of sublimation or condensation on the gas/solid interface) must be considered. Heat transfer by radiation is a dominant process at very high temperature in sublimation growth. SiC crystals are semitransparent to visible-infrared radiation, and the radiated light is absorbed by the growing SiC boule, to some extent. This absorption depends strongly on the free carrier density and thus the impurities present. For example, the temperature profile inside a growing boule heavily doped with nitrogen is very different from that inside a high-purity boule. The thermal conductivity of SiC at the growth temperature must be much smaller than that at room temperature [34]. Therefore, the absorption of radiation can form a significant thermoelastic field inside the growing boule. It is important to control this thermoelastic field to obtain a desirable boule shape and to reduce defect generation.

To predict the growth rate and boule shape, a mass transfer model must be coupled with the heat transfer calculation and the thermodynamic database. In the gas phase, fluid transport is based on the low pressure kinetic theory of gases. Diffusion coefficients, viscosity, conductivity, and specific heat of species are calculated as a local function of temperature, pressure, and composition. The Stefan flow caused by the phase change of SiC has to be considered. The thermodynamic calculation is performed by minimization of the total free energy of the Si–C–Ar system at high temperature. Nine possible gaseous molecules are usually considered (based on a literature survey): , in addition to Ar [21, 29]. Calculations indicate that three particular species, , and , are indeed important to describe sublimation growth [21]. Modeling and simulation of chemistry during SiC sublimation growth has also been developed. Large sets of multi-step gas and surface reactions are handled, based on the most recent thermodynamic database. In the chemical simulation, “local thermodynamic equilibrium” is usually assumed. Deviation from thermodynamic equilibrium can also be included [21].

Figure 3.7 shows the effect of a radiation shield plate along the periphery of the growth front, demonstrating both experimental and simulation results [31]. By introducing the radiation shield plate (“flat screen” in the figure), the deposition of polycrystalline SiC around the main boule can be avoided because the shield plate is at a higher temperature. The polycrystalline SiC deposition, as well as the shape of the growth front, is reproduced well in the simulation. Figure 3.8 shows the improved geometry of the crucible used to grow a large boule with a nearly constant diameter [32]. By optimizing the shape and location of the “liner” inside the crucible, stable growth of a long boule with a constant diameter is established. The simulation gives good guidance in designing the crucible geometry and the temperature profile. Comparative studies of experiments and simulation have been done to investigate the optimization of thermal insulators, influence of ambient gases, and scaling up of the reactor. In particular, recent diameter enlargement of SiC wafers (boule crystals) is largely due to the development of the simulation technique.

Another important role of simulation in the sublimation growth of SiC is the simulation of stress in the boules. As will be described in Section 3.3, thermal stress plays a critical role in the generation of extended defects in SiC boules. The causes of thermal stress include different thermal expansion coefficients between SiC and the crucible (graphite), and radial or axial temperature inhomogeneity. When the resolved shear stress on a primary slip system exceeds a critical resolved stress, glide and multiplication of dislocations takes place, leading to a significantly increased dislocation density in the boule. If the thermal stress becomes very high, crystal cracking can also occur. Figure 3.9 shows the simulated thermal stress in SiC boules with (a) a convex growth front and (b) a flat growth front [35]. The convex front is formed when a radial temperature gradient exists (the peripheral temperature is higher than that at the center). The flat surface is obtained when the radial temperature gradient is very small. As shown in the figure, a very high peripheral component of the resolved shear stress appears along the top-edge of the boule in the case of the convex growth. Indeed, this is the location where a crack is observed in a large-diameter boule. Conversely, the shear stress is more than one-order-of-magnitude smaller in the case of flat growth. Figure 3.10 shows (a) the distribution of calculated resolved shear stress (magnitude) inside a boule and (b) the experimentally obtained distribution of dislocation density [36]. In this particular case, the dislocation density is high near the center and near the wafer edge . This distribution is consistent with the distribution of the shear stress. Thus, stress simulation is a powerful tool to predict trends in dislocation density.

3.2 Polytype Control in Sublimation Growth

For SiC wafers to be used in electronic applications, it is mandatory to grow a large SiC boule of a desired single polytype. Because of the low stacking fault energy of SiC, however, polytype mixing may happen during boule growth, when the growth conditions are not optimized. Knippenberg reported empirical observations of the relative stability (or occurrence) of individual polytypes in SiC bulk growth, as shown in Figure 3.11 [3]. According to this report, 3C-SiC is a metastable polytype, and 2H-SiC is believed to occur at relatively low temperatures, 1300–1600 °C. At high temperatures, above 2000 °C, at which sublimation growth is carried out, 6H-, 4H-, and 15R-SiC polytypes are often observed. However, from a materials science viewpoint, the kinetic and thermodynamic factors which determine the polytype actually grown are not well understood. Because is usually employed as the seed crystal, polytype switching, or nucleation of foreign polytypes may occur during growth, unless intentionally controlled.

One obvious kinetic factor is the polytype replication through spiral growth around threading screw dislocations, after stable spiral growth has been established in the bulk. Figure 3.12 shows typical surface morphologies of a 6H-SiC boule taken with (a) an optical microscope and (b) an atomic force microscope. These images indicate that spiral growth, via steps with a six-bilayer height, is dominant on the growing surface (in 6H-SiC growth). Along the step edges, the stacking information is provided, which ensures replication of that polytype in the growing crystal. Because the core of a threading screw dislocation acts as an infinite step source, this spiral growth is maintained throughout the growth, as long as the optimized growth conditions are maintained. In this sense, polytype replication via a spiral growth mechanism will become much more difficult in the future, when the threading screw dislocations in SiC boules are almost eliminated. Polytype replication by step-flow growth is described in greater detail in Chapter 4.

Although spiral growth is favorable for polytype replication, nucleation on the terraces (flat regions between steps) can naturally take place in the initial stages of growth as well as during growth. Therefore, it is essential to understand and to control the key factors which stabilize a desired polytype. It has been suggested that there exists a close relationship between the polytype stability and the C/Si ratio (C enrichment) in the growth ambient (or atmosphere) [37]. When the growth ambient is C-rich, a polytype with a higher hexagonality becomes stable. For example, 4H-SiC (hexagonality: 0.5) is more stable than 6H-SiC (hexagonality: 0.33) under C-rich growth conditions. In real experiments, the most striking parameter determining the polytype is the polarity of the seed crystal. Sublimation growth on a SiC(0001) (Si face) under adequate conditions gives a 6H-SiC boule, even if the seed is 4H-SiC(0001). In contrast, a 4H-SiC boule is grown on a (C face), irrespective of the seed polytype [13]. This result is explained by the difference in surface energy between the Si and C faces. The growth temperature and pressure also influence polytype stability, as shown in Figure 3.13 [12]. 4H-SiC is preferentially grown at relatively low temperature and low pressure, while relatively high temperature and high pressure result in 6H-SiC growth (the growth temperature and pressure, of course, influence the C/Si ratio on the growing surface). Another important factor is impurity incorporation. Nitrogen doping during the growth stabilizes 4H-SiC, while aluminum doping leads to preferential growth of 6H-SiC. Because nitrogen atoms occupy the carbon lattice sites, incorporation of nitrogen atoms will cause the growth environment to become slightly C-rich, which favors the growth of 4H-SiC. Furthermore, it is reported that impurity additives such as Sc and Ce stabilize 4H-SiC [37, 38]; this can also be explained by a shift in the growth ambient toward C-rich conditions.

In spite of poor understanding of the mechanism, 4H-SiC boules without polytype mixing can be reproducibly produced by sublimation growth on under optimized conditions with intentional nitrogen doping. Thus, it is easy to produce heavily-nitrogen-doped n-type 4H-SiC wafers, whereas production of low-resistivity -type 4H-SiC wafers heavily doped with aluminum is a challenge in terms of polytype control.

When or is employed as the seed, instead of , perfect polytype replication can be achieved across a wide range of growth conditions [18]. This is also explained by the mechanism that the stacking information appears on the and surfaces, and the grown crystal inherits this stacking sequence. Although generation of stacking faults was a critical issue in sublimation growth on these faces, this problem has been considerably suppressed by using a seed and optimizing growth conditions. Because of the limited availability of these seed crystals, boule growth on non-basal planes is not very common. This growth technique is, however, a key for reduction of extended defects, as described in Section 3.3.

Because 3C-SiC is only stable at relatively low temperature, it is not easy to grow 3C-SiC boules by sublimation. Sublimation growth on a 3C-SiC(001) or (111) seed at 1700–2100 °C has been investigated [39, 40]. The growth rate is low, , as a result of the low growth temperature. When the temperature is increased above 1900–2000 °C, a polytype transformation into 6H-SiC takes place [41], making 3C-SiC bulk growth difficult [42].

3.3 Defect Evolution and Reduction in Sublimation Growth

SiC boule crystals and wafers contain a variety of crystal imperfections, both extended defects and point defects. This subsection describes the evolution and reduction of extended defects. The density of point defects in SiC boules is rather high, in the range. The nature and properties of these point defects are described in Section 3.4 and Chapter 5.

Table 3.1 shows the major extended defects observed in SiC boules and wafers. The Burgers vector, the major direction, and the typical density of the extended defects in boules (wafers) prepared using state-of-art technology (for n-type 4H-SiC) are shown with additional comments. Note that, through recent efforts, three-dimensional defects such as large carbon inclusions and voids [43] are now eliminated.

Dislocation	Burgers vector	Major direction	Typical density
Micropipe			0–0.1
Threading screw dislocation (TSD)			300–600
Threading edge dislocation (TED)			2000–5000
(Perfect) Basal plane dislocation (BPD)		in plane (preferably )	500–3000

3.3.2 Micropipe Defects

A micropipe defect is a hollow core associated with a superscrew dislocation. When the magnitude of the Burgers vector is very large, the strain field around the dislocation core becomes extremely high (proportional to , where : Burgers vector), and a microscopic pinhole is formed by breaking bonds [45, 46]. Micropipe defects are indeed located at the center of a large spiral on the surface of the SiC boule, and the diameters of the pinholes range from to several micrometers. In SiC, the Burgers vector of an elementary threading screw dislocation (TSD) is already very large because the length of corresponds to 1.0 nm for 4H-SiC and 1.5 nm for 6H-SiC, which is much larger than that for . The magnitudes of the Burgers vector for micropipes have been investigated in great detail, and the minimum values were determined as for 4H-SiC and for 6H-SiC [47, 48], both of which correspond to 3 nm. In old wafers, a large micropipe with a Burgers vector of 8–12c was also observed. Frank considered an energy balance between the elastic strain energy released by formation of a hollow core and the energy of the free surface created along the hollow core, and proposed that the radius of a hollow core (or in this case, micropipe) , assuming isotropic linear elasticity, is given by [45]:

3.8

Here is the shear modulus and the surface energy of the hollow core. This equation is almost satisfied for micropipes in SiC [49]. Figure 3.14 shows an example of a micropipe in a 4H-SiC(0001) wafer, as observed by (a) optical microscopy and (b) atomic force microscopy. Near the center, a pinhole is discernible as a dark spot. When the wafer is observed in transmission mode, a dark line running along the -axis can be traced.

Because a micropipe is a pinhole extending along the direction through the entire SiC wafer, it is not surprising that SiC devices which contain a micropipe exhibit severely degraded performance, such as excessive leakage current and premature breakdown [50, 51]. Micropipes also act as a source of impurity contamination in epitaxial growth and device processing. Thus, micropipes were identified as the most important killer defects, and growth technology has now been developed to eliminate micropipes.

Table 3.2 shows the possible causes of micropipe generation during the sublimation growth of SiC [17]. These possible causes can be classified into fundamental and technological issues. The fundamental issues include thermodynamic mechanisms such as thermoelastic stress arising from non-uniform temperature distribution, and kinetic mechanisms such as an unwanted nucleation process. Technological issues such as process instabilities, imperfect surface preparation of a seed, and carbon inclusions also need to be considered. Inclusion of foreign polytypes causes severe mismatch in the stacking sequence when such an island meets the host polytype. This stacking mismatch and the associated large strains also trigger micropipe formation [52]. When elementary screw dislocations are introduced for some reason, the spiral steps emanating from them interact with each other. Because of the strong repulsive interaction between steps, the energetic bunching of spiral steps promotes the coalescence of adjacent screw dislocations, leading to micropipe formation [52]. Accumulation of screw dislocations around a surface depression [53], and the interaction between screw dislocations and twist-type misorientation [54] have also been suggested as mechanisms of micropipe formation.

Fundamental
Thermodynamic	Kinetic
Thermal field uniformity	Nucleation processes
Dislocation formation	Inhomogeneous supersaturation
Solid-state transformation	Constitutional supercooling
Vapor phase composition	Growth face morphology
Vacancy supersaturation	Capture of gas phase bubbles
Technological
Process instabilities	Seed preparation	Contamination

Major approaches to micropipe elimination are summarized as follows:

1. Micropipe-free seed: Because micropipes in a seed crystal are basically replicated in the grown boule crystal, the use of a micropipe-free seed is a requirement to obtain a micropipe-free boule. The micropipe-free seed can be a selected SiC platelet produced by the Lely method. Another candidate is a wafer prepared by slicing a boule grown on or , which is inherently free of micropipes [18].
2. Stable growth under optimized conditions: As mentioned above, any fluctuations in the temperature profile or pressure in a crucible may cause unintentional supercooling and/or deviation of the C/Si ratio at the growing surface. Degradation of the source material (e.g., graphitization) also perturbs the control of the C/Si ratio. Because all these factors will result in micropipe generation, even on a micropipe-free seed, the growth conditions must be optimized and carefully maintained throughout the long sublimation growth.
3. Micropipe closing (dissociation): In liquid phase epitaxy [55] and chemical vapor deposition (CVD) of SiC under Si-rich conditions [56], a micropipe with a Burgers vector of nc ( in 4H-SiC) can dissociate into multiple elementary (closed-core) screw dislocations, each with a Burgers vector of 1c. As a result, the micropipe (pinhole) becomes closed during growth. Similar phenomena are observed during the sublimation growth of SiC [57], and in some cases, this micropipe closing is intentionally enhanced by adjusting the growth conditions. Because the elastic energy associated with a dislocation is proportional to [58], a micropipe is not energetically favorable, based upon thermodynamic considerations. If we consider the Burgers vectors and elastic energies of a micropipe and multiple elementary screw dislocations , the following equations are satisfied:
   3.9
   3.10

This implies that a micropipe can be closed by dissociation into several elementary threading screw dislocations, if the potential barrier is overcome. The main driving force for micropipe dissociation is believed to be lateral growth, and subsequent interaction between macrosteps and the core of a micropipe.

Through these approaches, micropipe defects have been almost eliminated (micropipe or ) [35, 59, 60]. At present, micropipe-free wafers are commercially available from most vendors.

3.3.3 Threading Screw Dislocation

A threading screw dislocation (TSD) is located at the center of spiral growth during sublimation growth on a surface. Figure 3.15 shows a schematic illustration of an elementary TSD in SiC. Although a threading dislocation in Si or GaAs usually creates a spiral with one-bilayer-height step, the step height of a spiral in is four Si-C bilayers, corresponding to (the step often splits into two spiral steps with two-bilayer-height steps). The TSDs usually propagate almost along the direction, but occasionally they are bent toward the basal planes (and sometimes again bent back toward ) [61]. When they are bent and lie in the basal plane, Frank-type stacking faults are formed because the Burgers vector (1c or 2c) must be conserved. Recent studies using synchrotron X-ray topography revealed that most TSDs possess a Burgers vector of [62, 63]. This means that the majority of TSDs are not pure screw dislocations, but instead are mixed dislocations.

Threading screw dislocations are basically replicated from a seed crystal, as also occurs for micropipes. A major cause of threading-screw-dislocation nucleation in SiC sublimation growth is the generation of a half loop at the initial stage of bulk growth, as shown in Figure 3.16. It is reported that the number of TSDs with a Burgers vector of is almost the same as that with , and that and dislocations are often observed nearby as if they are a pair [64]. At the very initial stage of growth, stable spiral growth or layer-by-layer growth is not well established. When the growth conditions (e.g., effective C/Si ratio, temperature profile, and other factors) deviate from the optimum conditions, nucleation of foreign polytypes may occur at a microscopic scale. In this case, TSDs can be generated because of stacking mismatch (e.g., between a 4H-SiC host and a small 6H-SiC island), although the microscopic islands will eventually be overgrown [65]. In a similar manner, when a surface precipitate is overgrown, the growth fronts meet at the precipitate and coalesce with misalignment under the influence of stress. To accommodate this misalignment, a pair of screw dislocations of opposite signs is generated [65, 66]. The surface quality of the seed is also important. Polishing-induced damage and surface graphitization during temperature ramping should be completely eliminated. Furthermore, micropipe dissociation during growth is another source of TSDs, as described above. Under optimized conditions, the density of TSDs clearly decreases with increasing boule length [67]. There are two reasons for this: (i) pairs of and TSDs can merge and annihilate and (ii) TSDss can be bent to the basal planes and eventually reach the periphery of the boule.

3.3.4 Threading Edge Dislocation and Basal Plane Dislocation

A threading edge dislocation (TED) and basal plane dislocation (BPD) possess the same Burgers vector of . Figure 3.17 shows the two slip vectors, (a) and (b) , in the basal plane of a close-packed system. A slip of results in an extra half plane or a missing half plane, while keeping the stacking structure. Conversely, a slip of causes a fault in the stacking, a change of the occupation site in a layer from “A” to “B,” for example. This kind of defect is called a Shockley-type stacking fault (SSF) [58], and plays an important role in bipolar degradation phenomena, as described in Chapter 5. Figure 3.18a shows a schematic illustration of an extra (or missing) half plane introduced into a boule crystal. In this case, a dislocation with a Burgers vector of exists along the edge of the extra half plane. As seen from the figure, the dislocation lying in the basal plane (line AB) is defined as a “BPD” (pure edge-type), and the dislocation lying along the direction (line BC) is defined as a “TEDn”. Therefore, “BPD” and “TED” have the same basic nature; the name simply differs depending on the dislocation direction. In fact, inside the boule crystals, conversion from BPD to TED and from TED to BPD is often observed [61, 68]. Note that pure edge-type BPDs are not very abundant, and quite often BPDs lie along the directions, as shown in Figure 3.18b, probably due to the Peierls potential [58]. In this particular case (Figure 3.18b), the BPD (line ) is a 60° dislocation. (The angle between the Burgers vector and the dislocation line is 60°.)

Both TEDs and BPDs in a seed are replicated in the SiC boule, though dislocation conversion may occur, as mentioned above. It is, however, more important to consider the nucleation of dislocations (grown-in dislocations) to reduce the dislocation density. As in the case of nucleation of screw dislocations, a pair of edge dislocations is generated at a faulted region or a surface precipitate, especially during the initial stage of sublimation growth [66]. When the partial dislocation encompassing the stacking fault is a Shockley type, the resulting threading dislocation will have an edge character. Conversely, a Frank-type partial dislocation will result in a TSD. In addition to the kinetics during the initial stage of growth, thermal stress is another important factor for dislocation nucleation. BPDs are relatively easily introduced into the growing boule when the resolved shear stress exceeds a certain (critical) value. A major source of the stress is thermal stress, which develops during sublimation growth when the temperature profile is not appropriate. Both radial and axial temperature gradients cause inhomogeneous thermal expansion inside the boule. Furthermore, the difference in the thermal expansion coefficients of the SiC and graphite parts causes severe thermal stress during cooling. Figure 3.19 shows a schematic illustration of the shear stress, the associated dislocations, and the bending of a basal plane in a growing SiC boule, taking into account typical radial and axial temperature gradients [69]. The temperature is higher along the periphery of the boule than in the center because of radiation from the crucible walls. The temperature of the growing surface is higher than the seed temperature because of the temperature gradient designed to promote mass transport from the source to the seed. Under these circumstances, thermal expansion is not uniform inside the boule; this causes significant thermal stress and bending of basal planes. Consider the components of stress inside a boule grown along (Figure 3.20). The resolved shear stress along inside a basal plane is expressed by [58]:

3.11

where , and are the components of shear stress, as shown in Figure 3.20 [20]. The resolved shear stress is a direct cause of dislocation nucleation, while too high a value of can also lead to cracking of SiC boules.

Figure 3.21 shows the critical stress in 6H-SiC as a function of temperature [70]. One has to consider two different critical stresses, (i) the critical shear stress resolved to a basal plane, which induces basal plane slip and (ii) the critical normal stress, which induces prism plane slip. In SiC, the critical shear stress along a basal plane is much smaller, and the value decreases greatly at high temperature. Therefore, at the temperature of sublimation growth (over 2200 °C), the critical shear stress becomes very low, and BPDs are easily introduced into SiC boules. In fact, arrays of BPDs are often observed in SiC boules; these can be ascribed to the basal slip bands [71]. Prismatic slip bands are also observed, but with smaller density [72]. However, Wellmann and coworkers discovered that the strain relaxation mechanism is different between n-type and p-type SiC crystals [73]. The BPD density is extremely low in p-type SiC, and thus thermoelastic strain relaxation in p-type SiC may take place, favoring the generation of TSDs instead of BPDs. This phenomenon is explained by doping-induced change of lattice hardness and electrostatic energy consideration [24]. Furthermore, multiplication of BPDs can take place via the Frank–Read mechanism [58], when the thermal stress is significant [74]. It is found that the densities of BPDs and TSDs exhibit a positive correlation; SiC crystals that contain more TSDs generally show a higher BPD density [74]. This correlation can be attributed to the multiplication process of BPDs via interaction between gliding BPDs and TSDs. For further reduction of the residual stress, ingot anneal or wafer anneal have been investigated. Most TEDs are formed by conversion from BPDs along the growth direction during growth.

Crystal mosaicity was commonly observed in SiC boules [75, 76]. Mosaicity comes from slightly misoriented domains bordered by regions with high dislocation density. When this is the case, edge dislocation walls aligned along the directions are present, especially near the periphery of SiC wafers [77]. Through improvement of crucible geometry and process conditions, mosaicity is now greatly reduced.

Figure 3.22 shows a schematic illustration of dislocation networks observed in SiC boules, as revealed by plane-view and cross-sectional synchrotron X-ray topography [68]. Threading dislocations are mostly propagating along the direction, and BPDs often connect neighboring TSDs. BPDs tend to align along the directions. TEDs and BPDs are transformed into each other, as described above.

3.3.5 Defect Reduction

One of the most striking techniques to reduce extended defects in SiC boules is the so-called “repeated -face growth (RAF)” method [78]. Figure 3.23 schematically illustrates the RAF process. The main concept is the preparation of an almost dislocation-free seed and subsequent sublimation growth on the high-quality seed under stabilized conditions. The first step is normal sublimation growth on a seed. By slicing the boule parallel to the growth direction, a (or ) plate is obtained (Figure 3.23a). Because most dislocations are propagating along the growth direction, only a limited number of dislocations (mainly BPDs) appear on the surface of this (or ) plate. Then, sublimation growth is performed using this plate as the seed, which gives a (or ) boule crystal. Inside this SiC boule, the density of elementary screw dislocations and TEDs is low, and the majority of dislocations are BPDs propagating along the growth direction . Next, an (or ) plate is prepared by slicing the (or ) boule, as shown in Figure 3.23b. In this SiC plate, elementary screw dislocations are almost eliminated, while some BPDs remain. And again, sublimation growth is carried out on this SiC plate, which results in a SiC boule grown with an extremely low dislocation density (though some BPDs and SFs remain). Then an off-axis plate is obtained by slicing the (or ) boule (Figure 3.23c). This SiC plate still contains BPDs (and stacking faults) but contains almost no TSDs and TEDs (and no micropipes). As a final step, sublimation growth is performed on the off-axis seed, under stable, and optimized conditions. As shown in Figure 3.23d, the BPDs in the off-axis seed mostly propagate in the basal plane of the grown boule. Above this region, an almost dislocation-free crystal can be grown, as long as continuous supply of steps is assured. In particular, the density of threading screw dislocations can be extremely low. This is one reason why an off-axis seed is employed to ensure polytype replication in the boule crystal. Once this RAF process is successful, one does not have to repeat these complicated processes because high-quality seed crystals can be directly obtained by slicing the high-quality boule. Figure 3.24 shows the total density of dislocations as a function of the number of -face (or -face) growth steps [78]. The dislocation density shows rapid decrease as the growth is repeated on or faces. An impressively low total dislocation density of , was achieved by employing this technique [78].

3.4 Doping Control in Sublimation Growth

3.4.1 Impurity Incorporation

For fabrication of vertical devices, low-resistivity wafers are required to minimize the series resistance, while high-resistivity wafers are desired for fabrication of lateral high-frequency devices, to reduce the parasitic impedance. In the sublimation growth of SiC, nitrogen and aluminum are the dopants of preference for growth of n- and p-type boules, respectively. Semi-insulating SiC boules can also be obtained. However, the purity or background impurity density, of SiC boules grown by the sublimation method should be carefully taken into account. The purity of SiC boules grown by sublimation is strongly dependent on the purity of the SiC source and graphite parts. The nature and amount of impurity atoms (i.e., those that are not the desired dopants), vary for different manufacturers; typical impurities include Ti, V, Cr, Fe, Co, Ni, and S [17]. The density of these metallic impurities is in the range of . The density of these impurities in the grown boules is usually lower than that of the source by a factor of 2–100. As well as the metallic impurities, N, B, and Al are commonly incorporated in the boule crystals, at densities of , even in nondoped growth. Therefore, nondoped SiC boules can be either n- or p-type, depending on the growth conditions and the environmental purity. The net doping density of nondoped boules ranges from a mid to a mid .

In general, the dopant incorporation in SiC sublimation growth follows the trends observed for CVD of SiC: nitrogen incorporation is significantly higher for sublimation growth on than on (0001), and the opposite tendency (higher on (0001)) occurs for aluminum incorporation. This polarity effect originates from the surface kinetics, and is independent of the gas-phase composition. Because nitrogen substitutes at the carbon lattice site, a nitrogen atom adsorbed onto a surface is bound to three underlying silicon atoms, while it is only bound to one silicon atom on a (0001) surface. Thus, desorption of the nitrogen atoms absorbed on must be much less than on (0001) (note that the nitrogen vapor pressure is very high at the growth temperature). This is the main reason why nitrogen incorporation is higher on [79]. The higher aluminum incorporation on (0001) can be explained in a similar manner. Impurity incorporation is also influenced by the C/Si ratio, as in the case of SiC CVD (site competition effect [80]). It is, however, difficult to control the C/Si ratio during standard sublimation growth, independently of the other process parameters. For example, nitrogen incorporation usually decreases with increasing growth temperature while aluminum incorporation increases. This can be attributed to the shift in the effective C/Si ratio caused by changing the growth temperature.

Because of the wide bandgaps of SiC, some, or perhaps even all, visible light is not absorbed by SiC. The wavelength of absorbed light is determined by the bandgap, the major impurity levels, and the intra-band excitation levels. The carrier absorption in the conduction band is well known for most SiC polytypes [81], and occurs at about 460 nm (blue light) for n-type 4H-SiC and 620 nm (red light) for n-type 6H-SiC. High-purity 4H- and 6H-SiC, which possess very wide bandgaps, are colorless and transparent, like glass. However, n- or p-type doping causes carrier absorption in the visible region. Its individual light absorption and transmission characteristics give each SiC crystal a unique color. Table 3.3 summarizes the colors of major SiC polytypes, for different types of doping. Because the color of SiC crystals becomes darker when the dopant density is increased, the color and its darkness are good indications of the dopant type and density. The color of SiC crystals is also a good sign to identify the polytype for n-type materials.

Polytype	High-purity	n-type	-type
3C-SiC	Yellow	Yellow	Gray-brown
4H-SiC	Colorless	Amber	Blue
6H-SiC	Colorless	Green	Blue
15R-SiC	Colorless	Yellow	Blue

The dopant density is usually higher in the center region of a wafer, as observed as the darker color at the center. This is because of the enhanced impurity incorporation that occurs during facet growth, as shown in Figure 3.25. During sublimation growth of boules, a facet appears near the center of the boule. On the facet, fast spiral growth takes place, but the growth rate along the direction is relatively slow. Therefore, impurity incorporation is enhanced on the facet region. Thus, the dopant density at the center (the facet region) of a wafer is usually 20–50% higher than that of the outer region of the wafer. This phenomenon means that radial doping uniformity of wafers should be improved.

3.4.2 n-Type Doping

Nitrogen doping is performed simply by introducing some nitrogen gas into the growth ambient (or atmosphere), using, for example, a mixture of Ar and . The nitrogen density in the grown boule is approximately proportional to the square root of the nitrogen partial pressure during growth, and is almost independent of growth rate. This result indicates that nitrogen incorporation is determined by the equilibrium between nitrogen in the gas phase and nitrogen adsorbed on the growing surface [82]. Figure 3.26 shows the resistivity versus nitrogen dopant density for 4H- and 6H-SiC boules [17, 83, 84]. The nitrogen dopant density can be increased to , which results in a very low resistivity, . However, the typical resistivities of commercial n-type 4H-SiC wafers range from 0.015 to (nitrogen dopant density range: ). The electron mobility is rather low, for 4H-SiC because of the heavy doping. In low-resistivity -type SiC wafers, there are several different deep levels or electron traps, at a relatively high density of [85, 86].

It is known that stacking faults are formed when heavily-doped 4H-SiC wafers are oxidized or annealed in Ar at temperatures higher than 1000–1100 °C [84, 87–91]. Stacking fault formation becomes pronounced when the nitrogen density exceeds , and the structure of the stacking fault has been identified as (6,2) in Zhdanov's notation [88, 89]. Another name for this defect is a “double Shockley stacking fault”. It has been suggested that the electrostatic potential energy of the crystal can be lowered by formation of quantum-well-like stacking faults and subsequent electron trapping near these faults [89]. After several models were proposed and examined, the major trigger for generation of stacking faults is now believed to be stress in the crystal; in particular, polishing-induced damage can act as generation sites [91].

3.4.4 Semi-Insulating

High-resistivity wafers are required for fabrication of SiC- or GaN-based high-frequency devices to minimize the parasitic capacitances between the terminals, including the ground. The concept used to produce high-resistivity SiC wafers is basically the same as that employed for III–V compound semiconductors [94]. Because it is very difficult to reduce the background dopant density below by purification processes, compensation of dopants (donors/acceptors) is used to decrease the density of free carriers in the bands. Consider an n-type material with donor density . When a deep level (electron trap) energetically located at (: the bottom of the conduction band) is introduced, the Fermi level is changed, depending on the density of the deep level or electron trap . This is shown schematically in Figure 3.27. When the trap density is much smaller than the donor density , as shown in Figure 3.27a, only a small portion of the electrons supplied from the donors is trapped, and the Fermi level is located slightly below the donor level. When the trap density is close to (but slightly lower than) the donor density, the Fermi level moves to an energy level between the donor level and the trap level. The situation changes dramatically when the trap density is sufficiently higher than the donor density : all the electrons supplied from the donors are captured by the traps, and the Fermi level is pinned near the trap level, as shown in Figure 3.27b. Although some electrons can be thermally excited from the deep levels to the conduction band, the free electron density is lower than the donor density by many orders of magnitude. When the trap level is deep enough, this compensated material shows semi-insulating properties.

In a nondegenerate semiconductor including a compensated material (such as that described above), the free electron density can be estimated by using classical carrier statistics for a semiconductor [95]:

3.12

where is the effective density of states in the conduction band, the Boltzmann constant, and the absolute temperature. In this n-type semiconductor, the free hole density is , where is the intrinsic carrier density. Thus, the resistivity of this semiconductor is:

3.13

here, and are the mobilities for electrons and holes, respectively. In the same manner, the free hole density in a compensated -type semiconductor is:

3.14

where is the effective density of states in the valence band and is the energy of the top of the valence band. Figure 3.28 shows the majority carrier density in the band and the estimated resistivity, as a function of the position of the Fermi level within the bandgap. 4H-SiC at a temperature of 300 K is considered in this figure; the mobilities for electrons and holes were taken as 500 and , respectively (these values vary, depending on the impurity density, but this variation does not have a major impact on the estimated resistivity). One must bear in mind that the Fermi level is pinned at the deep level responsible for compensation, as described above. The estimated resistivity at room temperature is about when the Fermi level is located at eV (or eV), indicating semi-insulating properties. Owing to the wide bandgap of SiC, the resistivity can exceed when the Fermi level is located at eV (or eV) or deeper. Therefore, the main approach to obtain semi-insulating boule crystals is (i) to reduce the background impurities as much as possible and (ii) to intentionally introduce deep levels, which can then act as efficient trap centers (energetically deeper levels are preferable).

In SiC, vanadium was the first element used as a compensating center to create semi-insulating wafers [96, 97]. Vanadium is an amphoteric impurity in SiC; it acts as an acceptor-like trap in n-type SiC and a donor-like trap in -type SiC. The acceptor levels of vanadium are eV in 6H-SiC and eV in 4H-SiC, while the donor levels of vanadium are estimated as eV for both 6H- and 4H-SiC [98–101]. Because the donor level is deeper for vanadium in SiC, vanadium doping was performed for slightly -type SiC boules to achieve very high resistivity. The resistivity of the semi-insulating SiC wafers is about at room temperature, and Arrhenius plots of the resistivity give activation energies of 1.2–1.4 eV [16, 96, 97]. The solubility limit of vanadium in SiC is not very high, in the mid , while the residual dopant density in SiC boules can be . Thus, precise control of vanadium doping is required during sublimation growth.

To overcome the difficulty in vanadium doping, use of intrinsic point defects, which create deep levels, has been investigated, and high-purity semi-insulating (HPSI) wafers have now been obtained [102, 103]. In this case, the density of residual dopants (especially nitrogen, boron, and aluminum) must be reduced by both source purification and the use of high-purity graphite. Intrinsic point defects can be introduced by adjusting the growth conditions or by high-energy particle irradiation after growth [104]. The obtained resistivity exceeds at room temperature; the activation energy of the resistivity was found to vary significantly for different wafers, and ranges from 0.8 to 1.5 eV [102, 103]. Therefore, it is considered that there exist several different deep levels (point defects) responsible for the semi-insulating behavior. Recent studies based on electron paramagnetic resonance (EPR) measurements revealed that (i) silicon vacancies are the dominant traps in HPSI wafers with activation energies of 0.8–0.9 eV, (ii) carbon antisite–carbon vacancy pairs or carbon vacancies are dominant in wafers with an activation energy of 1.1–1.3 eV, and (iii) or divacancies are the main traps in wafers with an activation energy of 1.5 eV [105, 106]. After annealing HPSI wafers of types (i) and (ii) mentioned above at 1600 °C, the resistivity and the activation energy decrease to and about 0.6 eV, respectively [106]. However, the type (iii) HPSI wafers, which originally had an activation energy of 1.5 eV, are more thermally stable.

3.5 High- Temperature Chemical Vapor Deposition

To overcome the limitations of the sublimation method of SiC, high-temperature chemical vapor deposition (HTCVD) was proposed and has been developed [107–109]. Figure 3.29 schematically illustrates a reactor and an approximate temperature profile used for HTCVD of SiC. The SiC boule growth is performed in a vertical crucible made of graphite, where the precursor gases are fed upwards through a heating zone to the seed crystal holder placed at the top. The precursor gases are and a hydrocarbon, such as and , diluted in a carrier gas. The geometry is similar to that of the vertical CVD reactors used for epitaxial growth, but the typical growth temperature is extremely high, 2100–2300 °C. Inside the hot zone, the precursors are completely decomposed and several reactions proceed. As a result, Si and SiC clusters are formed via homogeneous nucleation because of the high supersaturation in the gas phase. These clusters act as a virtual source for SiC boule growth on the seed. Therefore, it is important to establish an appropriate temperature gradient from the gas inlet to the seed. The temperature of the gas-cracking zone and the walls should be slightly higher than that of the seed crystal, to ensure mass transport and condensation on the seed. The choice of the carrier gas is also very important. The carrier gas should not attack nor react with the graphite walls, even at very high temperature. The carrier gas should be immediately heated so as not to form a cold jet onto the seed surface. Helium can fulfill these requirements, and is usually employed in HTCVD of SiC (hydrogen carrier gas is also employed by a few groups). The typical growth pressures and growth rates are 200–700 m bar and , respectively [107–109]. The HTCVD process can benefit from the knowledge and insights already obtained for sublimation growth of SiC boules and epitaxial growth of SiC by normal CVD. Modeling and simulation of heat transfer, chemical reactions, and the growth process have been developed [110]. In some cases, chlorinated precursors are employed to reduce homogeneous nucleation in the gas phase; this growth process then becomes very similar to that found in pure CVD [111].

The major advantages of HTCVD compared with the sublimation method are summarized as follows:

1. High purity: The source purity is obviously much higher in HTCVD, and the residual impurity density can be reduced by 1–2 orders of magnitude. The density of residual impurities is in the mid for nitrogen and boron, and is much lower for other impurities. Because of this purity, it is relatively easy to produce HPSI wafers by HTCVD [112].
2. C/Si control: In sublimation growth, the C/Si ratio cannot be changed as an independent process parameter. In HTCVD, however, the C/Si ratio, at least at the gas inlet, can be controlled independently across a relatively wide range. A low C/Si ratio is preferable for enhancing micropipe closing [56] or to increase nitrogen incorporation, while a high C/Si ratio is effective in decreasing nitrogen incorporation. Formation of intrinsic point defects can also be controlled by controlling the C/Si ratio during growth.
3. Continuous supply of the source material: In principle, the supply of source material in HTCVD is very stable in terms of both the absolute amount and the C/Si ratio, and it can be maintained for a very long period without source depletion. This should enable growth of very long SiC boules of uniformly high quality. In actual growth systems, however, a few technical problems remain to be solved, such as inlet and outlet closure during long growth. Stable supply of dopant impurities, which leads to uniform doping along the growth direction, is another advantage of HTCVD. In particular, very stable aluminum doping is achieved in HTCVD by using trimethylaluminum (TMA) as a dopant source. In n-type doping, nitrogen gas is mixed into the precursors.

Simulation of HTCVD has also been performed, including heat transfer, gas phase reactions, and surface reactions [110]. The main species in the gas phase obtained in the simulation are , and . Significant etching of SiC by hydrogen at very high temperature should be considered. Figure 3.30 shows the temperature dependence of the growth rate during HTCVD of SiC [110]. Because the simulated data show good agreement with experiments, simulation is a powerful tool for designing HTCVD reactors and processes.

Although reports on HTCVD of SiC are still limited compared with sublimation growth, this method possesses much potential for production of high-quality, long SiC boules. At present, at least one manufacturer is producing SiC wafers using this technique.

3.6 Solution Growth

Boule growth from the congruent melt (solution) is a standard technique for preparing ingots of other semiconductors [113]. One might expect solution growth of SiC to be a very promising way of obtaining high-quality boules because the supersaturation at the growing surface could be controlled well once the technology becomes mature. Figure 3.31 shows a schematic illustration of a furnace and temperature profile used for solution growth of SiC. A graphite crucible is filled with Si-based melt, and the seed crystal is placed in contact with the melt surface (top seeded solution growth, TSSG). The seed temperature is slightly lower than the melt, and this provides a driving force for growth. Growth is carried out in an inert atmosphere, such as under Ar. The seed and crucible are usually rotated in opposite directions. The growth temperature ranges from 1750 to 2100 °C.

In spite of the great promise, solution growth of SiC faces several difficulties. As described in Section 3.1.1, there exists no stoichiometric SiC liquid phase at atmospheric pressure, and the solubility of carbon in the Si melt is only 15%, even at 2800 °C. At such high temperature, evaporation of Si is significant because of the high Si vapor pressure, making continuous growth almost impossible. Furthermore, the Si melt reacts significantly with the graphite crucible (which in turn acts as a carbon source for the growth), which presents another challenge for long growth. Solution growth of SiC boules is still in the early stages of development and has only been investigated intensively in recent years. Although large-diameter SiC wafers have not yet been produced using this technique, progress in this field is remarkable. A few approaches are briefly described below:

1. High-pressure solution growth: Because the Si evaporation can be suppressed at high pressure, solution growth under high Ar pressure was investigated [114]. The growth rate is below at 2200–2300 °C. The diameter and length of the SiC boule crystals grown are very limited at present.
2. Solution growth with metal-added solvent: It is known that the carbon solubility can be increased by adding rare-earth or transition metals such as Sc, Pr, Fe, Ti, or Cr. By using Si-Sc-C or Si-Ti-C solvent, for example, reasonable growth rates of about were attained at relatively low temperatures of 1750–1900 °C [115–119]. These studies already demonstrate low dislocation density in the grown crystals. Micropipes are easily closed, and TSDs are mostly converted to Frank-type stacking faults in the basal planes [120]. Metallic contamination from the solvent could be a problem, and this subject is now being investigated.

By controlling the meniscus near the growing surface, remarkable diameter enlargement has been achieved without degradation of quality [121]. A trade-off between high growth rate and growth instability is currently being investigated.

Progress in solution growth of SiC bulk crystals is so rapid that the readers are encouraged to survey the latest papers in journals and conferences. For example, a “dislocation free” 4H-SiC boule was successfully demonstrated by solution growth on a seed sliced from a -grown boule [122]. Though the crystal size is still small, this must be a milestone in the development of SiC crystal growth.

3.7 3C-SiC Wafers Grown by Chemical Vapor Deposition

Because 3C-SiC is unstable at very high temperature, growth of large 3C-SiC bulk crystals by the sublimation method is difficult. Instead, free-standing 3C-SiC films have been demonstrated by fast epitaxial growth of 3C-SiC on Si wafers, and subsequent etching of Si [123, 124]. In general, 3C-SiC layers grown on Si substrates contain a high density of stacking faults and microtwins, resulting from large mismatches of the crystal lattice (20%) and thermal expansion coefficient (8%) [125, 126]. Nagasawa and coworkers developed the technique to grow a very thick 3C-SiC (001) layer with reduced density of stacking faults on a 6 in. Si wafer [124]. The growth of 3C-SiC is carried out by CVD at 1350 °C, using and as precursors, which yields a growth rate of . The stacking faults are considerably reduced by using an “undulant” Si substrate, where a submicron-scale ridge-valley structure is formed on the surface. The details of stacking fault reduction are described in the literature [123]. The crystal quality is much improved, compared with that of normal 3C-SiC films heteroepitaxially grown on Si, but further reduction in defects is required for production of high-performance electronic devices.

3.8 Wafering and Polishing

The process for production of SiC wafers from boule crystals is basically the same as that used for other semiconductors. SiC boules are usually grown on , and the grown boules are cylindrical in shape, with a length of 20–50 mm. The crystallographic orientations of the boules, the exact , and directions, are accurately determined by X-ray diffraction. After this process, the boules are sliced into a number of wafers which are carefully polished and cleaned before delivery.

Figure 3.32 shows a schematic illustration of a standard SiC (0001) wafer defined by the SEMI standard [127]. The prime and secondary orientation flats of the wafer are formed along and , as shown in the figure. For subsequent SiC epitaxial growth and device fabrication, the off-axis (off-angle) is introduced to ensure high-quality homoepitaxial growth [128]. When the off-axis is introduced, the [0001] axis is tilted toward . The off-axis is typically 4° toward , and there is a trend that the off-angle becomes smaller with progress in epitaxial growth technology. Note that the SiC growth behavior and device performance are not perfectly isotropic inside the wafer because of the large anisotropy of the physical properties of SiC. It is important to keep it in mind that physical phenomena in epitaxial growth, device fabrication processes, and device operation depend on these orientations. Wafers to be used for other purposes, such as GaN growth, are usually cut on-axis (0001).

Because of the exceptional hardness and chemical inertness of SiC, both slicing and polishing are challenges. The SiC boules are usually sliced using a multi-wire saw embedded with diamond abrasives. Slicing using electric discharge is currently being investigated to improve the process speed and to reduce slicing-induced damage [129].

The quality of the wafer surface after the polishing process is critical for high-quality epitaxial growth with suppressed generation of extended defects. The surface quality includes the flatness, the sub-surface dislocations, and the residual stress. Many groups have reported and confirmed that improved surface flatness of SiC substrates naturally results in superior surface flatness of epitaxial layers grown on these substrates. To suppress defect generation during the initial stage of epitaxial growth, the surface must be stress-free, without sub-surface dislocations. If the residual damage near the surface is not sufficiently removed, epitaxial growth on the substrate leads to the generation of macroscopic defects, including 3C-SiC nucleation, generation of extended defects (dislocation half loops, etc.), and severe step bunching. It is difficult to completely remove the surface damage by in situ or etching prior to epitaxial growth because the defect generation and/or macrostep bunching have already begun during the heating process, and proceed further during high-temperature etching. Therefore, it is important to know the removal rate, the thickness of the removed layer, and the depth of any damaged layer for a particular polishing process. In general, the polishing process consists of several steps: it starts with a few mechanical polishing steps using abrasive powders of progressively smaller size, and finishes with chemo-mechanical polishing (CMP). The CMP process is particularly important for SiC because wet etching is almost impossible. CMP of SiC is carried out using a colloidal silica slurry at a slightly elevated temperature and at high pH [130] or by adding [131]. The recipe of the CMP process is modified in individual groups [132]. Note that SiC wafers are usually polished on both front and back sides to minimize wafer warpage due to the Twyman effect [133]. In recent years, a catalyst-referred etching (CARE) method has been proposed [134]. In this technique, no abrasives are used; instead, SiC is removed by catalytic etching. Preparation of atomically flat surfaces without dislocation pits has been demonstrated [135].

3.9 Summary

Table 3.4 summarizes the latest results and technological aspects of major techniques for the growth of SiC boules [22–24, 136, 137]. At present, the seeded sublimation method is the most mature, and is the choice for SiC wafer production because of superior growth rate, process stability, and cost. Understanding of thermodynamic phenomena during sublimation growth has been rapidly updated [138]. However, progress in the other methods is also so rapid that one cannot predict which process will be adopted in the future. In particular, a reasonable growth rate and high quality have been achieved simultaneously using solution growth. If a stable and continuous supply of source materials can be established in solution growth, it will become a realistic method to produce long SiC boules with very low dislocation density. The main advantage of HTCVD is high purity; this method has much potential for production of HPSI wafers.

Aspects	Seeded sublimation	HTCVD	Solution growth
Diameter (mm)
Growth rate
Boule length
Defect reduction
Purity
n-type doping
-type doping
Process control
Cost

Growth of long SiC boules with low defect density is still one of the most important challenges in SiC technology. Because 150-mm-diameter SiC wafers are now commercially available, diameter enlargement will not be a major problem. Through recent efforts in boule growth, large SiC wafers with a very low dislocation density (TSD density , TED density , BPD density ) have been demonstrated. However, understanding of defect generation and reduction in SiC is still very limited. Generation, movement, and interaction of dislocations in SiC during high-temperature growth and cooling still need to be clarified. Further refinement of growth simulation is required to assist in controlling the thermal stress and surface stoichiometry to allow dislocation engineering in SiC.

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