Appendix. Symbols

Ladder Programs

Semi-graphic formFull graphic form
A horizontal link along which power can flowB9781856177511000392/fx1.jpg is missingB9781856177511000392/fx2.jpg is missing
Interconnection of horizontal and vertical power flowsB9781856177511000392/fx3.jpg is missingB9781856177511000392/fx4.jpg is missing
Left-hand power connection of a ladder rungB9781856177511000392/fx5.jpg is missingB9781856177511000392/fx6.jpg is missing
Right-hand power connection of a ladder rungB9781856177511000392/fx7.jpg is missingB9781856177511000392/fx8.jpg is missing
Normally open contactB9781856177511000392/fx9.jpg is missingB9781856177511000392/fx10.jpg is missing
Normally closed contactB9781856177511000392/fx11.jpg is missingB9781856177511000392/fx12.jpg is missing
Positive transition-sensing contact, power flow occurs when associated variable changes from 0 to 1.B9781856177511000392/fx13.jpg is missingB9781856177511000392/fx14.jpg is missing
Negative tranistion-sensing contact, power flow occurs when assoaciated variable changes from 1 to 0B9781856177511000392/fx15.jpg is missingB9781856177511000392/fx16.jpg is missing
Output coil: if the power flow to it is on then the coil state is onB9781856177511000392/fx17.jpg is missingB9781856177511000392/fx18.jpg is missing
Set coilB9781856177511000392/fx19.jpg is missingB9781856177511000392/fx20.jpg is missing
Reset coilB9781856177511000392/fx21.jpg is missingB9781856177511000392/fx22.jpg is missing
Retentive memory coil, the state of the associated variable is retained on PLC power failB9781856177511000392/fx23.jpg is missingB9781856177511000392/fx24.jpg is missing

Function Blocks

Semi-graphic formFull graphic form
Horizontal and vertical linesB9781856177511000392/fx25.jpg is missingB9781856177511000392/fx26.jpg is missing
Interconnection of horizontal and vertical signal flowsB9781856177511000392/fx27.jpg is missingB9781856177511000392/fx28.jpg is missing
Crossing horizontal and vertical signal flowB9781856177511000392/fx29.jpg is missingB9781856177511000392/fx30.jpg is missing
Blocks with connectionsB9781856177511000392/fx31.jpg is missingB9781856177511000392/fx32.jpg is missing
ConnectorsB9781856177511000392/fx33.jpg is missingB9781856177511000392/fx34.jpg is missing

Commonly Encountered Blocks

BOOL is Boolean signal, INT is integer, REAL is a floating point number, ANY is any form of signal
Up-counter counts the number of rising edges at input CU. PV defines the maximum value of the counter. Each new rising edge at CU increments CV by 1. Output Q occurs after set count. R is the reset.B9781856177511000392/fx35.jpg is missing
Down-counter counts down the number of rising edges at input CU. PV defines the starting value of the counter. Each new rising edge at CU decrements CV by 1. Output Q occurs when count reaches. zero.B9781856177511000392/fx36.jpg is missing
Up-down counter. It can be used to count up on one input and down on the other.B9781856177511000392/fx37.jpg is missing
On-delay timer. When input IN goes true, the elapsed time at about ET starts to increase and when it reaches the set time, specified by input PT, the output Q goes true.B9781856177511000392/fx38.jpg is missing
Off-delay timer. When input IN goes true, the output Q follows and remains true for the set time after the input Q goes false.B9781856177511000392/fx39.jpg is missing
Pulse timer. When input IN goes true, output Q follows and remains true for the pulse duration specified by input PT.B9781856177511000392/fx40.jpg is missing

Logic Gates

AND gateB9781856177511000392/fx41.jpg is missingB9781856177511000392/fx42.jpg is missing
OR gateB9781856177511000392/fx43.jpg is missingB9781856177511000392/fx44.jpg is missing
NOT gateB9781856177511000392/fx45.jpg is missingB9781856177511000392/fx46.jpg is missing
NAND gateB9781856177511000392/fx47.jpg is missingB9781856177511000392/fx48.jpg is missing
NOR GateB9781856177511000392/fx49.jpg is missingB9781856177511000392/fx50.jpg is missing
XOR GateB9781856177511000392/fx51.jpg is missingB9781856177511000392/fx52.jpg is missing

Sequential Function Charts

Start step. This defines the step which will be activated when the PLC is Cold-started.B9781856177511000392/fx53.jpg is missing
Transition condition. Every transition must have a condition. One that always occurs should be shown with the condition TRUE.B9781856177511000392/fx54.jpg is missing
Step in a programB9781856177511000392/fx55.jpg is missing
Every step can have an associated action. An action describes the bahviour that occurs when the step is activated. Each action can have a qualifier: N indicates the action is executed while the step is active. If no qualifier is indicated it is taken to be N.B9781856177511000392/fx56.jpg is missing
Selective branchingB9781856177511000392/fx57.jpg is missing
Parallel branching when the transition occursB9781856177511000392/fx58.jpg is missing
Convergence when both transitions occurB9781856177511000392/fx59.jpg is missing
Simultaneous convergenceB9781856177511000392/fx60.jpg is missing

Instruction List (IEC 1131-3 Symbols)

LDStart a rung with an open contact
LDNStart a rung with a closed contact
STAn output
SSet true
RReset false
ANDBoolean AND
ANDNBoolean NAND
ORBoolean OR
ORNBoolean NOR
XORBoolean XOR
NOTBoolean NOT
ADDAddition
SUBSubtraction
MULMultiplication
DIVDivision

Structured Text

X:= YY represents an expression that produces a new value for the variable X.

Operators

(…)Parenthesized (bracketed) expression
Function(…)List of parameters of a function
**Raising to a power
−,NOT Negation, Boolean NOT
*, /, MODMultiplication, division, modulus operation
+, −Addition, subtraction
<, >, <=, >=Less than, greater than, less than or equal to, greater than or equal to
=, <>Equality, inequality
AND, &Boolean AND
XORBoolean XOR
ORBoolean OR

Conditional and Iteration Statements

IF … THEN … ELSE is used when selected statements are to be executed when certain conditions occur.
The FOR … DO iteration statement allows a set of statements to be repeated, depending on the value of the iteration integer variable.
The WHILE … DO iteration statement allows one or more statements to be executed while a particular Boolean expression remains true.
The REPEAT … UNTIL iteration statement allows one or more statements to be executed and repeated while a particular Boolean expression remains true.
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