Brian Hall is the lead analyst for Power performance improvement efforts with the IBM Software Group Next Generation Systems team. He works with many IBM software products to capitalize on the IBM Power Architecture® and develop performance preferred practices for software development and deployment. After joining IBM in 1987, Brian originally worked on the IBM XL C/C++/Fortran compilers and on the just-in-time compiler for IBM Java on Power. He has a Bachelor's degree in Computer Science from Queen's University at Kingston and a Master's degree in Computer Science from the University
of Toronto.

Mala Anand is a Senior Technical Staff Member with the System Performance team in the IBM Systems and Technology Group. She holds a Master’s degree in Computer Science from the University of Houston. Her areas of expertise include system performance and architecture, with a focus on hypervisors, operating systems, networks, and middleware on AIX and Linux. She has published papers on network, middleware, and
hypervisor performance.

Bill Buros is a Senior Technical Staff Member in the IBM Linux Technology Center. He is a performance lead on STG IBM Power Systems™ for the Linux operating systems. His focus is on the performance tools, workloads, benchmarks, systems, and teams around the world for IBM PowerLinux™. He has a Bachelor's degree in Computer Science from California Polytechnic State University in San Luis Obispo, CA. He is one of the sponsoring leaders of the IBM PowerLinux technical community on the IBM developerWorks® website and has written extensively on the many aspects of performance tuning and optimizations.

Miso Cilimdzic has been with IBM since 2000. Over the years, he has worked on a diverse set of projects, with a focus on IBM DB2® in the areas of performance, and the integration with, and exploitation of, hardware and design of workload optimized systems. Currently, Miso manages the DB2 Performance Benchmarking team.

Hong Hua is a Senior Technical Staff Member with IBM STG Systems Solution Development. Her responsibilities include end-to-end system and software design performance, from application, middleware, and operating system to hardware. Her fields of expertise are Java, IBM PowerPC/AIX system performance analysis, and optimization.

Judy Liu is a Performance Analyst for DB2 with the IBM Toronto Lab. She has six years of experience with DB2 family products, and has been working with DB2 and IBM WebSphere® projects for the past five years. Her areas of expertise include DB2 online transaction processing (OLTP) and producing world-record benchmark results for DB2 and WebSphere. Judy holds a degree in Computing from Queen's University.

John MacMillan is the Technical Lead for the IBM Rational® Developer for IBM Power Systems Software™ Performance Advisor product. John has over 20 years of experience with C/C++ Development Tools and performance analysis.

Sudhir Maddali is a Senior Software Engineer working in AIX Storage Device Driver Development in Hyderabad, India. He has 12 years of experience, mainly working with AIX in the storage device drivers area. Sudhir’s areas of expertise include storage device drivers and protocols, such as SCSI, SAS, and USB 2.0/3.0.

K Madhusudanan is an IBM Master Inventor and the Technical Chief Engineering Manager (TCEM) for AIX user space architecture with IBM. Madhu has experience with the AIX malloc subsystem, AIX libraries, debugger, and AIX Clustering Technology. He joined IBM in August, 2003, and has 12 years of industry experience. He holds a Bachelor's degree in Computer Science Engineering from Bharathiar University, Coimbatore - India and a Master's degree in Software Systems from Birla Institute of Technology, Pilani-India.

Bruce Mealey is a Distinguished Engineer in the US. He has 24 years of experience in AIX development. Bruce holds a Bachelor’s degree in Electrical Engineering from the University of Texas.

Steve Munroe is a Senior Technical Staff Member at the Rochester, Minnesota Lab in IBM US. He has 38 years of experience in the software development field. He holds a Bachelor’s degree in Computer Science from Washington State University (1974). His areas of expertise include compilers, POSIX run times, PowerISA, and performance analysis. He has written extensively about IBM POWER® performance and
Java performance.

Francis P O’Connell is a member of the IBM Systems and Technology Group in Austin, Texas. He is a Senior Technical Staff Member in Power Systems development, specializing in performance. He joined IBM in 1981 after receiving a Bachelor’s degree in Mechanical Engineering from the University of Connecticut and then earned a Master’s degree in Engineering-Economic Systems from Stanford University.

Sergio Reyes is a Senior Engineer in the US. He has 12 years of experience in performance, specifically with virtualization technologies. He has a Bachelor’s degree in Computer Science from the University of Texas - Pan American. Sergio’s areas of expertise include the AIX operating system, disk I/O subsystem, and IBM
PowerVM® technology.

Raul Silvera is a Senior Technical Staff Member (STSM) at the IBM Canada Lab in Toronto. He is a graduate of the Master of Science program at the School of Computer Science of McGill University. He joined IBM in 1997 and has been focused on the development of compilation technology for the IBM Power and System z® platforms, including code analysis, optimization, parallelization, and code generation for C, C++, Fortran, and other static languages.

Randy Swanberg is a Distinguished Engineer in IBM Power Systems Software and is one of the principal AIX architects. After beginning his career working on defense navigation systems for the US Army, he joined IBM in 1989 and worked on several operating system projects, including AIX, OSF, Project Monterey, and Linux. Most of his 23 years with IBM have been working with the AIX core kernel, specializing in processor and hardware bring-up, memory management, and virtualization. Randy has architectural responsibility for AIX support and usage of hardware systems, features, and new technologies. He is also a member of the POWER processor Architecture Control Board.

Brian Twichell is a Senior Technical Staff Member at the IBM development lab in Austin, Texas. He has over 25 years of experience in systems performance, including over 20 years with Power Systems, where he contributed in roles spanning research, development, and pre-sales and post-sales support. He holds Bachelor's and Master's degrees in Computer Science from Purdue University and the University of Texas at Austin, respectively.

Brian F Veale is a Senior Software Engineer in Power Systems Software and an AIX architect. He holds a PhD in Computer Science from the University of Oklahoma, where he was a Graduate Assistance in Areas of National Need (GAANN) Fellow, and a lecturer, teaching courses in Computer Science and Electrical and Computer Engineering. Before obtaining his PhD, Brian worked on training simulators for the US Air Force. At IBM, he works on the AIX core kernel, specializing in support and usage of new processor features and hardware systems. He is a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE) and a member of the POWER processor Architecture
Control Board.

Julian Wang is the technical lead of JIT compiler and Java performance on Power Systems, and has been developing compiler and runtime products for the past 17 years. Julian has a passion for making Java perform better on the Power Architecture, and he has acute interests in parallel computing, operating systems, performance analysis, and bit-twiddling.

Yaakov Yaari is a research scientist at Haifa Research Lab, Israel. He has 30 years of experience in program simulation, computer architecture, and in the compiler and program optimization fields. He holds a Ph.D. degree in Mathematics from Bar Ilan University, and Bachelor of Science and Master of Science degrees in Electrical Engineering from Technion, Haifa. His areas of expertise include program optimization, machine learning, and computer architecture. He has published several papers in these areas and holds several patents.