About the Author

Dr Steven H. Voldman is the first IEEE Fellow in the field of electrostatic discharge (ESD) for “Contributions in ESD Protection in CMOS, Silicon On Insulator and Silicon Germanium Technology.” He received his B.S. in Engineering Science from the University of Buffalo (1979); a first M.S. EE (1981) from Massachusetts Institute of Technology (MIT); a second EE Degree (Engineer Degree) from MIT; an M.S. Engineering Physics (1986) and a Ph.D. in electrical engineering (EE) (1991) from the University of Vermont under IBM's Resident Study Fellow program.

He was a member of the IBM development team for 25 years, working on semiconductor device physics, device design, and reliability (e.g., soft error rate (SER), hot electrons, leakage mechanisms, latchup, and ESD). Steve Voldman has been involved in latchup technology development for 27 years. He worked on both technology and with-product development in bipolar SRAM, CMOS DRAM, CMOS logic, silicon on insulator (SOI), BiCMOS, silicon germanium (SiGe), RF CMOS, RF SOI, smart power, and image processing technologies. In 2008 he was a member of the Qimonda DRAM development team, working on 70, 58, and 48 nm CMOS technology. In 2008 he initiated a limited liability corporation (LLC), and worked at headquarters in Hsinchu, Taiwan for Taiwan Semiconductor Manufacturing Corportion (TSMC) as part of the 45 nm ESD and latchup development team. He is presently a Senior Principal Engineer working for the Intersil Corporation on ESD and latchup development.

Dr Voldman was Chairman of the SEMATECH ESD Working Group from 1995 to 2000. In his SEMATECH Working Group, attention focused on ESD technology benchmarking, the first transmission line pulse (TLP) standard development team, strategic planning, and JEDEC–ESD Association standards harmonization of the human body model (HBM) Standard. From 2000 to 2010, as Chairman of the ESD Association Work Group on TLP and very-fast TLP (VF-TLP), his team was responsible for initiating the first standard practice and standards for TLP and VF-TLP. Steve Voldman has been a member of the ESD Association Board of Directors and Education Committee. He initiated the “ESD on Campus” program, which was established to bring ESD lectures and interaction to university faculty and students internationally; the ESD on Campus program has reached over 32 universities in the United States, Singapore, Taiwan, Malaysia, the Philippines, Thailand, India, and China.

Dr Voldman teaches short courses and tutorials on ESD, latchup, and invention in the United States, China, Singapore, Malaysia, and Israel. He is a recipient of over 210 issued US patents, in the area of ESD and CMOS latchup. He has served as an expert witness in patent litigation cases associated with ESD and latchup.

Dr Voldman has also written articles for Scientific American and is an author of the first book series on ESD and latchup: ESD: Physics and Devices, ESD: Circuits and Devices, ESD: RF Technology and Circuits, a fourth text, Latchup, and a fifth text, ESD: Failure Mechanisms and Models. He is also a contributor to the book Silicon Germanium: Technology, Modeling and Design. There are international Chinese editions of the book ESD: Circuits and Devices and the text ESD: RF Technology and Circuits. He is also a chapter contributor to the text Nanoelectronics: Nanowires, Molecular Electronics, and Nano-devices.