9

Multilayer Iterative FEC Decoding for Video Transmission over Wireless Networks

Bo Rong, Yiyan Wu, and Gilles Gagnon

CONTENTS

9.1    Basics of Video Transmission

9.2    Redundancy in Packetized Multimedia Transmission

9.3    Channel Coding for Wireless Communications

9.3.1    FEC and LDPC Codes

9.3.2    Deterministic Bits for LDPC Decoding

9.4    Multilayer Iterative LDPC Decoding

9.4.1    Architecture Design

9.4.2    Arranging Deterministic Bits at Transmitter Side

9.5    Numerical Results

9.6    Conclusion

References

Forward error correction (FEC) plays an important role in modern wireless networks to protect video transmission from errors. For example, low-density parity-check (LDPC) codes, a class of popular FEC option, have been widely adopted by the most advanced wireless communication systems, including IEEE 802.16e, 802.11n, and DVB-S2/T2 [1,2,3]. To improve the bit error rate (BER) performance, this chapter develops a novel multilayer LDPC iterative decoding scheme using deterministic bits for multimedia communication. These bits serve as deterministic information in the LDPC decoding process to reduce the redundancy during video transmission. Unlike the existing work, our proposed scheme addresses the deterministic bits that can be repositioned, such as moving picture experts group (MPEG) null packets and service information (SI) bits, rather than the widely investigated protocol headers. Simulation results show that our proposed scheme can achieve considerable gain in today’s most popular broadband wireless multimedia networks, such as WiMAX and WiFi.

The structure of this chapter is organized as follows. Section 9.1 introduces the state of the art of video transmission, with further explanation on information redundancy of packetized multimedia transmission in Section 9.2. Section 9.3 gives an overview on wireless channel coding, as well as LDPC decoding and shortening. Section 9.4 reviews the existing work on joint protocol-channel decoding (JPCD) and develops our multilayer iterative decoding scheme for LDPC codes using deterministic bits. Section 9.5 presents numerical results to justify the performance of the proposed scheme, followed by Section 9.6 to conclude the chapter.

9.1    Basics of Video Transmission

MPEG-4 Advanced Video Codec and Advanced Audio Codec (AVC/AAC) have been accepted as an audio–visual encoding format by a number of standards. Despite the agreement on the encoding format, there exist two major competing specifications for the transmission of MPEG-4, i.e., MPEG-4 over IP (real-time protocol) and MPEG-4 over MPEG-2 transport stream (TS).

•  Real-time protocol (RTP): The RTP was developed to deliver real time data over IP networks [4]. RTP is a native internet protocol and thus works harmonically with the general IP suite. RTP runs in conjunction with the RTP control protocol (RTCP). While RTP carries the media streams, RTCP is responsible for monitoring transmission statistics and quality of service (QoS) [4]. RTP and RTCP run on top of transport layer protocols, such as UDP. RTP stream has to rely on UDP to provide multiplexing over an IP network.

•  MPEG-2 transport stream: TS is a format specified in MPEG-2, with the design goal of multiplexing digital video and audio and synchronizing the output [5]. MPEG-2 TSs consist of a number of 188 byte TS Packets, each of which has a 4 byte header and a payload. The payload of TS packets may contain program information or packetized elementary streams (PES). PES packets are typically video/audio streams broken into 184 byte chunks to fit into the TS packet payload. TSs are designed such that they can be used in the environment where errors are likely. TSs are commonly used in broadcast applications such as DVB and advanced television systems committee (ATSC). DVB-T/C/S uses 204 bytes and ATSC 8-VSB uses 208 bytes as the size of emission packets (TS packet + FEC data).

9.2    Redundancy in Packetized Multimedia Transmission

There exists tremendous information redundancy in the packetized multimedia transmission over today’s wireless communication systems. For example, some bits are constant or predictable during the transmission and, as such, defined as deterministic bits in our work. Those bits can be incrementally identified and recursively fed back in the iterative decoding process to improve the decoding performance.

As shown in the following, deterministic bits may come from three sources, including (1) packet headers, (2) null packets, and (3) SI.

•  Packet headers: An advanced wireless communication system usually resorts to the RTP/UDP/IP protocol stack to transmit multimedia data. Figure 9.1 illustrates an example of packetized transmission in the IEEE 802.11 standard (WiFi). It has been found that packet headers in each protocol are highly repetitive and thus predicable, due to the intra-layer and inter-layer redundancy [6].

•  Null packets: Video encoders usually output variable bit rate data depending on the video content, whereas most communication and broadcasting channels are using fixed rate. A data buffer is always implemented at the video encoder output to smooth out the data rate. When there is a buffer underflow, the transport layer at the multiplexer will fill the output data with deterministic null packets. Our study reveals that there are a considerable number of null packets in today’s MPEG TS as well as other CBR video transmission. Figure 9.2 shows an H.264 or MPEG AVC encoder output data rate fluctuation, with an output setting at 5 Mbps. Over 1 min observation time, the maximum data rate is 4.66 Mbps, the minimum data rate is 4.60 Mbps, and the average data rate is 4.64 Mbps. That means that up to 7.2% of null packets need to be inserted by the transport layer to keep a 5 Mbps constant data rate.]

FIGURE 9.1
Protocol stack for multimedia transmission over WiFi.

FIGURE 9.2
H.264 video encoder output data rate variation over 1 min period (encoder output rate is set at 5 Mbps).

•  Service information: In television or other services of broadcasting nature, one of the most useful parts of a TS is the SI. SI provides information to enable automatic configuration of the receiver to demultiplex and decode the various streams of programs within the TS. SI may go far beyond simply describing the structure of the stream. For instance, schedule information, detailed information about the elements of a service, language information, and network information are all available. SI has to be sent repetitively and periodically to inform receivers of the programs content and thus contains a plenty of information redundancy.

In this work, we mainly address the controllable deterministic bits, such as MPEG null packets and SI, which are easy to relocate in the encoding buffer, on the transmitter side. As demonstrated in the following, controllable deterministic bits are more flexible and efficient than the uncontrollable deterministic bits such as packet headers.

FIGURE 9.3
Example of ATSC mobile DTV RS frame.

The controllable deterministic bits are as follows:

1.  Easy to be identified by location: We illustrate the frame structure of ATSC mobile digital television (DTV) in Figure 9.3 to show MPEG null packets and SI at the same time [7]. WiMAX and WiFi will have the null packets if they employ MPEG or other constant bit rate (CBR) standards for video streaming. However, WiMAX and WiFi will not have SI, unless carrying broadcasting service such as IPTV. Figure 9.3 is a possible organization of ATSC mobile DTV RS frame, where SMT, SLT, GAT, CIT, RRT are the SI placed at the beginning of the frame and stuffing bytes are the MPEG null packets placed at the end of the frame [7]. As a result, these deterministic bits are easy to be detected and identified by a receiver. It is usually not possible to place packet headers in the beginning and end of the frame, since they are always followed by a payload of variable length.

2.  Easy to be identified by content: MPEG null packet is an MPEG TS packet of 188 bytes filled mostly with 0x00. In case of errors, say 10% of 0x00s become nonzeros, we can still identify the null packet either with the packet ID in the header (0x1fff) or with the rest of 90% 0x00s by cross-correlation. Packet headers, on the other hand, are not that easy to be identified by their content. For instance, it is difficult to tell an error occurred or not if an IP address like “198.101.10.8” has been corrupted to “198.101.20.3.”

3.  High efficiency: As stated in (2), an MPEG null packet can easily provide a bunch of 188 bytes deterministic bits. It is not possible to obtain so many deterministic bits from a packet header over a short period though. Moreover, each field in an IP header must be compared and analyzed independently, which significantly increases the computational cost.

4.  Stable decoding gain: As shown in the rest of the chapter, controllable and uncontrollable deterministic bits correspond to the LDPC shortening at fixed and random positions, respectively. As a result, controllable deterministic bits are able to contribute constant decoding gain, whereas the uncontrollable ones produce different gains case by case.

9.3    Channel Coding for Wireless Communications

9.3.1    FEC and LDPC Codes

FEC is a method commonly used in wireless communications to handle losses, enabling a receiver to correct errors/losses without further interaction with the sender. As shown in Figure 9.4, an (n, k) block code converts k source data into a group of n coded data. Usually, the first k data in each group are identical to the original k source data (systematic code); the remaining (n – k) data are referred to as parity data. In coding theory, a parity-check matrix is a basis for a linear code, i.e., a codeword x belongs to a linear block code C if and only if fi Hx = 0.

Today’s wireless networks have to face an increasing demand of high data rate and reliability, which significantly depends on the error correction schemes with near Shannon limit performance. LDPC codes are among the best candidates for this need. For example, quasi-cyclic LDPC (QC-LDPC), a class of LDPC codes, has been widely adopted by the most advanced wireless communication systems, such as IEEE 802.16e, 802.11n, and DVB-S2/T2 [1,2,3].

LDPC codes have two major features differentiating themselves from other block codes, i.e., the LDPC matrix and the belief propagation (BP) decoding algorithm. An m × n parity-check matrix H can be associated to a bipartite graph with each column (each component of a codeword) corresponding to a bit node and each row (a parity-check constraint) corresponding to a check node. An edge connects the ith bit node and the jth check node, if the ith codeword component participates in the jth constraint equation, i.e., H_ji = 1. In this way, the BP decoding process can be interpreted to be the exchange of information iteratively between the two kinds of nodes over edges.

FIGURE 9.4
FEC encoding/decoding.

Unlike the maximum a posteriori (MAP) decoding algorithm that seeks for the global optimization over the whole codeword space, BP algorithm seeks only for the local optimization, which means a bit node in the bipartite graph can only make use of the information that flow into it without the knowledge of other bit nodes. This local optimization of BP lowers the decoding complexity at the expense of the decoding performance. In recent years, many modified BP decoding algorithms have been proposed to alleviate this problem, such as joint row and column algorithm (JRC) BP algorithm [8,9], oscillation based algorithm (OSC) [10], and so on. These improvements in decoding algorithms refine the updating process of the extrinsic information between the bit nodes and check nodes to some extent.

9.3.2    Deterministic Bits for LDPC Decoding

Using deterministic bits in decoding is also known as “shortening” from the perspective of channel coding theory. This topic can be traced back to the shortened Bose-Chaudhuri-Hocquenghem (BCH) and RS codes, especially the latter that can be shortened almost at will. For LDPC codes, only a few studies were published recently [11,12,13]. These works show that decoding with deterministic bits is equal to the shortening of information bits, and the extrinsic information transfer (EXIT) chart can be applied for performance evaluation.

Take the (8, 4) LDPC code defined by Equation 9.1 as an example, where the code has a length of 8 with 4 information bits and 4 parity bits:

$H=\left(\begin{array}{llllllll}1\hfill & 1\hfill & 1\hfill & 1\hfill & 0\hfill & 0\hfill & 0\hfill & 0\hfill \\ 1\hfill & 0\hfill & 0\hfill & 1\hfill & 1\hfill & 0\hfill & 0\hfill & 1\hfill \\ 0\hfill & 0\hfill & 1\hfill & 0\hfill & 1\hfill & 1\hfill & 1\hfill & 0\hfill \\ 0\hfill & 1\hfill & 0\hfill & 0\hfill & 0\hfill & 1\hfill & 1\hfill & 1\hfill \end{array}\right).$

(9.1)

According to H, the bits (v₁,…, v₈) satisfy the following four constraints (“+” denotes modulo 2 operation in this chapter):

$\{\begin{array}{l}{v}_1+v_2+v_3+v_4=0\hfill \\ v_1+v_4+v_5+v_8=0\hfill \\ v_2+v_5+v_6+v_7=0\hfill \\ v_2+v_6+v_7+v_8=0\hfill \end{array}.$

(9.2)

The corresponding bipartite graph is shown in Figure 9.5a.

FIGURE 9.5
Bipartite graphs: (a) original graph and (b) residual graph.

Suppose the second and fourth information bits, (v₂, v₄), are set as known. Thus, there remain 2 unknown bits for the receiver. From the perspective of bipartite graph, variable nodes and codeword bits have a one to one correspondence. As v₂ and v₄ are known to the decoder, then in the decoding iterations these 2 nodes are always sending the correct message to the check nodes. In this way, the constraints reduce to

$\{\begin{array}{l}{v}_1+v_3=v_2+v_4\hfill \\ v_1+v_5+v_8=v_4\hfill \\ v_3+v_5+v_6+v_7=0\hfill \\ v_6+v_7+v_8=v_2\hfill \end{array}.$

(9.3)

Without loss of generality, we set the known bits as zeros, then the constraints further reduce to

$\{\begin{array}{l}{v}_1+v_3=0\hfill \\ v_1+v_5+v_8=0\hfill \\ v_3+v_5+v_6+v_7=0\hfill \\ v_6+v_7+v_8=0\hfill \end{array},$

(9.4)

and the parity-check matrix representation is given by

$H=\left(\begin{array}{llllll}1\hfill & 1\hfill & 0\hfill & 0\hfill & 0\hfill & 0\hfill \\ 1\hfill & 0\hfill & 1\hfill & 0\hfill & 0\hfill & 1\hfill \\ 0\hfill & 1\hfill & 1\hfill & 1\hfill & 1\hfill & 0\hfill \\ 0\hfill & 0\hfill & 0\hfill & 1\hfill & 1\hfill & 1\hfill \end{array}\right).$

(9.5)

From this step, it is clear that deterministic or known bits are equivalent to eliminating the correspondent columns in parity-check matrix or eliminating the correspondent variable nodes with the edges incident to them in bipartite graph as shown in Figure 9.5b. Another fact of this example is that the elimination of columns in H alters the code rate from 1 – 4/8 = 1/2 to 1 – 4/6 = 1/3 and the code length from 8 to 6. As a result, the original (2, 4) regular code regenerates to a column-regular, row-irregular one with column degree 2 and row degree (2, 3, 4).

From the aforementioned example, we can reach the following conclusions on “deterministic bits”:

1.  Deterministic information is equivalent to deleting columns in the information part of the parity-check matrix.

2.  Deterministic bits result in the decrease of code rate and length. That is, having m bits known in a (n, k) code will achieve a (n–m, k–m) code.

3.  Decoding will be performed on the residual bipartite graph, which is a correspondent column-reduced matrix.

4.  Deterministic bits will change the degree distribution of variable and check node.

Therefore, given the number of deterministic bits, the shortening pattern has to be optimized with regard to the performance of residual code. In other words, the degree distributions of shortened code need to be optimized for a low decoding threshold.

Deterministic information not only changes the structure of parity-check matrix but also causes the encoding matrix to mutate. The systematic encoding matrix, denoted by G, is of size k by n and has the information part of a k by k square matrix and the parity-check part of a k by (n–k) matrix. The rows of G and H span the n-dimensional vector space; the subspaces spanned by G and H are orthogonal to each other, i.e., $G{H}^T=0$. We demonstrate the correspondence of G and H in Figure 9.6. As shown in the figure, having m known bits in the codeword is equivalent to deleting m columns in H and both m columns and m rows in G. Suppose the deleted columns are indexed by $G_{del}=\left\{ci,i=1,\dots ,m\right\}$, the columns and rows deleted from G are indexed by the same set. The aforementioned is a general case of encoding. In case of (I) RA codes, there is no need for the G, and the encoding can be done using the column deleted H matrix.

FIGURE 9.6
Correspondence of G and H with m deterministic bits removed.

9.4    Multilayer Iterative LDPC Decoding

9.4.1    Architecture Design

We develop in the following a novel multilayer iterative LDPC decoding scheme to improve the BER performance in a multimedia wireless communication system. Our scheme aims at achieving extra decoding gain by using deterministic bits, which may be exploited at any layers above the physical layer. These deterministic bits may involve the widely investigated packet headers [6,14] as well the proposed null packets and SI bits. We especially address the null packets and SI, since they are more flexible and efficient than the packet headers.

The deterministic bits can be gradually identified and used in the iterative decoding process to improve the decoding performance. Our scheme explores as many deterministic bits as possible from all the layers according to the unique feature of a given communication system. Then, these deterministic bits are used to substitute the corresponding received bits iteratively to help the decoding. In terms of coding theory, our scheme is equivalent to achieving a series of subcodes, whose code rates are lower than the original.

The proposed multilayer iterative decoding is different from the conventional joint source-channel coding (JSCC) [15]. JSCC addresses the information redundancy in source coding process, whereas our scheme addresses the transmission and packetization redundancy. JSCC has never been widely deployed in practical systems for two reasons: (1) it requires a combination of special source coding and channel coding algorithms and (2) standard protocol stacks do not allow damaged packets to reach the application layer. Our scheme, on the other hand, is applicable to most existing communication systems with a variety of source and channel coding configurations.

The proposed multilayer iterative decoding is also different from the newly emerging JPCD [16]. JPCD exploits the redundancy present in the protocol stack to facilitate packet synchronization and header recovery at the receiver side. This redundancy is due to the presence of cyclic redundancy checks (CRCs) and checksums at various layers of the protocol stack, as well as from the structure of these headers. Our scheme, however, aims to improve physical layer error correction by applying deterministic bits to LDPC codes. Deterministic bits involve much more than packet headers and could be manipulated at both transmitter and receiver sides.

Figure 9.7 illustrates our proposed approach that can improve the performance of FEC iterative decoder with deterministic information from all possible layers. During each decoding iteration, the decoded symbol from the physical layer is passed to upper layer packet analyzers to find the deterministic bits. Then, these deterministic bits are fed back for the next round of decoding iteration.

Figure 9.8 illustrates where the gain of our multilayer iterative decoding comes from. Modern channel coding technology makes it possible to closely approach the Shannon limit with long code length. However, there does exist information redundancy inside the transmitted symbols before channel coding, i.e., sync, pilot, training sequence, upper layer headers, signaling bits, null packets, SI, etc. Using our approach of multilayer iterative decoding, one can make use of the information redundancy to reduce the receiver C/N threshold and improve coverage or signal robustness.

The scheme of multilayer iterative decoding can be applied to a number of wireless communication systems with different protocol stacks. For example, Figures 9.9 and 9.10 present the architecture and flowchart of a DVB-T2 DTV multilayer iterative decoder. In particular, the smart controller in Figure 9.9 detects a variety of source packets, stores a list of historical deterministic bits from all layers, analyzes the correlation between past and future packets, and intelligently obtains deterministic bits to be used in each decoding iteration.

FIGURE 9.7
Multilayer iterative decoding.

FIGURE 9.8
C/N gain of multilayer iterative decoding.

FIGURE 9.9
Architecture of DVB-T2 multilayer iterative decoder.

FIGURE 9.10
Flowchart of DVB-T2 multilayer iterative decoder.

One may argue that the proposed deterministic bits feedback algorithm makes the receiver too complicated. Actually, all those deterministic bits do exist and are used in today’s regular receivers for upper layer purpose. They only need to be identified, stored, and fed back to the physical layer to improve the FEC performance.

9.4.2    Arranging Deterministic Bits at Transmitter Side

A study showed that the shortening pattern or the position of deterministic bits in an LDPC block can be optimized to achieve maximum decoding gain [13]. Accordingly, we propose to reposition the controllable deterministic bits in the transmitter buffers before performing LDPC encoding. Figure 9.11 illustrates that the repositioning of controllable deterministic bits involves two steps: (1) repositioning in the frame buffer and (2) repositioning in the FEC encoding buffer.

There are two types of LDPC codes, i.e., regular and irregular. An LDPC code is regular if the rows and columns of parity-check matrix, H, have uniform weight; otherwise, it is irregular. For regular LDPC codes, only Step 1 is necessary; for irregular LDPC codes, both Step 1 and Step 2 are critical. Most existing standards, such as DVB-T2, adopt irregular codes.

Step 1: In practice, there are several ways to transmit the deterministic bits for an easy detection at receiver side. It’s worth noting that some deterministic bits, such as SI, have fixed total length, whereas others, such as null packets, have fixed packet size, but variable number of packets, resulting in a variable total length eventually.

1.  By time interval: For example, SI can be transmitted periodically, like once a second, so that receiver can easily detect them based on fixed time.

2.  By location: Figure 9.12 shows a data frame with location-sensitive structure for wireless transmission. It specifies that all fixed length deterministic bits, like SI, are inserted at the beginning of a frame. A pointer could also be added as part of the SI to indicate the end of the SI in a frame. Moreover, the deterministic bits of variable total length, like null packets, should be appended at the end of a frame as frame paddings. An optional pointer can also be added to indicate the start of them.

FIGURE 9.11
Repositioning the deterministic bits at transmitter side.

FIGURE 9.12
Example of deterministic bits in frame buffer.

FIGURE 9.13
Random insertion of the deterministic bits in LDPC encoding block.

3.  Aforementioned (1) and (2) work concurrently.

Step 2: Conventionally, the FEC encoder follows the transmission frame to organize the encoding block and generate parity bits. As shown in Figure 9.13, the controllable deterministic bits are inserted randomly and may not be in the best position from the perspective of decoding gain.

We propose to place the controllable deterministic bits to specific positions in encoding block (FEC buffer) before generating parity bits. The specific positions mentioned earlier are related to the shortening property of the error correction code used and are able to be located by certain algorithms. This step, as shown in Figure 9.14, aims at achieving as much decoding gain as possible by manipulating the positions of deterministic bits during the FEC encoding but not the data transmission.

With respect to Figure 9.14, the performance of LDPC shortening is mainly determined by the decoding threshold. In case of irregular codes, the decoding threshold is closely related to degree distribution pair and can be estimated by an EXIT chart [17]. The aforementioned argument leads to a straight forward solution of brute-force searching, i.e., looking for the shortening pattern with the lowest decoding threshold using EXIT chart. Brute-force searching can land on an optimal solution with the computational cost varying with the size of parity-check matrix H. For example, it has a computational complexity of $O\left(n!/p!\right)$ if p (<k) information bits are removed from a (n,k) LDPC codes.

FIGURE 9.14
Smart insertion of the controllable deterministic bits in LDPC encoding block (FEC buffer).

9.5    Numerical Results

In this section, numerical results are presented to demonstrate the performance of our proposed iterative decoding scheme using deterministic bits. There are a number of different irregular QC-LDPC codes listed in 802.16e and 802.11n standards. For example, 802.16e has the code rates of 1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6 with possible lengths of 576, 1440, 2304 bit; 802.11n has the code rates of 1/2, 2/3, 3/4, 5/6 with possible lengths of 648, 1296, 1944 bit. Without loss of generality, we take 802.16e and 802.11n LDPC codes as examples to compare different combinations of deterministic bit arrangement.

Let R be the code rate, then the parity-check matrices of 802.16e and 802.11n QC-LDPC are defined by a 24(1 – R) × 24 base or mother matrix M with each entry representing the shift of a circulant permutation submatrices (see Figure 9.15).

The base matrices of 1/2 and 2/3 codes have a size of 12 × 24 and 8 × 24, respectively, with 12 information columns for 1/2 code and 16 information columns for 2/3 code. In the following, we shorten the QC LDPC codes at the level of base matrix, instead of parity-check matrix, to keep the quasi-cyclic property.

We evaluate the asymptotic performance of different LDPC shortening algorithms by EXIT chart [17]. We remove 4 columns out of all the possible 12 or 16 information columns using different algorithms. Table 9.1 (802.16e) and Table 9.2 (802.11n) list the index of eliminated columns in base matrix M, the weight of deleted column (in parentheses) and the decoding threshold in binary-input additive white Gaussian noise (BAWGN) channel.

FIGURE 9.15
Base matrices in 802.16e and 802.11n standards: (a) 802.16e and (b) 802.11n.

TABLE 9.1

Shortening for the Codes in 802.16e

802.16e		Origin	Brute Force Searching	Average of Random Shortening
Shortening 4 columns 1/2 code	Pattern		5(3),6(6),7(3),9(3)
threshold	0.5960 dB	0.1390 dB	0.2260 dB
Shortening 4 columns 2/3A code	Pattern		1(3),2(3),3(6),4(3)
threshold	1.4700 dB	1.1050 dB	1.1285 dB

TABLE 9.2

Shortening for the Codes in 802.16N

802.16n		Origin	Brute Force Searching	Average of Random Shortening
Shortening 4 columns 1/2 code	Pattern		4(3),6(3),7(3),10(3)
threshold	0.4950 dB	−0.0180 dB	0.2923 dB
Shortening 4 columns 2/3 code	Pattern		1(8),5(6),6(3),8(3)
threshold	1.3880 dB	0.9850 dB	1.0359 dB

9.6    Conclusion

This chapter presents a new scheme of multilayer iterative decoding with deterministic bits to improve the performance of LDPC coded wireless communication systems. In our scheme, we address the controllable deterministic bits, such as MPEG null packets, with both transmitter-side and receiver-side mechanisms. We identify the flexible length of deterministic bits as a key problem and further develop a recursive LDPC shortening scheme to overcome it. Numerical results demonstrate that our proposed scheme has a good performance in terms of flexibility, efficiency, and complexity.

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